2 * Copyright © 2010 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
30 #include "brw_shader.h"
31 #include "brw_ir_fs.h"
32 #include "brw_fs_builder.h"
33 #include "compiler/glsl/ir.h"
34 #include "compiler/nir/nir.h"
42 class fs_live_variables
;
45 struct brw_gs_compile
;
48 offset(fs_reg reg
, const brw::fs_builder
& bld
, unsigned delta
)
58 return byte_offset(reg
,
59 delta
* reg
.component_size(bld
.dispatch_width()));
61 reg
.reg_offset
+= delta
;
70 * The fragment shader front-end.
72 * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
74 class fs_visitor
: public backend_shader
77 fs_visitor(const struct brw_compiler
*compiler
, void *log_data
,
80 struct brw_stage_prog_data
*prog_data
,
81 struct gl_program
*prog
,
82 const nir_shader
*shader
,
83 unsigned dispatch_width
,
84 int shader_time_index
,
85 const struct brw_vue_map
*input_vue_map
= NULL
);
86 fs_visitor(const struct brw_compiler
*compiler
, void *log_data
,
88 struct brw_gs_compile
*gs_compile
,
89 struct brw_gs_prog_data
*prog_data
,
90 const nir_shader
*shader
,
91 int shader_time_index
);
95 fs_reg
vgrf(const glsl_type
*const type
);
96 void import_uniforms(fs_visitor
*v
);
97 void setup_uniform_clipplane_values(gl_clip_plane
*clip_planes
);
98 void compute_clip_distance(gl_clip_plane
*clip_planes
);
100 fs_inst
*get_instruction_generating_reg(fs_inst
*start
,
104 void VARYING_PULL_CONSTANT_LOAD(const brw::fs_builder
&bld
,
106 const fs_reg
&surf_index
,
107 const fs_reg
&varying_offset
,
108 uint32_t const_offset
);
109 void DEP_RESOLVE_MOV(const brw::fs_builder
&bld
, int grf
);
111 bool run_fs(bool do_rep_send
);
112 bool run_vs(gl_clip_plane
*clip_planes
);
117 void allocate_registers();
118 void setup_fs_payload_gen4();
119 void setup_fs_payload_gen6();
120 void setup_vs_payload();
121 void setup_gs_payload();
122 void setup_cs_payload();
123 void fixup_3src_null_dest();
124 void assign_curb_setup();
125 void calculate_urb_setup();
126 void assign_urb_setup();
127 void convert_attr_sources_to_hw_regs(fs_inst
*inst
);
128 void assign_vs_urb_setup();
129 void assign_tes_urb_setup();
130 void assign_gs_urb_setup();
131 bool assign_regs(bool allow_spilling
);
132 void assign_regs_trivial();
133 void calculate_payload_ranges(int payload_node_count
,
134 int *payload_last_use_ip
);
135 void setup_payload_interference(struct ra_graph
*g
, int payload_reg_count
,
136 int first_payload_node
);
137 int choose_spill_reg(struct ra_graph
*g
);
138 void spill_reg(int spill_reg
);
139 void split_virtual_grfs();
140 bool compact_virtual_grfs();
141 void assign_constant_locations();
142 void lower_constant_loads();
143 void invalidate_live_intervals();
144 void calculate_live_intervals();
145 void calculate_register_pressure();
147 bool opt_algebraic();
148 bool opt_redundant_discard_jumps();
150 bool opt_cse_local(bblock_t
*block
);
151 bool opt_copy_propagate();
152 bool try_copy_propagate(fs_inst
*inst
, int arg
, acp_entry
*entry
);
153 bool try_constant_propagate(fs_inst
*inst
, acp_entry
*entry
);
154 bool opt_copy_propagate_local(void *mem_ctx
, bblock_t
*block
,
156 bool opt_drop_redundant_mov_to_flags();
157 bool opt_register_renaming();
158 bool register_coalesce();
159 bool compute_to_mrf();
160 bool eliminate_find_live_channel();
161 bool dead_code_eliminate();
162 bool remove_duplicate_mrf_writes();
164 bool opt_sampler_eot();
165 bool virtual_grf_interferes(int a
, int b
);
166 void schedule_instructions(instruction_scheduler_mode mode
);
167 void insert_gen4_send_dependency_workarounds();
168 void insert_gen4_pre_send_dependency_workarounds(bblock_t
*block
,
170 void insert_gen4_post_send_dependency_workarounds(bblock_t
*block
,
172 void vfail(const char *msg
, va_list args
);
173 void fail(const char *msg
, ...);
174 void no16(const char *msg
);
175 void lower_uniform_pull_constant_loads();
176 bool lower_load_payload();
177 bool lower_logical_sends();
178 bool lower_integer_multiplication();
180 bool lower_simd_width();
181 bool opt_combine_constants();
183 void emit_dummy_fs();
184 void emit_repclear_shader();
185 fs_reg
*emit_fragcoord_interpolation(bool pixel_center_integer
,
186 bool origin_upper_left
);
187 fs_inst
*emit_linterp(const fs_reg
&attr
, const fs_reg
&interp
,
188 glsl_interp_qualifier interpolation_mode
,
189 bool is_centroid
, bool is_sample
);
190 fs_reg
*emit_frontfacing_interpolation();
191 fs_reg
*emit_samplepos_setup();
192 fs_reg
*emit_sampleid_setup();
193 fs_reg
*emit_samplemaskin_setup();
194 void emit_general_interpolation(fs_reg
*attr
, const char *name
,
195 const glsl_type
*type
,
196 glsl_interp_qualifier interpolation_mode
,
197 int *location
, bool mod_centroid
,
199 fs_reg
*emit_vs_system_value(int location
);
200 void emit_interpolation_setup_gen4();
201 void emit_interpolation_setup_gen6();
202 void compute_sample_position(fs_reg dst
, fs_reg int_sample_pos
);
203 void emit_texture(ir_texture_opcode op
,
204 const glsl_type
*dest_type
,
205 fs_reg coordinate
, int components
,
207 fs_reg lod
, fs_reg dpdy
, int grad_components
,
211 int gather_component
,
217 unsigned return_channels
);
218 fs_reg
emit_mcs_fetch(const fs_reg
&coordinate
, unsigned components
,
219 const fs_reg
&sampler
);
220 void emit_gen6_gather_wa(uint8_t wa
, fs_reg dst
);
221 fs_reg
resolve_source_modifiers(const fs_reg
&src
);
222 void emit_discard_jump();
223 bool opt_peephole_sel();
224 bool opt_peephole_predicated_break();
225 bool opt_saturate_propagation();
226 bool opt_cmod_propagation();
227 bool opt_zero_samples();
228 void emit_unspill(bblock_t
*block
, fs_inst
*inst
, fs_reg reg
,
229 uint32_t spill_offset
, int count
);
230 void emit_spill(bblock_t
*block
, fs_inst
*inst
, fs_reg reg
,
231 uint32_t spill_offset
, int count
);
233 void emit_nir_code();
234 void nir_setup_inputs();
235 void nir_setup_single_output_varying(fs_reg
*reg
, const glsl_type
*type
,
237 void nir_setup_outputs();
238 void nir_setup_uniforms();
239 void nir_emit_system_values();
240 void nir_emit_impl(nir_function_impl
*impl
);
241 void nir_emit_cf_list(exec_list
*list
);
242 void nir_emit_if(nir_if
*if_stmt
);
243 void nir_emit_loop(nir_loop
*loop
);
244 void nir_emit_block(nir_block
*block
);
245 void nir_emit_instr(nir_instr
*instr
);
246 void nir_emit_alu(const brw::fs_builder
&bld
, nir_alu_instr
*instr
);
247 void nir_emit_load_const(const brw::fs_builder
&bld
,
248 nir_load_const_instr
*instr
);
249 void nir_emit_undef(const brw::fs_builder
&bld
,
250 nir_ssa_undef_instr
*instr
);
251 void nir_emit_vs_intrinsic(const brw::fs_builder
&bld
,
252 nir_intrinsic_instr
*instr
);
253 void nir_emit_gs_intrinsic(const brw::fs_builder
&bld
,
254 nir_intrinsic_instr
*instr
);
255 void nir_emit_fs_intrinsic(const brw::fs_builder
&bld
,
256 nir_intrinsic_instr
*instr
);
257 void nir_emit_cs_intrinsic(const brw::fs_builder
&bld
,
258 nir_intrinsic_instr
*instr
);
259 void nir_emit_intrinsic(const brw::fs_builder
&bld
,
260 nir_intrinsic_instr
*instr
);
261 void nir_emit_tes_intrinsic(const brw::fs_builder
&bld
,
262 nir_intrinsic_instr
*instr
);
263 void nir_emit_ssbo_atomic(const brw::fs_builder
&bld
,
264 int op
, nir_intrinsic_instr
*instr
);
265 void nir_emit_shared_atomic(const brw::fs_builder
&bld
,
266 int op
, nir_intrinsic_instr
*instr
);
267 void nir_emit_texture(const brw::fs_builder
&bld
,
268 nir_tex_instr
*instr
);
269 void nir_emit_jump(const brw::fs_builder
&bld
,
270 nir_jump_instr
*instr
);
271 fs_reg
get_nir_src(nir_src src
);
272 fs_reg
get_nir_dest(nir_dest dest
);
273 fs_reg
get_nir_image_deref(const nir_deref_var
*deref
);
274 fs_reg
get_indirect_offset(nir_intrinsic_instr
*instr
);
275 void emit_percomp(const brw::fs_builder
&bld
, const fs_inst
&inst
,
278 bool optimize_extract_to_float(nir_alu_instr
*instr
,
279 const fs_reg
&result
);
280 bool optimize_frontfacing_ternary(nir_alu_instr
*instr
,
281 const fs_reg
&result
);
283 void emit_alpha_test();
284 fs_inst
*emit_single_fb_write(const brw::fs_builder
&bld
,
285 fs_reg color1
, fs_reg color2
,
286 fs_reg src0_alpha
, unsigned components
);
287 void emit_fb_writes();
288 void emit_urb_writes(const fs_reg
&gs_vertex_count
= fs_reg());
289 void set_gs_stream_control_data_bits(const fs_reg
&vertex_count
,
291 void emit_gs_control_data_bits(const fs_reg
&vertex_count
);
292 void emit_gs_end_primitive(const nir_src
&vertex_count_nir_src
);
293 void emit_gs_vertex(const nir_src
&vertex_count_nir_src
,
295 void emit_gs_thread_end();
296 void emit_gs_input_load(const fs_reg
&dst
, const nir_src
&vertex_src
,
297 unsigned base_offset
, const nir_src
&offset_src
,
298 unsigned num_components
);
299 void emit_cs_terminate();
300 fs_reg
*emit_cs_local_invocation_id_setup();
301 fs_reg
*emit_cs_work_group_id_setup();
305 void emit_shader_time_begin();
306 void emit_shader_time_end();
307 void SHADER_TIME_ADD(const brw::fs_builder
&bld
,
308 int shader_time_subindex
,
311 fs_reg
get_timestamp(const brw::fs_builder
&bld
);
313 struct brw_reg
interp_reg(int location
, int channel
);
315 int implied_mrf_writes(fs_inst
*inst
);
317 virtual void dump_instructions();
318 virtual void dump_instructions(const char *name
);
319 void dump_instruction(backend_instruction
*inst
);
320 void dump_instruction(backend_instruction
*inst
, FILE *file
);
322 const void *const key
;
323 const struct brw_sampler_prog_key_data
*key_tex
;
325 struct brw_gs_compile
*gs_compile
;
327 struct brw_stage_prog_data
*prog_data
;
328 struct gl_program
*prog
;
330 const struct brw_vue_map
*input_vue_map
;
332 int *virtual_grf_start
;
333 int *virtual_grf_end
;
334 brw::fs_live_variables
*live_intervals
;
336 int *regs_live_at_ip
;
338 /** Number of uniform variable components visited. */
341 /** Byte-offset for the next available spot in the scratch space buffer. */
342 unsigned last_scratch
;
345 * Array mapping UNIFORM register numbers to the pull parameter index,
346 * or -1 if this uniform register isn't being uploaded as a pull constant.
348 int *pull_constant_loc
;
351 * Array mapping UNIFORM register numbers to the push parameter index,
352 * or -1 if this uniform register isn't being uploaded as a push constant.
354 int *push_constant_loc
;
359 fs_reg outputs
[VARYING_SLOT_MAX
];
360 unsigned output_components
[VARYING_SLOT_MAX
];
361 fs_reg dual_src_output
;
363 int first_non_payload_grf
;
364 /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
368 fs_reg
*nir_ssa_values
;
371 fs_reg
*nir_system_values
;
375 bool simd16_unsupported
;
378 /* Result of last visit() method. Still used by emit_texture() */
381 /** Register numbers for thread payload fields. */
382 struct thread_payload
{
383 uint8_t source_depth_reg
;
384 uint8_t source_w_reg
;
385 uint8_t aa_dest_stencil_reg
;
386 uint8_t dest_depth_reg
;
387 uint8_t sample_pos_reg
;
388 uint8_t sample_mask_in_reg
;
389 uint8_t barycentric_coord_reg
[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT
];
390 uint8_t local_invocation_id_reg
;
392 /** The number of thread payload registers the hardware will supply. */
396 bool source_depth_to_render_target
;
397 bool runtime_check_aads_emit
;
403 fs_reg delta_xy
[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT
];
404 fs_reg shader_start_time
;
405 fs_reg userplane
[MAX_CLIP_PLANES
];
406 fs_reg final_gs_vertex_count
;
407 fs_reg control_data_bits
;
410 bool spilled_any_registers
;
412 const unsigned dispatch_width
; /**< 8 or 16 */
413 unsigned min_dispatch_width
;
415 int shader_time_index
;
417 unsigned promoted_constants
;
422 * The fragment shader code generator.
424 * Translates FS IR to actual i965 assembly code.
429 fs_generator(const struct brw_compiler
*compiler
, void *log_data
,
432 struct brw_stage_prog_data
*prog_data
,
433 unsigned promoted_constants
,
434 bool runtime_check_aads_emit
,
435 gl_shader_stage stage
);
438 void enable_debug(const char *shader_name
);
439 int generate_code(const cfg_t
*cfg
, int dispatch_width
);
440 const unsigned *get_assembly(unsigned int *assembly_size
);
443 void fire_fb_write(fs_inst
*inst
,
444 struct brw_reg payload
,
445 struct brw_reg implied_header
,
447 void generate_fb_write(fs_inst
*inst
, struct brw_reg payload
);
448 void generate_urb_read(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg payload
);
449 void generate_urb_write(fs_inst
*inst
, struct brw_reg payload
);
450 void generate_cs_terminate(fs_inst
*inst
, struct brw_reg payload
);
451 void generate_stencil_ref_packing(fs_inst
*inst
, struct brw_reg dst
,
453 void generate_barrier(fs_inst
*inst
, struct brw_reg src
);
454 void generate_blorp_fb_write(fs_inst
*inst
, struct brw_reg payload
);
455 void generate_linterp(fs_inst
*inst
, struct brw_reg dst
,
456 struct brw_reg
*src
);
457 void generate_tex(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg src
,
458 struct brw_reg surface_index
,
459 struct brw_reg sampler_index
);
460 void generate_get_buffer_size(fs_inst
*inst
, struct brw_reg dst
,
462 struct brw_reg surf_index
);
463 void generate_math_gen6(fs_inst
*inst
,
466 struct brw_reg src1
);
467 void generate_math_gen4(fs_inst
*inst
,
470 void generate_math_g45(fs_inst
*inst
,
473 void generate_ddx(enum opcode op
, struct brw_reg dst
, struct brw_reg src
);
474 void generate_ddy(enum opcode op
, struct brw_reg dst
, struct brw_reg src
,
476 void generate_scratch_write(fs_inst
*inst
, struct brw_reg src
);
477 void generate_scratch_read(fs_inst
*inst
, struct brw_reg dst
);
478 void generate_scratch_read_gen7(fs_inst
*inst
, struct brw_reg dst
);
479 void generate_uniform_pull_constant_load(fs_inst
*inst
, struct brw_reg dst
,
480 struct brw_reg index
,
481 struct brw_reg offset
);
482 void generate_uniform_pull_constant_load_gen7(fs_inst
*inst
,
484 struct brw_reg surf_index
,
485 struct brw_reg offset
);
486 void generate_varying_pull_constant_load(fs_inst
*inst
, struct brw_reg dst
,
487 struct brw_reg index
,
488 struct brw_reg offset
);
489 void generate_varying_pull_constant_load_gen7(fs_inst
*inst
,
491 struct brw_reg index
,
492 struct brw_reg offset
);
493 void generate_mov_dispatch_to_flags(fs_inst
*inst
);
495 void generate_pixel_interpolator_query(fs_inst
*inst
,
498 struct brw_reg msg_data
,
501 void generate_set_sample_id(fs_inst
*inst
,
504 struct brw_reg src1
);
506 void generate_set_simd4x2_offset(fs_inst
*inst
,
508 struct brw_reg offset
);
509 void generate_discard_jump(fs_inst
*inst
);
511 void generate_pack_half_2x16_split(fs_inst
*inst
,
515 void generate_unpack_half_2x16_split(fs_inst
*inst
,
519 void generate_shader_time_add(fs_inst
*inst
,
520 struct brw_reg payload
,
521 struct brw_reg offset
,
522 struct brw_reg value
);
524 void generate_mov_indirect(fs_inst
*inst
,
527 struct brw_reg indirect_byte_offset
);
529 bool patch_discard_jumps_to_fb_writes();
531 const struct brw_compiler
*compiler
;
532 void *log_data
; /* Passed to compiler->*_log functions */
534 const struct brw_device_info
*devinfo
;
536 struct brw_codegen
*p
;
537 const void * const key
;
538 struct brw_stage_prog_data
* const prog_data
;
540 unsigned dispatch_width
; /**< 8 or 16 */
542 exec_list discard_halt_patches
;
543 unsigned promoted_constants
;
544 bool runtime_check_aads_emit
;
546 const char *shader_name
;
547 gl_shader_stage stage
;
551 bool brw_do_channel_expressions(struct exec_list
*instructions
);
552 bool brw_do_vector_splitting(struct exec_list
*instructions
);