2 * Copyright © 2010 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
30 #include "brw_shader.h"
34 #include <sys/types.h>
36 #include "main/macros.h"
37 #include "main/shaderobj.h"
38 #include "main/uniforms.h"
39 #include "program/prog_parameter.h"
40 #include "program/prog_print.h"
41 #include "program/prog_optimize.h"
42 #include "program/register_allocate.h"
43 #include "program/sampler.h"
44 #include "program/hash_table.h"
45 #include "brw_context.h"
48 #include "brw_shader.h"
50 #include "glsl/glsl_types.h"
64 FIXED_HW_REG
, /* a struct brw_reg */
65 UNIFORM
, /* prog_data->params[reg] */
70 /* Callers of this ralloc-based new need not call delete. It's
71 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
72 static void* operator new(size_t size
, void *ctx
)
76 node
= ralloc_size(ctx
, size
);
88 fs_reg(struct brw_reg fixed_hw_reg
);
89 fs_reg(enum register_file file
, int reg
);
90 fs_reg(enum register_file file
, int reg
, uint32_t type
);
91 fs_reg(class fs_visitor
*v
, const struct glsl_type
*type
);
93 bool equals(const fs_reg
&r
) const;
97 /** Register file: ARF, GRF, MRF, IMM. */
98 enum register_file file
;
100 * Register number. For ARF/MRF, it's the hardware register. For
101 * GRF, it's a virtual register number until register allocation
105 * For virtual registers, this is a hardware register offset from
106 * the start of the register block (for example, a constant index
107 * in an array access).
110 /** Register type. BRW_REGISTER_TYPE_* */
115 struct brw_reg fixed_hw_reg
;
116 int smear
; /* -1, or a channel of the reg to smear to all channels. */
118 /** Value for file == IMM */
128 static const fs_reg reg_undef
;
129 static const fs_reg
reg_null_f(ARF
, BRW_ARF_NULL
, BRW_REGISTER_TYPE_F
);
130 static const fs_reg
reg_null_d(ARF
, BRW_ARF_NULL
, BRW_REGISTER_TYPE_D
);
132 class ip_record
: public exec_node
{
134 static void* operator new(size_t size
, void *ctx
)
138 node
= rzalloc_size(ctx
, size
);
139 assert(node
!= NULL
);
152 class fs_inst
: public backend_instruction
{
154 /* Callers of this ralloc-based new need not call delete. It's
155 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
156 static void* operator new(size_t size
, void *ctx
)
160 node
= rzalloc_size(ctx
, size
);
161 assert(node
!= NULL
);
169 fs_inst(enum opcode opcode
);
170 fs_inst(enum opcode opcode
, fs_reg dst
);
171 fs_inst(enum opcode opcode
, fs_reg dst
, fs_reg src0
);
172 fs_inst(enum opcode opcode
, fs_reg dst
, fs_reg src0
, fs_reg src1
);
173 fs_inst(enum opcode opcode
, fs_reg dst
,
174 fs_reg src0
, fs_reg src1
,fs_reg src2
);
176 bool equals(fs_inst
*inst
);
178 bool overwrites_reg(const fs_reg
®
);
181 bool is_control_flow();
182 bool is_send_from_grf();
187 int conditional_mod
; /**< BRW_CONDITIONAL_* */
189 /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional
190 * mod and predication.
194 int mlen
; /**< SEND message length */
195 int base_mrf
; /**< First MRF in the SEND message, if mlen is nonzero. */
196 uint32_t texture_offset
; /**< Texture offset bitfield */
198 int target
; /**< MRT target. */
202 bool force_uncompressed
;
204 bool force_writemask_all
;
205 uint32_t offset
; /* spill/unspill offset */
208 * Annotation for the generated IR. One of the two can be set.
211 const char *annotation
;
216 * The fragment shader front-end.
218 * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
220 class fs_visitor
: public backend_visitor
224 fs_visitor(struct brw_context
*brw
,
225 struct brw_wm_compile
*c
,
226 struct gl_shader_program
*prog
,
227 struct gl_fragment_program
*fp
,
228 unsigned dispatch_width
);
231 fs_reg
*variable_storage(ir_variable
*var
);
232 int virtual_grf_alloc(int size
);
233 void import_uniforms(fs_visitor
*v
);
235 void visit(ir_variable
*ir
);
236 void visit(ir_assignment
*ir
);
237 void visit(ir_dereference_variable
*ir
);
238 void visit(ir_dereference_record
*ir
);
239 void visit(ir_dereference_array
*ir
);
240 void visit(ir_expression
*ir
);
241 void visit(ir_texture
*ir
);
242 void visit(ir_if
*ir
);
243 void visit(ir_constant
*ir
);
244 void visit(ir_swizzle
*ir
);
245 void visit(ir_return
*ir
);
246 void visit(ir_loop
*ir
);
247 void visit(ir_loop_jump
*ir
);
248 void visit(ir_discard
*ir
);
249 void visit(ir_call
*ir
);
250 void visit(ir_function
*ir
);
251 void visit(ir_function_signature
*ir
);
253 void swizzle_result(ir_texture
*ir
, fs_reg orig_val
, int sampler
);
255 bool can_do_source_mods(fs_inst
*inst
);
257 fs_inst
*emit(fs_inst inst
);
258 fs_inst
*emit(fs_inst
*inst
);
259 void emit(exec_list list
);
261 fs_inst
*emit(enum opcode opcode
);
262 fs_inst
*emit(enum opcode opcode
, fs_reg dst
);
263 fs_inst
*emit(enum opcode opcode
, fs_reg dst
, fs_reg src0
);
264 fs_inst
*emit(enum opcode opcode
, fs_reg dst
, fs_reg src0
, fs_reg src1
);
265 fs_inst
*emit(enum opcode opcode
, fs_reg dst
,
266 fs_reg src0
, fs_reg src1
, fs_reg src2
);
268 fs_inst
*MOV(fs_reg dst
, fs_reg src
);
269 fs_inst
*NOT(fs_reg dst
, fs_reg src
);
270 fs_inst
*RNDD(fs_reg dst
, fs_reg src
);
271 fs_inst
*RNDE(fs_reg dst
, fs_reg src
);
272 fs_inst
*RNDZ(fs_reg dst
, fs_reg src
);
273 fs_inst
*FRC(fs_reg dst
, fs_reg src
);
274 fs_inst
*ADD(fs_reg dst
, fs_reg src0
, fs_reg src1
);
275 fs_inst
*MUL(fs_reg dst
, fs_reg src0
, fs_reg src1
);
276 fs_inst
*MACH(fs_reg dst
, fs_reg src0
, fs_reg src1
);
277 fs_inst
*MAC(fs_reg dst
, fs_reg src0
, fs_reg src1
);
278 fs_inst
*SHL(fs_reg dst
, fs_reg src0
, fs_reg src1
);
279 fs_inst
*SHR(fs_reg dst
, fs_reg src0
, fs_reg src1
);
280 fs_inst
*ASR(fs_reg dst
, fs_reg src0
, fs_reg src1
);
281 fs_inst
*AND(fs_reg dst
, fs_reg src0
, fs_reg src1
);
282 fs_inst
*OR(fs_reg dst
, fs_reg src0
, fs_reg src1
);
283 fs_inst
*XOR(fs_reg dst
, fs_reg src0
, fs_reg src1
);
284 fs_inst
*IF(uint32_t predicate
);
285 fs_inst
*IF(fs_reg src0
, fs_reg src1
, uint32_t condition
);
286 fs_inst
*CMP(fs_reg dst
, fs_reg src0
, fs_reg src1
,
288 fs_inst
*LRP(fs_reg dst
, fs_reg a
, fs_reg y
, fs_reg x
);
289 fs_inst
*DEP_RESOLVE_MOV(int grf
);
291 int type_size(const struct glsl_type
*type
);
292 fs_inst
*get_instruction_generating_reg(fs_inst
*start
,
296 exec_list
VARYING_PULL_CONSTANT_LOAD(fs_reg dst
, fs_reg surf_index
,
300 void setup_payload_gen4();
301 void setup_payload_gen6();
302 void assign_curb_setup();
303 void calculate_urb_setup();
304 void assign_urb_setup();
306 void assign_regs_trivial();
307 void setup_payload_interference(struct ra_graph
*g
, int payload_reg_count
,
308 int first_payload_node
);
309 void setup_mrf_hack_interference(struct ra_graph
*g
,
310 int first_mrf_hack_node
);
311 int choose_spill_reg(struct ra_graph
*g
);
312 void spill_reg(int spill_reg
);
313 void split_virtual_grfs();
314 void compact_virtual_grfs();
315 void move_uniform_array_access_to_pull_constants();
316 void setup_pull_constants();
317 void calculate_live_intervals();
318 bool opt_algebraic();
320 bool opt_cse_local(bblock_t
*block
, exec_list
*aeb
);
321 bool opt_copy_propagate();
322 bool try_copy_propagate(fs_inst
*inst
, int arg
, acp_entry
*entry
);
323 bool try_constant_propagate(fs_inst
*inst
, acp_entry
*entry
);
324 bool opt_copy_propagate_local(void *mem_ctx
, bblock_t
*block
,
326 bool register_coalesce();
327 bool register_coalesce_2();
328 bool compute_to_mrf();
329 bool dead_code_eliminate();
330 bool remove_dead_constants();
331 bool remove_duplicate_mrf_writes();
332 bool virtual_grf_interferes(int a
, int b
);
333 void schedule_instructions(bool post_reg_alloc
);
334 void insert_gen4_send_dependency_workarounds();
335 void insert_gen4_pre_send_dependency_workarounds(fs_inst
*inst
);
336 void insert_gen4_post_send_dependency_workarounds(fs_inst
*inst
);
337 void fail(const char *msg
, ...);
338 void lower_uniform_pull_constant_loads();
340 void push_force_uncompressed();
341 void pop_force_uncompressed();
342 void push_force_sechalf();
343 void pop_force_sechalf();
345 void emit_dummy_fs();
346 fs_reg
*emit_fragcoord_interpolation(ir_variable
*ir
);
347 fs_inst
*emit_linterp(const fs_reg
&attr
, const fs_reg
&interp
,
348 glsl_interp_qualifier interpolation_mode
,
350 fs_reg
*emit_frontfacing_interpolation(ir_variable
*ir
);
351 fs_reg
*emit_general_interpolation(ir_variable
*ir
);
352 void emit_interpolation_setup_gen4();
353 void emit_interpolation_setup_gen6();
354 fs_reg
rescale_texcoord(ir_texture
*ir
, fs_reg coordinate
,
355 bool is_rect
, int sampler
, int texunit
);
356 fs_inst
*emit_texture_gen4(ir_texture
*ir
, fs_reg dst
, fs_reg coordinate
,
357 fs_reg shadow_comp
, fs_reg lod
, fs_reg lod2
);
358 fs_inst
*emit_texture_gen5(ir_texture
*ir
, fs_reg dst
, fs_reg coordinate
,
359 fs_reg shadow_comp
, fs_reg lod
, fs_reg lod2
,
360 fs_reg sample_index
);
361 fs_inst
*emit_texture_gen7(ir_texture
*ir
, fs_reg dst
, fs_reg coordinate
,
362 fs_reg shadow_comp
, fs_reg lod
, fs_reg lod2
,
363 fs_reg sample_index
);
364 fs_reg
fix_math_operand(fs_reg src
);
365 fs_inst
*emit_math(enum opcode op
, fs_reg dst
, fs_reg src0
);
366 fs_inst
*emit_math(enum opcode op
, fs_reg dst
, fs_reg src0
, fs_reg src1
);
367 void emit_lrp(fs_reg dst
, fs_reg x
, fs_reg y
, fs_reg a
);
368 void emit_minmax(uint32_t conditionalmod
, fs_reg dst
,
369 fs_reg src0
, fs_reg src1
);
370 bool try_emit_saturate(ir_expression
*ir
);
371 bool try_emit_mad(ir_expression
*ir
, int mul_arg
);
372 void emit_bool_to_cond_code(ir_rvalue
*condition
);
373 void emit_if_gen6(ir_if
*ir
);
374 void emit_unspill(fs_inst
*inst
, fs_reg reg
, uint32_t spill_offset
);
376 void emit_fragment_program_code();
377 void setup_fp_regs();
378 fs_reg
get_fp_src_reg(const prog_src_register
*src
);
379 fs_reg
get_fp_dst_reg(const prog_dst_register
*dst
);
380 void emit_fp_alu1(enum opcode opcode
,
381 const struct prog_instruction
*fpi
,
382 fs_reg dst
, fs_reg src
);
383 void emit_fp_alu2(enum opcode opcode
,
384 const struct prog_instruction
*fpi
,
385 fs_reg dst
, fs_reg src0
, fs_reg src1
);
386 void emit_fp_scalar_write(const struct prog_instruction
*fpi
,
387 fs_reg dst
, fs_reg src
);
388 void emit_fp_scalar_math(enum opcode opcode
,
389 const struct prog_instruction
*fpi
,
390 fs_reg dst
, fs_reg src
);
392 void emit_fp_minmax(const struct prog_instruction
*fpi
,
393 fs_reg dst
, fs_reg src0
, fs_reg src1
);
395 void emit_fp_sop(uint32_t conditional_mod
,
396 const struct prog_instruction
*fpi
,
397 fs_reg dst
, fs_reg src0
, fs_reg src1
, fs_reg one
);
399 void emit_color_write(int target
, int index
, int first_color_mrf
);
400 void emit_fb_writes();
402 void emit_shader_time_begin();
403 void emit_shader_time_end();
404 void emit_shader_time_write(enum shader_time_shader_type type
,
407 bool try_rewrite_rhs_to_dst(ir_assignment
*ir
,
410 fs_inst
*pre_rhs_inst
,
411 fs_inst
*last_rhs_inst
);
412 void emit_assignment_writes(fs_reg
&l
, fs_reg
&r
,
413 const glsl_type
*type
, bool predicated
);
414 void resolve_ud_negate(fs_reg
*reg
);
415 void resolve_bool_comparison(ir_rvalue
*rvalue
, fs_reg
*reg
);
417 fs_reg
get_timestamp();
419 struct brw_reg
interp_reg(int location
, int channel
);
420 void setup_uniform_values(ir_variable
*ir
);
421 void setup_builtin_uniform_values(ir_variable
*ir
);
422 int implied_mrf_writes(fs_inst
*inst
);
424 void dump_instructions();
425 void dump_instruction(fs_inst
*inst
);
427 const struct gl_fragment_program
*fp
;
428 struct brw_wm_compile
*c
;
429 unsigned int sanity_param_count
;
431 int param_size
[MAX_UNIFORMS
* 4];
433 int *virtual_grf_sizes
;
434 int virtual_grf_count
;
435 int virtual_grf_array_size
;
436 int *virtual_grf_def
;
437 int *virtual_grf_use
;
438 bool live_intervals_valid
;
440 /* This is the map from UNIFORM hw_reg + reg_offset as generated by
441 * the visitor to the packed uniform number after
442 * remove_dead_constants() that represents the actual uploaded
447 struct hash_table
*variable_ht
;
449 fs_reg outputs
[BRW_MAX_DRAW_BUFFERS
];
450 unsigned output_components
[BRW_MAX_DRAW_BUFFERS
];
451 fs_reg dual_src_output
;
452 int first_non_payload_grf
;
453 /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
455 int urb_setup
[FRAG_ATTRIB_MAX
];
457 fs_reg
*fp_temp_regs
;
458 fs_reg
*fp_input_regs
;
460 /** @{ debug annotation info */
461 const char *current_annotation
;
468 /* Result of last visit() method. */
475 fs_reg delta_x
[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT
];
476 fs_reg delta_y
[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT
];
477 fs_reg shader_start_time
;
481 const unsigned dispatch_width
; /**< 8 or 16 */
483 int force_uncompressed_stack
;
484 int force_sechalf_stack
;
488 * The fragment shader code generator.
490 * Translates FS IR to actual i965 assembly code.
495 fs_generator(struct brw_context
*brw
,
496 struct brw_wm_compile
*c
,
497 struct gl_shader_program
*prog
,
498 struct gl_fragment_program
*fp
,
499 bool dual_source_output
);
502 const unsigned *generate_assembly(exec_list
*simd8_instructions
,
503 exec_list
*simd16_instructions
,
504 unsigned *assembly_size
);
507 void generate_code(exec_list
*instructions
);
508 void generate_fb_write(fs_inst
*inst
);
509 void generate_pixel_xy(struct brw_reg dst
, bool is_x
);
510 void generate_linterp(fs_inst
*inst
, struct brw_reg dst
,
511 struct brw_reg
*src
);
512 void generate_tex(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg src
);
513 void generate_math1_gen7(fs_inst
*inst
,
516 void generate_math2_gen7(fs_inst
*inst
,
519 struct brw_reg src1
);
520 void generate_math1_gen6(fs_inst
*inst
,
523 void generate_math2_gen6(fs_inst
*inst
,
526 struct brw_reg src1
);
527 void generate_math_gen4(fs_inst
*inst
,
530 void generate_ddx(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg src
);
531 void generate_ddy(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg src
,
533 void generate_spill(fs_inst
*inst
, struct brw_reg src
);
534 void generate_unspill(fs_inst
*inst
, struct brw_reg dst
);
535 void generate_uniform_pull_constant_load(fs_inst
*inst
, struct brw_reg dst
,
536 struct brw_reg index
,
537 struct brw_reg offset
);
538 void generate_uniform_pull_constant_load_gen7(fs_inst
*inst
,
540 struct brw_reg surf_index
,
541 struct brw_reg offset
);
542 void generate_varying_pull_constant_load(fs_inst
*inst
, struct brw_reg dst
,
543 struct brw_reg index
);
544 void generate_varying_pull_constant_load_gen7(fs_inst
*inst
,
546 struct brw_reg index
,
547 struct brw_reg offset
);
548 void generate_mov_dispatch_to_flags(fs_inst
*inst
);
549 void generate_set_global_offset(fs_inst
*inst
,
552 struct brw_reg offset
);
553 void generate_discard_jump(fs_inst
*inst
);
555 void generate_pack_half_2x16_split(fs_inst
*inst
,
559 void generate_unpack_half_2x16_split(fs_inst
*inst
,
563 void patch_discard_jumps_to_fb_writes();
565 struct brw_context
*brw
;
566 struct intel_context
*intel
;
567 struct gl_context
*ctx
;
569 struct brw_compile
*p
;
570 struct brw_wm_compile
*c
;
572 struct gl_shader_program
*prog
;
573 struct gl_shader
*shader
;
574 const struct gl_fragment_program
*fp
;
576 unsigned dispatch_width
; /**< 8 or 16 */
578 exec_list discard_halt_patches
;
579 bool dual_source_output
;
583 bool brw_do_channel_expressions(struct exec_list
*instructions
);
584 bool brw_do_vector_splitting(struct exec_list
*instructions
);
585 bool brw_fs_precompile(struct gl_context
*ctx
, struct gl_shader_program
*prog
);