src/mesa/drivers/dri/i965/brw_fs.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #pragma once
  29
  30 #include "brw_shader.h"
  31
  32 extern "C" {
  33
  34 #include <sys/types.h>
  35
  36 #include "main/macros.h"
  37 #include "main/shaderobj.h"
  38 #include "main/uniforms.h"
  39 #include "program/prog_parameter.h"
  40 #include "program/prog_print.h"
  41 #include "program/prog_optimize.h"
  42 #include "program/register_allocate.h"
  43 #include "program/sampler.h"
  44 #include "program/hash_table.h"
  45 #include "brw_context.h"
  46 #include "brw_eu.h"
  47 #include "brw_wm.h"
  48 #include "brw_shader.h"
  49 #include "intel_asm_printer.h"
  50 }
  51 #include "gen8_generator.h"
  52 #include "glsl/glsl_types.h"
  53 #include "glsl/ir.h"
  54
  55 #define MAX_SAMPLER_MESSAGE_SIZE 11
  56
  57 struct bblock_t;
  58 namespace {
  59    struct acp_entry;
  60 }
  61
  62 namespace brw {
  63    class fs_live_variables;
  64 }
  65
  66 class fs_reg : public backend_reg {
  67 public:
  68    DECLARE_RALLOC_CXX_OPERATORS(fs_reg)
  69
  70    void init();
  71
  72    fs_reg();
  73    fs_reg(float f);
  74    fs_reg(int32_t i);
  75    fs_reg(uint32_t u);
  76    fs_reg(struct brw_reg fixed_hw_reg);
  77    fs_reg(enum register_file file, int reg);
  78    fs_reg(enum register_file file, int reg, uint32_t type);
  79    fs_reg(class fs_visitor *v, const struct glsl_type *type);
  80
  81    bool equals(const fs_reg &r) const;
  82    bool is_valid_3src() const;
  83    bool is_contiguous() const;
  84
  85    fs_reg &apply_stride(unsigned stride);
  86    /** Smear a channel of the reg to all channels. */
  87    fs_reg &set_smear(unsigned subreg);
  88
  89    /**
  90     * Offset in bytes from the start of the register.  Values up to a
  91     * backend_reg::reg_offset unit are valid.
  92     */
  93    int subreg_offset;
  94
  95    fs_reg *reladdr;
  96
  97    /** Register region horizontal stride */
  98    uint8_t stride;
  99 };
 100
 101 static inline fs_reg
 102 retype(fs_reg reg, unsigned type)
 103 {
 104    reg.fixed_hw_reg.type = reg.type = type;
 105    return reg;
 106 }
 107
 108 static inline fs_reg
 109 offset(fs_reg reg, unsigned delta)
 110 {
 111    assert(delta == 0 || (reg.file != HW_REG && reg.file != IMM));
 112    reg.reg_offset += delta;
 113    return reg;
 114 }
 115
 116 static inline fs_reg
 117 byte_offset(fs_reg reg, unsigned delta)
 118 {
 119    assert(delta == 0 || (reg.file != HW_REG && reg.file != IMM));
 120    reg.subreg_offset += delta;
 121    return reg;
 122 }
 123
 124 /**
 125  * Get either of the 8-component halves of a 16-component register.
 126  *
 127  * Note: this also works if \c reg represents a SIMD16 pair of registers.
 128  */
 129 static inline fs_reg
 130 half(const fs_reg &reg, unsigned idx)
 131 {
 132    assert(idx < 2);
 133    assert(idx == 0 || (reg.file != HW_REG && reg.file != IMM));
 134    return byte_offset(reg, 8 * idx * reg.stride * type_sz(reg.type));
 135 }
 136
 137 static const fs_reg reg_undef;
 138 static const fs_reg reg_null_f(retype(brw_null_reg(), BRW_REGISTER_TYPE_F));
 139 static const fs_reg reg_null_d(retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
 140 static const fs_reg reg_null_ud(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD));
 141
 142 class ip_record : public exec_node {
 143 public:
 144    DECLARE_RALLOC_CXX_OPERATORS(ip_record)
 145
 146    ip_record(int ip)
 147    {
 148       this->ip = ip;
 149    }
 150
 151    int ip;
 152 };
 153
 154 class fs_inst : public backend_instruction {
 155    fs_inst &operator=(const fs_inst &);
 156
 157 public:
 158    DECLARE_RALLOC_CXX_OPERATORS(fs_inst)
 159
 160    void init(enum opcode opcode, const fs_reg &dst, fs_reg *src, int sources);
 161
 162    fs_inst(enum opcode opcode = BRW_OPCODE_NOP, const fs_reg &dst = reg_undef);
 163    fs_inst(enum opcode opcode, const fs_reg &dst, const fs_reg &src0);
 164    fs_inst(enum opcode opcode, const fs_reg &dst, const fs_reg &src0,
 165            const fs_reg &src1);
 166    fs_inst(enum opcode opcode, const fs_reg &dst, const fs_reg &src0,
 167            const fs_reg &src1, const fs_reg &src2);
 168    fs_inst(enum opcode opcode, const fs_reg &dst, fs_reg src[], int sources);
 169    fs_inst(const fs_inst &that);
 170
 171    void resize_sources(uint8_t num_sources);
 172
 173    bool equals(fs_inst *inst) const;
 174    bool overwrites_reg(const fs_reg &reg) const;
 175    bool is_send_from_grf() const;
 176    bool is_partial_write() const;
 177    int regs_read(fs_visitor *v, int arg) const;
 178    bool can_do_source_mods(struct brw_context *brw);
 179
 180    bool reads_flag() const;
 181    bool writes_flag() const;
 182
 183    fs_reg dst;
 184    fs_reg *src;
 185
 186    uint32_t texture_offset; /**< Texture offset bitfield */
 187    uint32_t offset; /* spill/unspill offset */
 188
 189    uint8_t sources; /**< Number of fs_reg sources. */
 190    uint8_t conditional_mod; /**< BRW_CONDITIONAL_* */
 191
 192    /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional
 193     * mod and predication.
 194     */
 195    uint8_t flag_subreg;
 196
 197    uint8_t mlen; /**< SEND message length */
 198    uint8_t regs_written; /**< Number of vgrfs written by a SEND message, or 1 */
 199    int8_t base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
 200    uint8_t sampler;
 201    uint8_t target; /**< MRT target. */
 202    bool saturate:1;
 203    bool eot:1;
 204    bool header_present:1;
 205    bool shadow_compare:1;
 206    bool force_uncompressed:1;
 207    bool force_sechalf:1;
 208    bool force_writemask_all:1;
 209    bool no_dd_clear:1;
 210    bool no_dd_check:1;
 211 };
 212
 213 /**
 214  * The fragment shader front-end.
 215  *
 216  * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
 217  */
 218 class fs_visitor : public backend_visitor
 219 {
 220 public:
 221
 222    fs_visitor(struct brw_context *brw,
 223               void *mem_ctx,
 224               const struct brw_wm_prog_key *key,
 225               struct brw_wm_prog_data *prog_data,
 226               struct gl_shader_program *shader_prog,
 227               struct gl_fragment_program *fp,
 228               unsigned dispatch_width);
 229    ~fs_visitor();
 230
 231    fs_reg *variable_storage(ir_variable *var);
 232    int virtual_grf_alloc(int size);
 233    void import_uniforms(fs_visitor *v);
 234
 235    void visit(ir_variable *ir);
 236    void visit(ir_assignment *ir);
 237    void visit(ir_dereference_variable *ir);
 238    void visit(ir_dereference_record *ir);
 239    void visit(ir_dereference_array *ir);
 240    void visit(ir_expression *ir);
 241    void visit(ir_texture *ir);
 242    void visit(ir_if *ir);
 243    void visit(ir_constant *ir);
 244    void visit(ir_swizzle *ir);
 245    void visit(ir_return *ir);
 246    void visit(ir_loop *ir);
 247    void visit(ir_loop_jump *ir);
 248    void visit(ir_discard *ir);
 249    void visit(ir_call *ir);
 250    void visit(ir_function *ir);
 251    void visit(ir_function_signature *ir);
 252    void visit(ir_emit_vertex *);
 253    void visit(ir_end_primitive *);
 254
 255    uint32_t gather_channel(ir_texture *ir, int sampler);
 256    void swizzle_result(ir_texture *ir, fs_reg orig_val, int sampler);
 257
 258    fs_inst *emit(fs_inst *inst);
 259    void emit(exec_list list);
 260
 261    fs_inst *emit(enum opcode opcode);
 262    fs_inst *emit(enum opcode opcode, const fs_reg &dst);
 263    fs_inst *emit(enum opcode opcode, const fs_reg &dst, const fs_reg &src0);
 264    fs_inst *emit(enum opcode opcode, const fs_reg &dst, const fs_reg &src0,
 265                  const fs_reg &src1);
 266    fs_inst *emit(enum opcode opcode, const fs_reg &dst,
 267                  const fs_reg &src0, const fs_reg &src1, const fs_reg &src2);
 268    fs_inst *emit(enum opcode opcode, const fs_reg &dst,
 269                  fs_reg src[], int sources);
 270
 271    fs_inst *MOV(const fs_reg &dst, const fs_reg &src);
 272    fs_inst *NOT(const fs_reg &dst, const fs_reg &src);
 273    fs_inst *RNDD(const fs_reg &dst, const fs_reg &src);
 274    fs_inst *RNDE(const fs_reg &dst, const fs_reg &src);
 275    fs_inst *RNDZ(const fs_reg &dst, const fs_reg &src);
 276    fs_inst *FRC(const fs_reg &dst, const fs_reg &src);
 277    fs_inst *ADD(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 278    fs_inst *MUL(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 279    fs_inst *MACH(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 280    fs_inst *MAC(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 281    fs_inst *SHL(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 282    fs_inst *SHR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 283    fs_inst *ASR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 284    fs_inst *AND(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 285    fs_inst *OR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 286    fs_inst *XOR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 287    fs_inst *IF(uint32_t predicate);
 288    fs_inst *IF(const fs_reg &src0, const fs_reg &src1, uint32_t condition);
 289    fs_inst *CMP(fs_reg dst, fs_reg src0, fs_reg src1,
 290                 uint32_t condition);
 291    fs_inst *LRP(const fs_reg &dst, const fs_reg &a, const fs_reg &y,
 292                 const fs_reg &x);
 293    fs_inst *DEP_RESOLVE_MOV(int grf);
 294    fs_inst *BFREV(const fs_reg &dst, const fs_reg &value);
 295    fs_inst *BFE(const fs_reg &dst, const fs_reg &bits, const fs_reg &offset,
 296                 const fs_reg &value);
 297    fs_inst *BFI1(const fs_reg &dst, const fs_reg &bits, const fs_reg &offset);
 298    fs_inst *BFI2(const fs_reg &dst, const fs_reg &bfi1_dst,
 299                  const fs_reg &insert, const fs_reg &base);
 300    fs_inst *FBH(const fs_reg &dst, const fs_reg &value);
 301    fs_inst *FBL(const fs_reg &dst, const fs_reg &value);
 302    fs_inst *CBIT(const fs_reg &dst, const fs_reg &value);
 303    fs_inst *MAD(const fs_reg &dst, const fs_reg &c, const fs_reg &b,
 304                 const fs_reg &a);
 305    fs_inst *ADDC(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 306    fs_inst *SUBB(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 307    fs_inst *SEL(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 308
 309    int type_size(const struct glsl_type *type);
 310    fs_inst *get_instruction_generating_reg(fs_inst *start,
 311                                            fs_inst *end,
 312                                            const fs_reg &reg);
 313
 314    fs_inst *LOAD_PAYLOAD(const fs_reg &dst, fs_reg *src, int sources);
 315
 316    exec_list VARYING_PULL_CONSTANT_LOAD(const fs_reg &dst,
 317                                         const fs_reg &surf_index,
 318                                         const fs_reg &varying_offset,
 319                                         uint32_t const_offset);
 320
 321    bool run();
 322    void assign_binding_table_offsets();
 323    void setup_payload_gen4();
 324    void setup_payload_gen6();
 325    void assign_curb_setup();
 326    void calculate_urb_setup();
 327    void assign_urb_setup();
 328    bool assign_regs(bool allow_spilling);
 329    void assign_regs_trivial();
 330    void get_used_mrfs(bool *mrf_used);
 331    void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
 332                                    int first_payload_node);
 333    void setup_mrf_hack_interference(struct ra_graph *g,
 334                                     int first_mrf_hack_node);
 335    int choose_spill_reg(struct ra_graph *g);
 336    void spill_reg(int spill_reg);
 337    void split_virtual_grfs();
 338    void compact_virtual_grfs();
 339    void move_uniform_array_access_to_pull_constants();
 340    void assign_constant_locations();
 341    void demote_pull_constants();
 342    void invalidate_live_intervals();
 343    void calculate_live_intervals(const cfg_t *cfg = NULL);
 344    void calculate_register_pressure();
 345    bool opt_algebraic();
 346    bool opt_cse();
 347    bool opt_cse_local(bblock_t *block, exec_list *aeb);
 348    bool opt_copy_propagate();
 349    bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
 350    bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
 351                                  exec_list *acp);
 352    void opt_drop_redundant_mov_to_flags();
 353    bool register_coalesce();
 354    bool compute_to_mrf();
 355    bool dead_code_eliminate();
 356    bool remove_duplicate_mrf_writes();
 357    bool virtual_grf_interferes(int a, int b);
 358    void schedule_instructions(instruction_scheduler_mode mode);
 359    void insert_gen4_send_dependency_workarounds();
 360    void insert_gen4_pre_send_dependency_workarounds(fs_inst *inst);
 361    void insert_gen4_post_send_dependency_workarounds(fs_inst *inst);
 362    void vfail(const char *msg, va_list args);
 363    void fail(const char *msg, ...);
 364    void no16(const char *msg, ...);
 365    void lower_uniform_pull_constant_loads();
 366    bool lower_load_payload();
 367
 368    void push_force_uncompressed();
 369    void pop_force_uncompressed();
 370
 371    void emit_dummy_fs();
 372    fs_reg *emit_fragcoord_interpolation(ir_variable *ir);
 373    fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
 374                          glsl_interp_qualifier interpolation_mode,
 375                          bool is_centroid, bool is_sample);
 376    fs_reg *emit_frontfacing_interpolation(ir_variable *ir);
 377    fs_reg *emit_samplepos_setup(ir_variable *ir);
 378    fs_reg *emit_sampleid_setup(ir_variable *ir);
 379    fs_reg *emit_general_interpolation(ir_variable *ir);
 380    void emit_interpolation_setup_gen4();
 381    void emit_interpolation_setup_gen6();
 382    void compute_sample_position(fs_reg dst, fs_reg int_sample_pos);
 383    fs_reg rescale_texcoord(ir_texture *ir, fs_reg coordinate,
 384                            bool is_rect, int sampler, int texunit);
 385    fs_inst *emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 386                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2);
 387    fs_inst *emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 388                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
 389                               fs_reg sample_index);
 390    fs_inst *emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 391                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
 392                               fs_reg sample_index, fs_reg mcs, int sampler);
 393    fs_reg emit_mcs_fetch(ir_texture *ir, fs_reg coordinate, int sampler);
 394    void emit_gen6_gather_wa(uint8_t wa, fs_reg dst);
 395    fs_reg fix_math_operand(fs_reg src);
 396    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0);
 397    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0, fs_reg src1);
 398    void emit_lrp(const fs_reg &dst, const fs_reg &x, const fs_reg &y,
 399                  const fs_reg &a);
 400    void emit_minmax(uint32_t conditionalmod, const fs_reg &dst,
 401                     const fs_reg &src0, const fs_reg &src1);
 402    bool try_emit_saturate(ir_expression *ir);
 403    bool try_emit_mad(ir_expression *ir);
 404    void try_replace_with_sel();
 405    bool opt_peephole_sel();
 406    bool opt_peephole_predicated_break();
 407    bool opt_saturate_propagation();
 408    void emit_bool_to_cond_code(ir_rvalue *condition);
 409    void emit_if_gen6(ir_if *ir);
 410    void emit_unspill(fs_inst *inst, fs_reg reg, uint32_t spill_offset,
 411                      int count);
 412
 413    void emit_fragment_program_code();
 414    void setup_fp_regs();
 415    fs_reg get_fp_src_reg(const prog_src_register *src);
 416    fs_reg get_fp_dst_reg(const prog_dst_register *dst);
 417    void emit_fp_alu1(enum opcode opcode,
 418                      const struct prog_instruction *fpi,
 419                      fs_reg dst, fs_reg src);
 420    void emit_fp_alu2(enum opcode opcode,
 421                      const struct prog_instruction *fpi,
 422                      fs_reg dst, fs_reg src0, fs_reg src1);
 423    void emit_fp_scalar_write(const struct prog_instruction *fpi,
 424                              fs_reg dst, fs_reg src);
 425    void emit_fp_scalar_math(enum opcode opcode,
 426                             const struct prog_instruction *fpi,
 427                             fs_reg dst, fs_reg src);
 428
 429    void emit_fp_minmax(const struct prog_instruction *fpi,
 430                        fs_reg dst, fs_reg src0, fs_reg src1);
 431
 432    void emit_fp_sop(uint32_t conditional_mod,
 433                     const struct prog_instruction *fpi,
 434                     fs_reg dst, fs_reg src0, fs_reg src1, fs_reg one);
 435
 436    void emit_color_write(int target, int index, int first_color_mrf);
 437    void emit_alpha_test();
 438    void emit_fb_writes();
 439
 440    void emit_shader_time_begin();
 441    void emit_shader_time_end();
 442    void emit_shader_time_write(enum shader_time_shader_type type,
 443                                fs_reg value);
 444
 445    void emit_untyped_atomic(unsigned atomic_op, unsigned surf_index,
 446                             fs_reg dst, fs_reg offset, fs_reg src0,
 447                             fs_reg src1);
 448
 449    void emit_untyped_surface_read(unsigned surf_index, fs_reg dst,
 450                                   fs_reg offset);
 451
 452    bool try_rewrite_rhs_to_dst(ir_assignment *ir,
 453                                fs_reg dst,
 454                                fs_reg src,
 455                                fs_inst *pre_rhs_inst,
 456                                fs_inst *last_rhs_inst);
 457    void emit_assignment_writes(fs_reg &l, fs_reg &r,
 458                                const glsl_type *type, bool predicated);
 459    void resolve_ud_negate(fs_reg *reg);
 460    void resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg);
 461
 462    fs_reg get_timestamp();
 463
 464    struct brw_reg interp_reg(int location, int channel);
 465    void setup_uniform_values(ir_variable *ir);
 466    void setup_builtin_uniform_values(ir_variable *ir);
 467    int implied_mrf_writes(fs_inst *inst);
 468
 469    virtual void dump_instructions();
 470    virtual void dump_instructions(const char *name);
 471    void dump_instruction(backend_instruction *inst);
 472    void dump_instruction(backend_instruction *inst, FILE *file);
 473
 474    void visit_atomic_counter_intrinsic(ir_call *ir);
 475
 476    struct gl_fragment_program *fp;
 477    const struct brw_wm_prog_key *const key;
 478    struct brw_wm_prog_data *prog_data;
 479    unsigned int sanity_param_count;
 480
 481    int *param_size;
 482
 483    int *virtual_grf_sizes;
 484    int virtual_grf_count;
 485    int virtual_grf_array_size;
 486    int *virtual_grf_start;
 487    int *virtual_grf_end;
 488    brw::fs_live_variables *live_intervals;
 489
 490    int *regs_live_at_ip;
 491
 492    /** Number of uniform variable components visited. */
 493    unsigned uniforms;
 494
 495    /** Byte-offset for the next available spot in the scratch space buffer. */
 496    unsigned last_scratch;
 497
 498    /**
 499     * Array mapping UNIFORM register numbers to the pull parameter index,
 500     * or -1 if this uniform register isn't being uploaded as a pull constant.
 501     */
 502    int *pull_constant_loc;
 503
 504    /**
 505     * Array mapping UNIFORM register numbers to the push parameter index,
 506     * or -1 if this uniform register isn't being uploaded as a push constant.
 507     */
 508    int *push_constant_loc;
 509
 510    struct hash_table *variable_ht;
 511    fs_reg frag_depth;
 512    fs_reg sample_mask;
 513    fs_reg outputs[BRW_MAX_DRAW_BUFFERS];
 514    unsigned output_components[BRW_MAX_DRAW_BUFFERS];
 515    fs_reg dual_src_output;
 516    bool do_dual_src;
 517    int first_non_payload_grf;
 518    /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
 519    int max_grf;
 520
 521    fs_reg *fp_temp_regs;
 522    fs_reg *fp_input_regs;
 523
 524    /** @{ debug annotation info */
 525    const char *current_annotation;
 526    const void *base_ir;
 527    /** @} */
 528
 529    bool failed;
 530    char *fail_msg;
 531    bool simd16_unsupported;
 532    char *no16_msg;
 533
 534    /* Result of last visit() method. */
 535    fs_reg result;
 536
 537    /** Register numbers for thread payload fields. */
 538    struct {
 539       uint8_t source_depth_reg;
 540       uint8_t source_w_reg;
 541       uint8_t aa_dest_stencil_reg;
 542       uint8_t dest_depth_reg;
 543       uint8_t sample_pos_reg;
 544       uint8_t sample_mask_in_reg;
 545       uint8_t barycentric_coord_reg[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 546
 547       /** The number of thread payload registers the hardware will supply. */
 548       uint8_t num_regs;
 549    } payload;
 550
 551    bool source_depth_to_render_target;
 552    bool runtime_check_aads_emit;
 553
 554    fs_reg pixel_x;
 555    fs_reg pixel_y;
 556    fs_reg wpos_w;
 557    fs_reg pixel_w;
 558    fs_reg delta_x[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 559    fs_reg delta_y[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 560    fs_reg shader_start_time;
 561
 562    int grf_used;
 563    bool spilled_any_registers;
 564
 565    const unsigned dispatch_width; /**< 8 or 16 */
 566
 567    int force_uncompressed_stack;
 568 };
 569
 570 /**
 571  * The fragment shader code generator.
 572  *
 573  * Translates FS IR to actual i965 assembly code.
 574  */
 575 class fs_generator
 576 {
 577 public:
 578    fs_generator(struct brw_context *brw,
 579                 void *mem_ctx,
 580                 const struct brw_wm_prog_key *key,
 581                 struct brw_wm_prog_data *prog_data,
 582                 struct gl_shader_program *prog,
 583                 struct gl_fragment_program *fp,
 584                 bool dual_source_output,
 585                 bool runtime_check_aads_emit,
 586                 bool debug_flag);
 587    ~fs_generator();
 588
 589    const unsigned *generate_assembly(exec_list *simd8_instructions,
 590                                      exec_list *simd16_instructions,
 591                                      unsigned *assembly_size);
 592
 593 private:
 594    void generate_code(exec_list *instructions);
 595    void fire_fb_write(fs_inst *inst,
 596                       GLuint base_reg,
 597                       struct brw_reg implied_header,
 598                       GLuint nr);
 599    void generate_fb_write(fs_inst *inst);
 600    void generate_blorp_fb_write(fs_inst *inst);
 601    void generate_pixel_xy(struct brw_reg dst, bool is_x);
 602    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 603                          struct brw_reg *src);
 604    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 605    void generate_math_gen6(fs_inst *inst,
 606                            struct brw_reg dst,
 607                            struct brw_reg src0,
 608                            struct brw_reg src1);
 609    void generate_math_gen4(fs_inst *inst,
 610                            struct brw_reg dst,
 611                            struct brw_reg src);
 612    void generate_math_g45(fs_inst *inst,
 613                           struct brw_reg dst,
 614                           struct brw_reg src);
 615    void generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 616    void generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 617                      bool negate_value);
 618    void generate_scratch_write(fs_inst *inst, struct brw_reg src);
 619    void generate_scratch_read(fs_inst *inst, struct brw_reg dst);
 620    void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst);
 621    void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 622                                             struct brw_reg index,
 623                                             struct brw_reg offset);
 624    void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
 625                                                  struct brw_reg dst,
 626                                                  struct brw_reg surf_index,
 627                                                  struct brw_reg offset);
 628    void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 629                                             struct brw_reg index,
 630                                             struct brw_reg offset);
 631    void generate_varying_pull_constant_load_gen7(fs_inst *inst,
 632                                                  struct brw_reg dst,
 633                                                  struct brw_reg index,
 634                                                  struct brw_reg offset);
 635    void generate_mov_dispatch_to_flags(fs_inst *inst);
 636
 637    void generate_set_omask(fs_inst *inst,
 638                            struct brw_reg dst,
 639                            struct brw_reg sample_mask);
 640
 641    void generate_set_sample_id(fs_inst *inst,
 642                                struct brw_reg dst,
 643                                struct brw_reg src0,
 644                                struct brw_reg src1);
 645
 646    void generate_set_simd4x2_offset(fs_inst *inst,
 647                                     struct brw_reg dst,
 648                                     struct brw_reg offset);
 649    void generate_discard_jump(fs_inst *inst);
 650
 651    void generate_pack_half_2x16_split(fs_inst *inst,
 652                                       struct brw_reg dst,
 653                                       struct brw_reg x,
 654                                       struct brw_reg y);
 655    void generate_unpack_half_2x16_split(fs_inst *inst,
 656                                         struct brw_reg dst,
 657                                         struct brw_reg src);
 658
 659    void generate_shader_time_add(fs_inst *inst,
 660                                  struct brw_reg payload,
 661                                  struct brw_reg offset,
 662                                  struct brw_reg value);
 663
 664    void generate_untyped_atomic(fs_inst *inst,
 665                                 struct brw_reg dst,
 666                                 struct brw_reg atomic_op,
 667                                 struct brw_reg surf_index);
 668
 669    void generate_untyped_surface_read(fs_inst *inst,
 670                                       struct brw_reg dst,
 671                                       struct brw_reg surf_index);
 672
 673    bool patch_discard_jumps_to_fb_writes();
 674
 675    struct brw_context *brw;
 676    struct gl_context *ctx;
 677
 678    struct brw_compile *p;
 679    const struct brw_wm_prog_key *const key;
 680    struct brw_wm_prog_data *prog_data;
 681
 682    struct gl_shader_program *prog;
 683    const struct gl_fragment_program *fp;
 684
 685    unsigned dispatch_width; /**< 8 or 16 */
 686
 687    exec_list discard_halt_patches;
 688    bool dual_source_output;
 689    bool runtime_check_aads_emit;
 690    const bool debug_flag;
 691    void *mem_ctx;
 692 };
 693
 694 /**
 695  * The fragment shader code generator.
 696  *
 697  * Translates FS IR to actual i965 assembly code.
 698  */
 699 class gen8_fs_generator : public gen8_generator
 700 {
 701 public:
 702    gen8_fs_generator(struct brw_context *brw,
 703                      void *mem_ctx,
 704                      const struct brw_wm_prog_key *key,
 705                      struct brw_wm_prog_data *prog_data,
 706                      struct gl_shader_program *prog,
 707                      struct gl_fragment_program *fp,
 708                      bool dual_source_output);
 709    ~gen8_fs_generator();
 710
 711    const unsigned *generate_assembly(exec_list *simd8_instructions,
 712                                      exec_list *simd16_instructions,
 713                                      unsigned *assembly_size);
 714
 715 private:
 716    void generate_code(exec_list *instructions);
 717    void generate_fb_write(fs_inst *inst);
 718    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 719                          struct brw_reg *src);
 720    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 721    void generate_math1(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 722    void generate_math2(fs_inst *inst, struct brw_reg dst,
 723                        struct brw_reg src0, struct brw_reg src1);
 724    void generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 725    void generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 726                      bool negate_value);
 727    void generate_scratch_write(fs_inst *inst, struct brw_reg src);
 728    void generate_scratch_read(fs_inst *inst, struct brw_reg dst);
 729    void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst);
 730    void generate_uniform_pull_constant_load(fs_inst *inst,
 731                                             struct brw_reg dst,
 732                                             struct brw_reg index,
 733                                             struct brw_reg offset);
 734    void generate_varying_pull_constant_load(fs_inst *inst,
 735                                             struct brw_reg dst,
 736                                             struct brw_reg index,
 737                                             struct brw_reg offset);
 738    void generate_mov_dispatch_to_flags(fs_inst *ir);
 739    void generate_set_omask(fs_inst *ir,
 740                            struct brw_reg dst,
 741                            struct brw_reg sample_mask);
 742    void generate_set_sample_id(fs_inst *ir,
 743                                struct brw_reg dst,
 744                                struct brw_reg src0,
 745                                struct brw_reg src1);
 746    void generate_set_simd4x2_offset(fs_inst *ir,
 747                                     struct brw_reg dst,
 748                                     struct brw_reg offset);
 749    void generate_pack_half_2x16_split(fs_inst *inst,
 750                                       struct brw_reg dst,
 751                                       struct brw_reg x,
 752                                       struct brw_reg y);
 753    void generate_unpack_half_2x16_split(fs_inst *inst,
 754                                         struct brw_reg dst,
 755                                         struct brw_reg src);
 756    void generate_untyped_atomic(fs_inst *inst,
 757                                 struct brw_reg dst,
 758                                 struct brw_reg atomic_op,
 759                                 struct brw_reg surf_index);
 760
 761    void generate_untyped_surface_read(fs_inst *inst,
 762                                       struct brw_reg dst,
 763                                       struct brw_reg surf_index);
 764    void generate_discard_jump(fs_inst *ir);
 765
 766    bool patch_discard_jumps_to_fb_writes();
 767
 768    const struct brw_wm_prog_key *const key;
 769    struct brw_wm_prog_data *prog_data;
 770    const struct gl_fragment_program *fp;
 771
 772    unsigned dispatch_width; /** 8 or 16 */
 773
 774    bool dual_source_output;
 775
 776    exec_list discard_halt_patches;
 777 };
 778
 779 bool brw_do_channel_expressions(struct exec_list *instructions);
 780 bool brw_do_vector_splitting(struct exec_list *instructions);
 781 bool brw_fs_precompile(struct gl_context *ctx, struct gl_shader_program *prog);
 782
 783 struct brw_reg brw_reg_from_fs_reg(fs_reg *reg);