2 * Copyright © 2010 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
30 #include "brw_shader.h"
31 #include "brw_ir_fs.h"
32 #include "brw_fs_builder.h"
34 #include "glsl/nir/nir.h"
42 class fs_live_variables
;
45 struct brw_gs_compile
;
48 offset(fs_reg reg
, const brw::fs_builder
& bld
, unsigned delta
)
58 return byte_offset(reg
,
59 delta
* reg
.component_size(bld
.dispatch_width()));
61 reg
.reg_offset
+= delta
;
70 * The fragment shader front-end.
72 * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
74 class fs_visitor
: public backend_shader
77 fs_visitor(const struct brw_compiler
*compiler
, void *log_data
,
80 struct brw_stage_prog_data
*prog_data
,
81 struct gl_program
*prog
,
82 const nir_shader
*shader
,
83 unsigned dispatch_width
,
84 int shader_time_index
);
85 fs_visitor(const struct brw_compiler
*compiler
, void *log_data
,
87 struct brw_gs_compile
*gs_compile
,
88 struct brw_gs_prog_data
*prog_data
,
89 const nir_shader
*shader
,
90 int shader_time_index
);
94 fs_reg
vgrf(const glsl_type
*const type
);
95 void import_uniforms(fs_visitor
*v
);
96 void setup_uniform_clipplane_values(gl_clip_plane
*clip_planes
);
97 void compute_clip_distance(gl_clip_plane
*clip_planes
);
99 fs_inst
*get_instruction_generating_reg(fs_inst
*start
,
103 void VARYING_PULL_CONSTANT_LOAD(const brw::fs_builder
&bld
,
105 const fs_reg
&surf_index
,
106 const fs_reg
&varying_offset
,
107 uint32_t const_offset
);
108 void DEP_RESOLVE_MOV(const brw::fs_builder
&bld
, int grf
);
110 bool run_fs(bool do_rep_send
);
111 bool run_vs(gl_clip_plane
*clip_planes
);
115 void allocate_registers();
116 void setup_payload_gen4();
117 void setup_payload_gen6();
118 void setup_vs_payload();
119 void setup_gs_payload();
120 void setup_cs_payload();
121 void fixup_3src_null_dest();
122 void assign_curb_setup();
123 void calculate_urb_setup();
124 void assign_urb_setup();
125 void convert_attr_sources_to_hw_regs(fs_inst
*inst
);
126 void assign_vs_urb_setup();
127 void assign_gs_urb_setup();
128 bool assign_regs(bool allow_spilling
);
129 void assign_regs_trivial();
130 void calculate_payload_ranges(int payload_node_count
,
131 int *payload_last_use_ip
);
132 void setup_payload_interference(struct ra_graph
*g
, int payload_reg_count
,
133 int first_payload_node
);
134 int choose_spill_reg(struct ra_graph
*g
);
135 void spill_reg(int spill_reg
);
136 void split_virtual_grfs();
137 bool compact_virtual_grfs();
138 void assign_constant_locations();
139 void demote_pull_constants();
140 void invalidate_live_intervals();
141 void calculate_live_intervals();
142 void calculate_register_pressure();
144 bool opt_algebraic();
145 bool opt_redundant_discard_jumps();
147 bool opt_cse_local(bblock_t
*block
);
148 bool opt_copy_propagate();
149 bool try_copy_propagate(fs_inst
*inst
, int arg
, acp_entry
*entry
);
150 bool try_constant_propagate(fs_inst
*inst
, acp_entry
*entry
);
151 bool opt_copy_propagate_local(void *mem_ctx
, bblock_t
*block
,
153 bool opt_register_renaming();
154 bool register_coalesce();
155 bool compute_to_mrf();
156 bool eliminate_find_live_channel();
157 bool dead_code_eliminate();
158 bool remove_duplicate_mrf_writes();
160 bool opt_sampler_eot();
161 bool virtual_grf_interferes(int a
, int b
);
162 void schedule_instructions(instruction_scheduler_mode mode
);
163 void insert_gen4_send_dependency_workarounds();
164 void insert_gen4_pre_send_dependency_workarounds(bblock_t
*block
,
166 void insert_gen4_post_send_dependency_workarounds(bblock_t
*block
,
168 void vfail(const char *msg
, va_list args
);
169 void fail(const char *msg
, ...);
170 void no16(const char *msg
);
171 void lower_uniform_pull_constant_loads();
172 bool lower_load_payload();
173 bool lower_logical_sends();
174 bool lower_integer_multiplication();
175 bool lower_simd_width();
176 bool opt_combine_constants();
178 void emit_dummy_fs();
179 void emit_repclear_shader();
180 fs_reg
*emit_fragcoord_interpolation(bool pixel_center_integer
,
181 bool origin_upper_left
);
182 fs_inst
*emit_linterp(const fs_reg
&attr
, const fs_reg
&interp
,
183 glsl_interp_qualifier interpolation_mode
,
184 bool is_centroid
, bool is_sample
);
185 fs_reg
*emit_frontfacing_interpolation();
186 fs_reg
*emit_samplepos_setup();
187 fs_reg
*emit_sampleid_setup();
188 void emit_general_interpolation(fs_reg
*attr
, const char *name
,
189 const glsl_type
*type
,
190 glsl_interp_qualifier interpolation_mode
,
191 int *location
, bool mod_centroid
,
193 fs_reg
*emit_vs_system_value(int location
);
194 void emit_interpolation_setup_gen4();
195 void emit_interpolation_setup_gen6();
196 void compute_sample_position(fs_reg dst
, fs_reg int_sample_pos
);
197 void emit_texture(ir_texture_opcode op
,
198 const glsl_type
*dest_type
,
199 fs_reg coordinate
, int components
,
201 fs_reg lod
, fs_reg dpdy
, int grad_components
,
205 int gather_component
,
209 fs_reg
emit_mcs_fetch(const fs_reg
&coordinate
, unsigned components
,
210 const fs_reg
&sampler
);
211 void emit_gen6_gather_wa(uint8_t wa
, fs_reg dst
);
212 fs_reg
resolve_source_modifiers(const fs_reg
&src
);
213 void emit_discard_jump();
214 bool opt_peephole_sel();
215 bool opt_peephole_predicated_break();
216 bool opt_saturate_propagation();
217 bool opt_cmod_propagation();
218 bool opt_zero_samples();
219 void emit_unspill(bblock_t
*block
, fs_inst
*inst
, fs_reg reg
,
220 uint32_t spill_offset
, int count
);
221 void emit_spill(bblock_t
*block
, fs_inst
*inst
, fs_reg reg
,
222 uint32_t spill_offset
, int count
);
224 void emit_nir_code();
225 void nir_setup_inputs();
226 void nir_setup_single_output_varying(fs_reg
*reg
, const glsl_type
*type
,
228 void nir_setup_outputs();
229 void nir_setup_uniforms();
230 void nir_emit_system_values();
231 void nir_emit_impl(nir_function_impl
*impl
);
232 void nir_emit_cf_list(exec_list
*list
);
233 void nir_emit_if(nir_if
*if_stmt
);
234 void nir_emit_loop(nir_loop
*loop
);
235 void nir_emit_block(nir_block
*block
);
236 void nir_emit_instr(nir_instr
*instr
);
237 void nir_emit_alu(const brw::fs_builder
&bld
, nir_alu_instr
*instr
);
238 void nir_emit_load_const(const brw::fs_builder
&bld
,
239 nir_load_const_instr
*instr
);
240 void nir_emit_undef(const brw::fs_builder
&bld
,
241 nir_ssa_undef_instr
*instr
);
242 void nir_emit_vs_intrinsic(const brw::fs_builder
&bld
,
243 nir_intrinsic_instr
*instr
);
244 void nir_emit_gs_intrinsic(const brw::fs_builder
&bld
,
245 nir_intrinsic_instr
*instr
);
246 void nir_emit_fs_intrinsic(const brw::fs_builder
&bld
,
247 nir_intrinsic_instr
*instr
);
248 void nir_emit_cs_intrinsic(const brw::fs_builder
&bld
,
249 nir_intrinsic_instr
*instr
);
250 void nir_emit_intrinsic(const brw::fs_builder
&bld
,
251 nir_intrinsic_instr
*instr
);
252 void nir_emit_ssbo_atomic(const brw::fs_builder
&bld
,
253 int op
, nir_intrinsic_instr
*instr
);
254 void nir_emit_texture(const brw::fs_builder
&bld
,
255 nir_tex_instr
*instr
);
256 void nir_emit_jump(const brw::fs_builder
&bld
,
257 nir_jump_instr
*instr
);
258 fs_reg
get_nir_src(nir_src src
);
259 fs_reg
get_nir_dest(nir_dest dest
);
260 fs_reg
get_nir_image_deref(const nir_deref_var
*deref
);
261 void emit_percomp(const brw::fs_builder
&bld
, const fs_inst
&inst
,
264 bool optimize_frontfacing_ternary(nir_alu_instr
*instr
,
265 const fs_reg
&result
);
267 void emit_alpha_test();
268 fs_inst
*emit_single_fb_write(const brw::fs_builder
&bld
,
269 fs_reg color1
, fs_reg color2
,
270 fs_reg src0_alpha
, unsigned components
);
271 void emit_fb_writes();
272 void emit_urb_writes(const fs_reg
&gs_vertex_count
= fs_reg());
273 void set_gs_stream_control_data_bits(const fs_reg
&vertex_count
,
275 void emit_gs_control_data_bits(const fs_reg
&vertex_count
);
276 void emit_gs_end_primitive(const nir_src
&vertex_count_nir_src
);
277 void emit_gs_vertex(const nir_src
&vertex_count_nir_src
,
279 void emit_gs_thread_end();
280 void emit_gs_input_load(const fs_reg
&dst
, const nir_src
&vertex_src
,
281 const fs_reg
&indirect_offset
, unsigned imm_offset
,
282 unsigned num_components
);
283 void emit_cs_terminate();
284 fs_reg
*emit_cs_local_invocation_id_setup();
285 fs_reg
*emit_cs_work_group_id_setup();
289 void emit_shader_time_begin();
290 void emit_shader_time_end();
291 void SHADER_TIME_ADD(const brw::fs_builder
&bld
,
292 int shader_time_subindex
,
295 fs_reg
get_timestamp(const brw::fs_builder
&bld
);
297 struct brw_reg
interp_reg(int location
, int channel
);
299 int implied_mrf_writes(fs_inst
*inst
);
301 virtual void dump_instructions();
302 virtual void dump_instructions(const char *name
);
303 void dump_instruction(backend_instruction
*inst
);
304 void dump_instruction(backend_instruction
*inst
, FILE *file
);
306 const void *const key
;
307 const struct brw_sampler_prog_key_data
*key_tex
;
309 struct brw_gs_compile
*gs_compile
;
311 struct brw_stage_prog_data
*prog_data
;
312 struct gl_program
*prog
;
316 int *virtual_grf_start
;
317 int *virtual_grf_end
;
318 brw::fs_live_variables
*live_intervals
;
320 int *regs_live_at_ip
;
322 /** Number of uniform variable components visited. */
325 /** Byte-offset for the next available spot in the scratch space buffer. */
326 unsigned last_scratch
;
329 * Array mapping UNIFORM register numbers to the pull parameter index,
330 * or -1 if this uniform register isn't being uploaded as a pull constant.
332 int *pull_constant_loc
;
335 * Array mapping UNIFORM register numbers to the push parameter index,
336 * or -1 if this uniform register isn't being uploaded as a push constant.
338 int *push_constant_loc
;
343 fs_reg outputs
[VARYING_SLOT_MAX
];
344 unsigned output_components
[VARYING_SLOT_MAX
];
345 fs_reg dual_src_output
;
347 int first_non_payload_grf
;
348 /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
352 fs_reg
*nir_ssa_values
;
355 fs_reg
*nir_system_values
;
359 bool simd16_unsupported
;
362 /* Result of last visit() method. Still used by emit_texture() */
365 /** Register numbers for thread payload fields. */
366 struct thread_payload
{
367 uint8_t source_depth_reg
;
368 uint8_t source_w_reg
;
369 uint8_t aa_dest_stencil_reg
;
370 uint8_t dest_depth_reg
;
371 uint8_t sample_pos_reg
;
372 uint8_t sample_mask_in_reg
;
373 uint8_t barycentric_coord_reg
[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT
];
374 uint8_t local_invocation_id_reg
;
376 /** The number of thread payload registers the hardware will supply. */
380 bool source_depth_to_render_target
;
381 bool runtime_check_aads_emit
;
387 fs_reg delta_xy
[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT
];
388 fs_reg shader_start_time
;
389 fs_reg userplane
[MAX_CLIP_PLANES
];
390 fs_reg final_gs_vertex_count
;
391 fs_reg control_data_bits
;
394 bool spilled_any_registers
;
396 const unsigned dispatch_width
; /**< 8 or 16 */
398 int shader_time_index
;
400 unsigned promoted_constants
;
405 * The fragment shader code generator.
407 * Translates FS IR to actual i965 assembly code.
412 fs_generator(const struct brw_compiler
*compiler
, void *log_data
,
415 struct brw_stage_prog_data
*prog_data
,
416 unsigned promoted_constants
,
417 bool runtime_check_aads_emit
,
418 const char *stage_abbrev
);
421 void enable_debug(const char *shader_name
);
422 int generate_code(const cfg_t
*cfg
, int dispatch_width
);
423 const unsigned *get_assembly(unsigned int *assembly_size
);
426 void fire_fb_write(fs_inst
*inst
,
427 struct brw_reg payload
,
428 struct brw_reg implied_header
,
430 void generate_fb_write(fs_inst
*inst
, struct brw_reg payload
);
431 void generate_urb_read(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg payload
);
432 void generate_urb_write(fs_inst
*inst
, struct brw_reg payload
);
433 void generate_cs_terminate(fs_inst
*inst
, struct brw_reg payload
);
434 void generate_stencil_ref_packing(fs_inst
*inst
, struct brw_reg dst
,
436 void generate_barrier(fs_inst
*inst
, struct brw_reg src
);
437 void generate_blorp_fb_write(fs_inst
*inst
);
438 void generate_linterp(fs_inst
*inst
, struct brw_reg dst
,
439 struct brw_reg
*src
);
440 void generate_tex(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg src
,
441 struct brw_reg sampler_index
);
442 void generate_get_buffer_size(fs_inst
*inst
, struct brw_reg dst
,
444 struct brw_reg surf_index
);
445 void generate_math_gen6(fs_inst
*inst
,
448 struct brw_reg src1
);
449 void generate_math_gen4(fs_inst
*inst
,
452 void generate_math_g45(fs_inst
*inst
,
455 void generate_ddx(enum opcode op
, struct brw_reg dst
, struct brw_reg src
);
456 void generate_ddy(enum opcode op
, struct brw_reg dst
, struct brw_reg src
,
458 void generate_scratch_write(fs_inst
*inst
, struct brw_reg src
);
459 void generate_scratch_read(fs_inst
*inst
, struct brw_reg dst
);
460 void generate_scratch_read_gen7(fs_inst
*inst
, struct brw_reg dst
);
461 void generate_uniform_pull_constant_load(fs_inst
*inst
, struct brw_reg dst
,
462 struct brw_reg index
,
463 struct brw_reg offset
);
464 void generate_uniform_pull_constant_load_gen7(fs_inst
*inst
,
466 struct brw_reg surf_index
,
467 struct brw_reg offset
);
468 void generate_varying_pull_constant_load(fs_inst
*inst
, struct brw_reg dst
,
469 struct brw_reg index
,
470 struct brw_reg offset
);
471 void generate_varying_pull_constant_load_gen7(fs_inst
*inst
,
473 struct brw_reg index
,
474 struct brw_reg offset
);
475 void generate_mov_dispatch_to_flags(fs_inst
*inst
);
477 void generate_pixel_interpolator_query(fs_inst
*inst
,
480 struct brw_reg msg_data
,
483 void generate_set_sample_id(fs_inst
*inst
,
486 struct brw_reg src1
);
488 void generate_set_simd4x2_offset(fs_inst
*inst
,
490 struct brw_reg offset
);
491 void generate_discard_jump(fs_inst
*inst
);
493 void generate_pack_half_2x16_split(fs_inst
*inst
,
497 void generate_unpack_half_2x16_split(fs_inst
*inst
,
501 void generate_shader_time_add(fs_inst
*inst
,
502 struct brw_reg payload
,
503 struct brw_reg offset
,
504 struct brw_reg value
);
506 void generate_mov_indirect(fs_inst
*inst
,
509 struct brw_reg indirect_byte_offset
);
511 bool patch_discard_jumps_to_fb_writes();
513 const struct brw_compiler
*compiler
;
514 void *log_data
; /* Passed to compiler->*_log functions */
516 const struct brw_device_info
*devinfo
;
518 struct brw_codegen
*p
;
519 const void * const key
;
520 struct brw_stage_prog_data
* const prog_data
;
522 unsigned dispatch_width
; /**< 8 or 16 */
524 exec_list discard_halt_patches
;
525 unsigned promoted_constants
;
526 bool runtime_check_aads_emit
;
528 const char *shader_name
;
529 const char *stage_abbrev
;
533 bool brw_do_channel_expressions(struct exec_list
*instructions
);
534 bool brw_do_vector_splitting(struct exec_list
*instructions
);