2 * Copyright © 2010 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
30 #include <sys/types.h>
32 #include "main/macros.h"
33 #include "main/shaderobj.h"
34 #include "main/uniforms.h"
35 #include "program/prog_parameter.h"
36 #include "program/prog_print.h"
37 #include "program/prog_optimize.h"
38 #include "program/register_allocate.h"
39 #include "program/sampler.h"
40 #include "program/hash_table.h"
41 #include "brw_context.h"
46 #include "../glsl/glsl_types.h"
47 #include "../glsl/ir.h"
50 ARF
= BRW_ARCHITECTURE_REGISTER_FILE
,
51 GRF
= BRW_GENERAL_REGISTER_FILE
,
52 MRF
= BRW_MESSAGE_REGISTER_FILE
,
53 IMM
= BRW_IMMEDIATE_VALUE
,
54 FIXED_HW_REG
, /* a struct brw_reg */
55 UNIFORM
, /* prog_data->params[hw_reg] */
60 FS_OPCODE_FB_WRITE
= 256,
76 FS_OPCODE_DISCARD_NOT
,
77 FS_OPCODE_DISCARD_AND
,
80 FS_OPCODE_PULL_CONSTANT_LOAD
,
86 /* Callers of this talloc-based new need not call delete. It's
87 * easier to just talloc_free 'ctx' (or any of its ancestors). */
88 static void* operator new(size_t size
, void *ctx
)
92 node
= talloc_size(ctx
, size
);
100 memset(this, 0, sizeof(*this));
105 /** Generic unset register constructor. */
109 this->file
= BAD_FILE
;
112 /** Immediate value constructor. */
117 this->type
= BRW_REGISTER_TYPE_F
;
121 /** Immediate value constructor. */
126 this->type
= BRW_REGISTER_TYPE_D
;
130 /** Immediate value constructor. */
135 this->type
= BRW_REGISTER_TYPE_UD
;
139 /** Fixed brw_reg Immediate value constructor. */
140 fs_reg(struct brw_reg fixed_hw_reg
)
143 this->file
= FIXED_HW_REG
;
144 this->fixed_hw_reg
= fixed_hw_reg
;
145 this->type
= fixed_hw_reg
.type
;
148 fs_reg(enum register_file file
, int hw_reg
);
149 fs_reg(enum register_file file
, int hw_reg
, uint32_t type
);
150 fs_reg(class fs_visitor
*v
, const struct glsl_type
*type
);
152 bool equals(fs_reg
*r
)
154 return (file
== r
->file
&&
156 reg_offset
== r
->reg_offset
&&
157 hw_reg
== r
->hw_reg
&&
159 negate
== r
->negate
&&
161 memcmp(&fixed_hw_reg
, &r
->fixed_hw_reg
,
162 sizeof(fixed_hw_reg
)) == 0 &&
167 /** Register file: ARF, GRF, MRF, IMM. */
168 enum register_file file
;
169 /** virtual register number. 0 = fixed hw reg */
171 /** Offset within the virtual register. */
173 /** HW register number. Generally unset until register allocation. */
175 /** Register type. BRW_REGISTER_TYPE_* */
179 struct brw_reg fixed_hw_reg
;
180 int smear
; /* -1, or a channel of the reg to smear to all channels. */
182 /** Value for file == BRW_IMMMEDIATE_FILE */
190 static const fs_reg reg_undef
;
191 static const fs_reg
reg_null_f(ARF
, BRW_ARF_NULL
, BRW_REGISTER_TYPE_F
);
192 static const fs_reg
reg_null_d(ARF
, BRW_ARF_NULL
, BRW_REGISTER_TYPE_D
);
194 class fs_inst
: public exec_node
{
196 /* Callers of this talloc-based new need not call delete. It's
197 * easier to just talloc_free 'ctx' (or any of its ancestors). */
198 static void* operator new(size_t size
, void *ctx
)
202 node
= talloc_zero_size(ctx
, size
);
203 assert(node
!= NULL
);
210 memset(this, 0, sizeof(*this));
211 this->opcode
= BRW_OPCODE_NOP
;
212 this->conditional_mod
= BRW_CONDITIONAL_NONE
;
214 this->dst
= reg_undef
;
215 this->src
[0] = reg_undef
;
216 this->src
[1] = reg_undef
;
217 this->src
[2] = reg_undef
;
228 this->opcode
= opcode
;
231 fs_inst(int opcode
, fs_reg dst
)
234 this->opcode
= opcode
;
238 assert(dst
.reg_offset
>= 0);
241 fs_inst(int opcode
, fs_reg dst
, fs_reg src0
)
244 this->opcode
= opcode
;
249 assert(dst
.reg_offset
>= 0);
250 if (src
[0].file
== GRF
)
251 assert(src
[0].reg_offset
>= 0);
254 fs_inst(int opcode
, fs_reg dst
, fs_reg src0
, fs_reg src1
)
257 this->opcode
= opcode
;
263 assert(dst
.reg_offset
>= 0);
264 if (src
[0].file
== GRF
)
265 assert(src
[0].reg_offset
>= 0);
266 if (src
[1].file
== GRF
)
267 assert(src
[1].reg_offset
>= 0);
270 fs_inst(int opcode
, fs_reg dst
, fs_reg src0
, fs_reg src1
, fs_reg src2
)
273 this->opcode
= opcode
;
280 assert(dst
.reg_offset
>= 0);
281 if (src
[0].file
== GRF
)
282 assert(src
[0].reg_offset
>= 0);
283 if (src
[1].file
== GRF
)
284 assert(src
[1].reg_offset
>= 0);
285 if (src
[2].file
== GRF
)
286 assert(src
[2].reg_offset
>= 0);
289 bool equals(fs_inst
*inst
)
291 return (opcode
== inst
->opcode
&&
292 dst
.equals(&inst
->dst
) &&
293 src
[0].equals(&inst
->src
[0]) &&
294 src
[1].equals(&inst
->src
[1]) &&
295 src
[2].equals(&inst
->src
[2]) &&
296 saturate
== inst
->saturate
&&
297 predicated
== inst
->predicated
&&
298 conditional_mod
== inst
->conditional_mod
&&
299 mlen
== inst
->mlen
&&
300 base_mrf
== inst
->base_mrf
&&
301 sampler
== inst
->sampler
&&
302 target
== inst
->target
&&
304 header_present
== inst
->header_present
&&
305 shadow_compare
== inst
->shadow_compare
&&
306 offset
== inst
->offset
);
311 return (opcode
== FS_OPCODE_TEX
||
312 opcode
== FS_OPCODE_TXB
||
313 opcode
== FS_OPCODE_TXL
);
318 return (opcode
== FS_OPCODE_RCP
||
319 opcode
== FS_OPCODE_RSQ
||
320 opcode
== FS_OPCODE_SQRT
||
321 opcode
== FS_OPCODE_EXP2
||
322 opcode
== FS_OPCODE_LOG2
||
323 opcode
== FS_OPCODE_SIN
||
324 opcode
== FS_OPCODE_COS
||
325 opcode
== FS_OPCODE_POW
);
328 int opcode
; /* BRW_OPCODE_* or FS_OPCODE_* */
333 int conditional_mod
; /**< BRW_CONDITIONAL_* */
335 int mlen
; /**< SEND message length */
336 int base_mrf
; /**< First MRF in the SEND message, if mlen is nonzero. */
338 int target
; /**< MRT target. */
342 uint32_t offset
; /* spill/unspill offset */
345 * Annotation for the generated IR. One of the two can be set.
348 const char *annotation
;
352 class fs_visitor
: public ir_visitor
356 fs_visitor(struct brw_wm_compile
*c
, struct brw_shader
*shader
)
361 this->fp
= brw
->fragment_program
;
362 this->intel
= &brw
->intel
;
363 this->ctx
= &intel
->ctx
;
364 this->mem_ctx
= talloc_new(NULL
);
365 this->shader
= shader
;
367 this->variable_ht
= hash_table_ctor(0,
368 hash_table_pointer_hash
,
369 hash_table_pointer_compare
);
371 /* There's a question that appears to be left open in the spec:
372 * How do implicit dst conversions interact with the CMP
373 * instruction or conditional mods? On gen6, the instruction:
375 * CMP null<d> src0<f> src1<f>
377 * will do src1 - src0 and compare that result as if it was an
378 * integer. On gen4, it will do src1 - src0 as float, convert
379 * the result to int, and compare as int. In between, it
380 * appears that it does src1 - src0 and does the compare in the
381 * execution type so dst type doesn't matter.
383 if (this->intel
->gen
> 4)
384 this->reg_null_cmp
= reg_null_d
;
386 this->reg_null_cmp
= reg_null_f
;
388 this->frag_color
= NULL
;
389 this->frag_data
= NULL
;
390 this->frag_depth
= NULL
;
391 this->first_non_payload_grf
= 0;
393 this->current_annotation
= NULL
;
394 this->base_ir
= NULL
;
396 this->virtual_grf_sizes
= NULL
;
397 this->virtual_grf_next
= 1;
398 this->virtual_grf_array_size
= 0;
399 this->virtual_grf_def
= NULL
;
400 this->virtual_grf_use
= NULL
;
401 this->live_intervals_valid
= false;
403 this->kill_emitted
= false;
408 talloc_free(this->mem_ctx
);
409 hash_table_dtor(this->variable_ht
);
412 fs_reg
*variable_storage(ir_variable
*var
);
413 int virtual_grf_alloc(int size
);
415 void visit(ir_variable
*ir
);
416 void visit(ir_assignment
*ir
);
417 void visit(ir_dereference_variable
*ir
);
418 void visit(ir_dereference_record
*ir
);
419 void visit(ir_dereference_array
*ir
);
420 void visit(ir_expression
*ir
);
421 void visit(ir_texture
*ir
);
422 void visit(ir_if
*ir
);
423 void visit(ir_constant
*ir
);
424 void visit(ir_swizzle
*ir
);
425 void visit(ir_return
*ir
);
426 void visit(ir_loop
*ir
);
427 void visit(ir_loop_jump
*ir
);
428 void visit(ir_discard
*ir
);
429 void visit(ir_call
*ir
);
430 void visit(ir_function
*ir
);
431 void visit(ir_function_signature
*ir
);
433 fs_inst
*emit(fs_inst inst
);
434 void setup_paramvalues_refs();
435 void assign_curb_setup();
436 void calculate_urb_setup();
437 void assign_urb_setup();
439 void assign_regs_trivial();
440 int choose_spill_reg(struct ra_graph
*g
);
441 void spill_reg(int spill_reg
);
442 void split_virtual_grfs();
443 void setup_pull_constants();
444 void calculate_live_intervals();
445 bool propagate_constants();
446 bool register_coalesce();
447 bool compute_to_mrf();
448 bool dead_code_eliminate();
449 bool remove_duplicate_mrf_writes();
450 bool virtual_grf_interferes(int a
, int b
);
451 void schedule_instructions();
453 void generate_code();
454 void generate_fb_write(fs_inst
*inst
);
455 void generate_linterp(fs_inst
*inst
, struct brw_reg dst
,
456 struct brw_reg
*src
);
457 void generate_tex(fs_inst
*inst
, struct brw_reg dst
);
458 void generate_math(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg
*src
);
459 void generate_discard_not(fs_inst
*inst
, struct brw_reg temp
);
460 void generate_discard_and(fs_inst
*inst
, struct brw_reg temp
);
461 void generate_ddx(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg src
);
462 void generate_ddy(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg src
);
463 void generate_spill(fs_inst
*inst
, struct brw_reg src
);
464 void generate_unspill(fs_inst
*inst
, struct brw_reg dst
);
465 void generate_pull_constant_load(fs_inst
*inst
, struct brw_reg dst
);
467 void emit_dummy_fs();
468 fs_reg
*emit_fragcoord_interpolation(ir_variable
*ir
);
469 fs_reg
*emit_frontfacing_interpolation(ir_variable
*ir
);
470 fs_reg
*emit_general_interpolation(ir_variable
*ir
);
471 void emit_interpolation_setup_gen4();
472 void emit_interpolation_setup_gen6();
473 fs_inst
*emit_texture_gen4(ir_texture
*ir
, fs_reg dst
, fs_reg coordinate
);
474 fs_inst
*emit_texture_gen5(ir_texture
*ir
, fs_reg dst
, fs_reg coordinate
);
475 fs_inst
*emit_math(fs_opcodes op
, fs_reg dst
, fs_reg src0
);
476 fs_inst
*emit_math(fs_opcodes op
, fs_reg dst
, fs_reg src0
, fs_reg src1
);
477 bool try_emit_saturate(ir_expression
*ir
);
478 void emit_bool_to_cond_code(ir_rvalue
*condition
);
479 void emit_if_gen6(ir_if
*ir
);
480 void emit_unspill(fs_inst
*inst
, fs_reg reg
, uint32_t spill_offset
);
482 void emit_fb_writes();
483 void emit_assignment_writes(fs_reg
&l
, fs_reg
&r
,
484 const glsl_type
*type
, bool predicated
);
486 struct brw_reg
interp_reg(int location
, int channel
);
487 int setup_uniform_values(int loc
, const glsl_type
*type
);
488 void setup_builtin_uniform_values(ir_variable
*ir
);
489 int implied_mrf_writes(fs_inst
*inst
);
491 struct brw_context
*brw
;
492 const struct gl_fragment_program
*fp
;
493 struct intel_context
*intel
;
494 struct gl_context
*ctx
;
495 struct brw_wm_compile
*c
;
496 struct brw_compile
*p
;
497 struct brw_shader
*shader
;
499 exec_list instructions
;
501 /* Delayed setup of c->prog_data.params[] due to realloc of
502 * ParamValues[] during compile.
504 int param_index
[MAX_UNIFORMS
* 4];
505 int param_offset
[MAX_UNIFORMS
* 4];
507 int *virtual_grf_sizes
;
508 int virtual_grf_next
;
509 int virtual_grf_array_size
;
510 int *virtual_grf_def
;
511 int *virtual_grf_use
;
512 bool live_intervals_valid
;
514 struct hash_table
*variable_ht
;
515 ir_variable
*frag_color
, *frag_data
, *frag_depth
;
516 int first_non_payload_grf
;
517 int urb_setup
[FRAG_ATTRIB_MAX
];
520 /** @{ debug annotation info */
521 const char *current_annotation
;
522 ir_instruction
*base_ir
;
527 /* Result of last visit() method. */
541 GLboolean
brw_do_channel_expressions(struct exec_list
*instructions
);
542 GLboolean
brw_do_vector_splitting(struct exec_list
*instructions
);