2 * Copyright © 2010 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
30 #include "brw_shader.h"
31 #include "brw_ir_fs.h"
32 #include "brw_fs_builder.h"
33 #include "compiler/glsl/ir.h"
34 #include "compiler/nir/nir.h"
42 class fs_live_variables
;
45 struct brw_gs_compile
;
48 offset(fs_reg reg
, const brw::fs_builder
& bld
, unsigned delta
)
58 return byte_offset(reg
,
59 delta
* reg
.component_size(bld
.dispatch_width()));
61 reg
.reg_offset
+= delta
;
70 * The fragment shader front-end.
72 * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
74 class fs_visitor
: public backend_shader
77 fs_visitor(const struct brw_compiler
*compiler
, void *log_data
,
80 struct brw_stage_prog_data
*prog_data
,
81 struct gl_program
*prog
,
82 const nir_shader
*shader
,
83 unsigned dispatch_width
,
84 int shader_time_index
,
85 const struct brw_vue_map
*input_vue_map
= NULL
);
86 fs_visitor(const struct brw_compiler
*compiler
, void *log_data
,
88 struct brw_gs_compile
*gs_compile
,
89 struct brw_gs_prog_data
*prog_data
,
90 const nir_shader
*shader
,
91 int shader_time_index
);
95 fs_reg
vgrf(const glsl_type
*const type
);
96 void import_uniforms(fs_visitor
*v
);
97 void setup_uniform_clipplane_values(gl_clip_plane
*clip_planes
);
98 void compute_clip_distance(gl_clip_plane
*clip_planes
);
100 fs_inst
*get_instruction_generating_reg(fs_inst
*start
,
104 void VARYING_PULL_CONSTANT_LOAD(const brw::fs_builder
&bld
,
106 const fs_reg
&surf_index
,
107 const fs_reg
&varying_offset
,
108 uint32_t const_offset
);
109 void DEP_RESOLVE_MOV(const brw::fs_builder
&bld
, int grf
);
111 bool run_fs(bool do_rep_send
);
112 bool run_vs(gl_clip_plane
*clip_planes
);
117 void allocate_registers();
118 void setup_fs_payload_gen4();
119 void setup_fs_payload_gen6();
120 void setup_vs_payload();
121 void setup_gs_payload();
122 void setup_cs_payload();
123 void fixup_3src_null_dest();
124 void assign_curb_setup();
125 void calculate_urb_setup();
126 void assign_urb_setup();
127 void convert_attr_sources_to_hw_regs(fs_inst
*inst
);
128 void assign_vs_urb_setup();
129 void assign_tes_urb_setup();
130 void assign_gs_urb_setup();
131 bool assign_regs(bool allow_spilling
);
132 void assign_regs_trivial();
133 void calculate_payload_ranges(int payload_node_count
,
134 int *payload_last_use_ip
);
135 void setup_payload_interference(struct ra_graph
*g
, int payload_reg_count
,
136 int first_payload_node
);
137 int choose_spill_reg(struct ra_graph
*g
);
138 void spill_reg(int spill_reg
);
139 void split_virtual_grfs();
140 bool compact_virtual_grfs();
141 void assign_constant_locations();
142 void lower_constant_loads();
143 void invalidate_live_intervals();
144 void calculate_live_intervals();
145 void calculate_register_pressure();
147 bool opt_algebraic();
148 bool opt_redundant_discard_jumps();
150 bool opt_cse_local(bblock_t
*block
);
151 bool opt_copy_propagate();
152 bool try_copy_propagate(fs_inst
*inst
, int arg
, acp_entry
*entry
);
153 bool try_constant_propagate(fs_inst
*inst
, acp_entry
*entry
);
154 bool opt_copy_propagate_local(void *mem_ctx
, bblock_t
*block
,
156 bool opt_register_renaming();
157 bool register_coalesce();
158 bool compute_to_mrf();
159 bool eliminate_find_live_channel();
160 bool dead_code_eliminate();
161 bool remove_duplicate_mrf_writes();
163 bool opt_sampler_eot();
164 bool virtual_grf_interferes(int a
, int b
);
165 void schedule_instructions(instruction_scheduler_mode mode
);
166 void insert_gen4_send_dependency_workarounds();
167 void insert_gen4_pre_send_dependency_workarounds(bblock_t
*block
,
169 void insert_gen4_post_send_dependency_workarounds(bblock_t
*block
,
171 void vfail(const char *msg
, va_list args
);
172 void fail(const char *msg
, ...);
173 void no16(const char *msg
);
174 void lower_uniform_pull_constant_loads();
175 bool lower_load_payload();
176 bool lower_logical_sends();
177 bool lower_integer_multiplication();
179 bool lower_simd_width();
180 bool opt_combine_constants();
182 void emit_dummy_fs();
183 void emit_repclear_shader();
184 fs_reg
*emit_fragcoord_interpolation(bool pixel_center_integer
,
185 bool origin_upper_left
);
186 fs_inst
*emit_linterp(const fs_reg
&attr
, const fs_reg
&interp
,
187 glsl_interp_qualifier interpolation_mode
,
188 bool is_centroid
, bool is_sample
);
189 fs_reg
*emit_frontfacing_interpolation();
190 fs_reg
*emit_samplepos_setup();
191 fs_reg
*emit_sampleid_setup();
192 fs_reg
*emit_samplemaskin_setup();
193 void emit_general_interpolation(fs_reg
*attr
, const char *name
,
194 const glsl_type
*type
,
195 glsl_interp_qualifier interpolation_mode
,
196 int *location
, bool mod_centroid
,
198 fs_reg
*emit_vs_system_value(int location
);
199 void emit_interpolation_setup_gen4();
200 void emit_interpolation_setup_gen6();
201 void compute_sample_position(fs_reg dst
, fs_reg int_sample_pos
);
202 void emit_texture(ir_texture_opcode op
,
203 const glsl_type
*dest_type
,
204 fs_reg coordinate
, int components
,
206 fs_reg lod
, fs_reg dpdy
, int grad_components
,
210 int gather_component
,
216 fs_reg
emit_mcs_fetch(const fs_reg
&coordinate
, unsigned components
,
217 const fs_reg
&sampler
);
218 void emit_gen6_gather_wa(uint8_t wa
, fs_reg dst
);
219 fs_reg
resolve_source_modifiers(const fs_reg
&src
);
220 void emit_discard_jump();
221 bool opt_peephole_sel();
222 bool opt_peephole_predicated_break();
223 bool opt_saturate_propagation();
224 bool opt_cmod_propagation();
225 bool opt_zero_samples();
226 void emit_unspill(bblock_t
*block
, fs_inst
*inst
, fs_reg reg
,
227 uint32_t spill_offset
, int count
);
228 void emit_spill(bblock_t
*block
, fs_inst
*inst
, fs_reg reg
,
229 uint32_t spill_offset
, int count
);
231 void emit_nir_code();
232 void nir_setup_inputs();
233 void nir_setup_single_output_varying(fs_reg
*reg
, const glsl_type
*type
,
235 void nir_setup_outputs();
236 void nir_setup_uniforms();
237 void nir_emit_system_values();
238 void nir_emit_impl(nir_function_impl
*impl
);
239 void nir_emit_cf_list(exec_list
*list
);
240 void nir_emit_if(nir_if
*if_stmt
);
241 void nir_emit_loop(nir_loop
*loop
);
242 void nir_emit_block(nir_block
*block
);
243 void nir_emit_instr(nir_instr
*instr
);
244 void nir_emit_alu(const brw::fs_builder
&bld
, nir_alu_instr
*instr
);
245 void nir_emit_load_const(const brw::fs_builder
&bld
,
246 nir_load_const_instr
*instr
);
247 void nir_emit_undef(const brw::fs_builder
&bld
,
248 nir_ssa_undef_instr
*instr
);
249 void nir_emit_vs_intrinsic(const brw::fs_builder
&bld
,
250 nir_intrinsic_instr
*instr
);
251 void nir_emit_gs_intrinsic(const brw::fs_builder
&bld
,
252 nir_intrinsic_instr
*instr
);
253 void nir_emit_fs_intrinsic(const brw::fs_builder
&bld
,
254 nir_intrinsic_instr
*instr
);
255 void nir_emit_cs_intrinsic(const brw::fs_builder
&bld
,
256 nir_intrinsic_instr
*instr
);
257 void nir_emit_intrinsic(const brw::fs_builder
&bld
,
258 nir_intrinsic_instr
*instr
);
259 void nir_emit_tes_intrinsic(const brw::fs_builder
&bld
,
260 nir_intrinsic_instr
*instr
);
261 void nir_emit_ssbo_atomic(const brw::fs_builder
&bld
,
262 int op
, nir_intrinsic_instr
*instr
);
263 void nir_emit_shared_atomic(const brw::fs_builder
&bld
,
264 int op
, nir_intrinsic_instr
*instr
);
265 void nir_emit_texture(const brw::fs_builder
&bld
,
266 nir_tex_instr
*instr
);
267 void nir_emit_jump(const brw::fs_builder
&bld
,
268 nir_jump_instr
*instr
);
269 fs_reg
get_nir_src(nir_src src
);
270 fs_reg
get_nir_dest(nir_dest dest
);
271 fs_reg
get_nir_image_deref(const nir_deref_var
*deref
);
272 fs_reg
get_indirect_offset(nir_intrinsic_instr
*instr
);
273 void emit_percomp(const brw::fs_builder
&bld
, const fs_inst
&inst
,
276 bool optimize_extract_to_float(nir_alu_instr
*instr
,
277 const fs_reg
&result
);
278 bool optimize_frontfacing_ternary(nir_alu_instr
*instr
,
279 const fs_reg
&result
);
281 void emit_alpha_test();
282 fs_inst
*emit_single_fb_write(const brw::fs_builder
&bld
,
283 fs_reg color1
, fs_reg color2
,
284 fs_reg src0_alpha
, unsigned components
);
285 void emit_fb_writes();
286 void emit_urb_writes(const fs_reg
&gs_vertex_count
= fs_reg());
287 void set_gs_stream_control_data_bits(const fs_reg
&vertex_count
,
289 void emit_gs_control_data_bits(const fs_reg
&vertex_count
);
290 void emit_gs_end_primitive(const nir_src
&vertex_count_nir_src
);
291 void emit_gs_vertex(const nir_src
&vertex_count_nir_src
,
293 void emit_gs_thread_end();
294 void emit_gs_input_load(const fs_reg
&dst
, const nir_src
&vertex_src
,
295 unsigned base_offset
, const nir_src
&offset_src
,
296 unsigned num_components
);
297 void emit_cs_terminate();
298 fs_reg
*emit_cs_local_invocation_id_setup();
299 fs_reg
*emit_cs_work_group_id_setup();
303 void emit_shader_time_begin();
304 void emit_shader_time_end();
305 void SHADER_TIME_ADD(const brw::fs_builder
&bld
,
306 int shader_time_subindex
,
309 fs_reg
get_timestamp(const brw::fs_builder
&bld
);
311 struct brw_reg
interp_reg(int location
, int channel
);
313 int implied_mrf_writes(fs_inst
*inst
);
315 virtual void dump_instructions();
316 virtual void dump_instructions(const char *name
);
317 void dump_instruction(backend_instruction
*inst
);
318 void dump_instruction(backend_instruction
*inst
, FILE *file
);
320 const void *const key
;
321 const struct brw_sampler_prog_key_data
*key_tex
;
323 struct brw_gs_compile
*gs_compile
;
325 struct brw_stage_prog_data
*prog_data
;
326 struct gl_program
*prog
;
328 const struct brw_vue_map
*input_vue_map
;
330 int *virtual_grf_start
;
331 int *virtual_grf_end
;
332 brw::fs_live_variables
*live_intervals
;
334 int *regs_live_at_ip
;
336 /** Number of uniform variable components visited. */
339 /** Byte-offset for the next available spot in the scratch space buffer. */
340 unsigned last_scratch
;
343 * Array mapping UNIFORM register numbers to the pull parameter index,
344 * or -1 if this uniform register isn't being uploaded as a pull constant.
346 int *pull_constant_loc
;
349 * Array mapping UNIFORM register numbers to the push parameter index,
350 * or -1 if this uniform register isn't being uploaded as a push constant.
352 int *push_constant_loc
;
357 fs_reg outputs
[VARYING_SLOT_MAX
];
358 unsigned output_components
[VARYING_SLOT_MAX
];
359 fs_reg dual_src_output
;
361 int first_non_payload_grf
;
362 /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
366 fs_reg
*nir_ssa_values
;
369 fs_reg
*nir_system_values
;
373 bool simd16_unsupported
;
376 /* Result of last visit() method. Still used by emit_texture() */
379 /** Register numbers for thread payload fields. */
380 struct thread_payload
{
381 uint8_t source_depth_reg
;
382 uint8_t source_w_reg
;
383 uint8_t aa_dest_stencil_reg
;
384 uint8_t dest_depth_reg
;
385 uint8_t sample_pos_reg
;
386 uint8_t sample_mask_in_reg
;
387 uint8_t barycentric_coord_reg
[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT
];
388 uint8_t local_invocation_id_reg
;
390 /** The number of thread payload registers the hardware will supply. */
394 bool source_depth_to_render_target
;
395 bool runtime_check_aads_emit
;
401 fs_reg delta_xy
[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT
];
402 fs_reg shader_start_time
;
403 fs_reg userplane
[MAX_CLIP_PLANES
];
404 fs_reg final_gs_vertex_count
;
405 fs_reg control_data_bits
;
408 bool spilled_any_registers
;
410 const unsigned dispatch_width
; /**< 8 or 16 */
411 unsigned min_dispatch_width
;
413 int shader_time_index
;
415 unsigned promoted_constants
;
420 * The fragment shader code generator.
422 * Translates FS IR to actual i965 assembly code.
427 fs_generator(const struct brw_compiler
*compiler
, void *log_data
,
430 struct brw_stage_prog_data
*prog_data
,
431 unsigned promoted_constants
,
432 bool runtime_check_aads_emit
,
433 gl_shader_stage stage
);
436 void enable_debug(const char *shader_name
);
437 int generate_code(const cfg_t
*cfg
, int dispatch_width
);
438 const unsigned *get_assembly(unsigned int *assembly_size
);
441 void fire_fb_write(fs_inst
*inst
,
442 struct brw_reg payload
,
443 struct brw_reg implied_header
,
445 void generate_fb_write(fs_inst
*inst
, struct brw_reg payload
);
446 void generate_urb_read(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg payload
);
447 void generate_urb_write(fs_inst
*inst
, struct brw_reg payload
);
448 void generate_cs_terminate(fs_inst
*inst
, struct brw_reg payload
);
449 void generate_stencil_ref_packing(fs_inst
*inst
, struct brw_reg dst
,
451 void generate_barrier(fs_inst
*inst
, struct brw_reg src
);
452 void generate_blorp_fb_write(fs_inst
*inst
);
453 void generate_linterp(fs_inst
*inst
, struct brw_reg dst
,
454 struct brw_reg
*src
);
455 void generate_tex(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg src
,
456 struct brw_reg surface_index
,
457 struct brw_reg sampler_index
);
458 void generate_get_buffer_size(fs_inst
*inst
, struct brw_reg dst
,
460 struct brw_reg surf_index
);
461 void generate_math_gen6(fs_inst
*inst
,
464 struct brw_reg src1
);
465 void generate_math_gen4(fs_inst
*inst
,
468 void generate_math_g45(fs_inst
*inst
,
471 void generate_ddx(enum opcode op
, struct brw_reg dst
, struct brw_reg src
);
472 void generate_ddy(enum opcode op
, struct brw_reg dst
, struct brw_reg src
,
474 void generate_scratch_write(fs_inst
*inst
, struct brw_reg src
);
475 void generate_scratch_read(fs_inst
*inst
, struct brw_reg dst
);
476 void generate_scratch_read_gen7(fs_inst
*inst
, struct brw_reg dst
);
477 void generate_uniform_pull_constant_load(fs_inst
*inst
, struct brw_reg dst
,
478 struct brw_reg index
,
479 struct brw_reg offset
);
480 void generate_uniform_pull_constant_load_gen7(fs_inst
*inst
,
482 struct brw_reg surf_index
,
483 struct brw_reg offset
);
484 void generate_varying_pull_constant_load(fs_inst
*inst
, struct brw_reg dst
,
485 struct brw_reg index
,
486 struct brw_reg offset
);
487 void generate_varying_pull_constant_load_gen7(fs_inst
*inst
,
489 struct brw_reg index
,
490 struct brw_reg offset
);
491 void generate_mov_dispatch_to_flags(fs_inst
*inst
);
493 void generate_pixel_interpolator_query(fs_inst
*inst
,
496 struct brw_reg msg_data
,
499 void generate_set_sample_id(fs_inst
*inst
,
502 struct brw_reg src1
);
504 void generate_set_simd4x2_offset(fs_inst
*inst
,
506 struct brw_reg offset
);
507 void generate_discard_jump(fs_inst
*inst
);
509 void generate_pack_half_2x16_split(fs_inst
*inst
,
513 void generate_unpack_half_2x16_split(fs_inst
*inst
,
517 void generate_shader_time_add(fs_inst
*inst
,
518 struct brw_reg payload
,
519 struct brw_reg offset
,
520 struct brw_reg value
);
522 void generate_mov_indirect(fs_inst
*inst
,
525 struct brw_reg indirect_byte_offset
);
527 bool patch_discard_jumps_to_fb_writes();
529 const struct brw_compiler
*compiler
;
530 void *log_data
; /* Passed to compiler->*_log functions */
532 const struct brw_device_info
*devinfo
;
534 struct brw_codegen
*p
;
535 const void * const key
;
536 struct brw_stage_prog_data
* const prog_data
;
538 unsigned dispatch_width
; /**< 8 or 16 */
540 exec_list discard_halt_patches
;
541 unsigned promoted_constants
;
542 bool runtime_check_aads_emit
;
544 const char *shader_name
;
545 gl_shader_stage stage
;
549 bool brw_do_channel_expressions(struct exec_list
*instructions
);
550 bool brw_do_vector_splitting(struct exec_list
*instructions
);