src/mesa/drivers/dri/i965/brw_fs.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #pragma once
  29
  30 #include "brw_shader.h"
  31
  32 extern "C" {
  33
  34 #include <sys/types.h>
  35
  36 #include "main/macros.h"
  37 #include "main/shaderobj.h"
  38 #include "main/uniforms.h"
  39 #include "program/prog_parameter.h"
  40 #include "program/prog_print.h"
  41 #include "program/prog_optimize.h"
  42 #include "program/register_allocate.h"
  43 #include "program/sampler.h"
  44 #include "program/hash_table.h"
  45 #include "brw_context.h"
  46 #include "brw_eu.h"
  47 #include "brw_wm.h"
  48 #include "brw_shader.h"
  49 }
  50 #include "gen8_generator.h"
  51 #include "glsl/glsl_types.h"
  52 #include "glsl/ir.h"
  53
  54 #define MAX_SAMPLER_MESSAGE_SIZE 11
  55
  56 class bblock_t;
  57 namespace {
  58    struct acp_entry;
  59 }
  60
  61 namespace brw {
  62    class fs_live_variables;
  63 }
  64
  65 class fs_reg {
  66 public:
  67    DECLARE_RALLOC_CXX_OPERATORS(fs_reg)
  68
  69    void init();
  70
  71    fs_reg();
  72    fs_reg(float f);
  73    fs_reg(int32_t i);
  74    fs_reg(uint32_t u);
  75    fs_reg(struct brw_reg fixed_hw_reg);
  76    fs_reg(enum register_file file, int reg);
  77    fs_reg(enum register_file file, int reg, uint32_t type);
  78    fs_reg(class fs_visitor *v, const struct glsl_type *type);
  79
  80    bool equals(const fs_reg &r) const;
  81    bool is_zero() const;
  82    bool is_one() const;
  83    bool is_null() const;
  84    bool is_valid_3src() const;
  85    fs_reg retype(uint32_t type);
  86
  87    /** Register file: GRF, MRF, IMM. */
  88    enum register_file file;
  89    /**
  90     * Register number.  For MRF, it's the hardware register.  For
  91     * GRF, it's a virtual register number until register allocation
  92     */
  93    int reg;
  94    /**
  95     * Offset from the start of the contiguous register block.
  96     *
  97     * For pre-register-allocation GRFs, this is in units of a float per pixel
  98     * (1 hardware register for SIMD8 mode, or 2 registers for SIMD16 mode).
  99     * For uniforms, this is in units of 1 float.
 100     */
 101    int reg_offset;
 102    /** Register type.  BRW_REGISTER_TYPE_* */
 103    int type;
 104    bool negate;
 105    bool abs;
 106    bool sechalf;
 107    struct brw_reg fixed_hw_reg;
 108    int smear; /* -1, or a channel of the reg to smear to all channels. */
 109
 110    /** Value for file == IMM */
 111    union {
 112       int32_t i;
 113       uint32_t u;
 114       float f;
 115    } imm;
 116
 117    /**
 118     * Offset in bytes from the start of the register.  Values up to a
 119     * backend_reg::reg_offset unit are valid.
 120     */
 121    int subreg_offset;
 122
 123    fs_reg *reladdr;
 124 };
 125
 126 static inline fs_reg
 127 byte_offset(fs_reg reg, unsigned delta)
 128 {
 129    assert(delta == 0 || (reg.file != HW_REG && reg.file != IMM));
 130    reg.subreg_offset += delta;
 131    return reg;
 132 }
 133
 134 static const fs_reg reg_undef;
 135 static const fs_reg reg_null_f(retype(brw_null_reg(), BRW_REGISTER_TYPE_F));
 136 static const fs_reg reg_null_d(retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
 137 static const fs_reg reg_null_ud(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD));
 138
 139 class ip_record : public exec_node {
 140 public:
 141    DECLARE_RALLOC_CXX_OPERATORS(ip_record)
 142
 143    ip_record(int ip)
 144    {
 145       this->ip = ip;
 146    }
 147
 148    int ip;
 149 };
 150
 151 class fs_inst : public backend_instruction {
 152 public:
 153    DECLARE_RALLOC_CXX_OPERATORS(fs_inst)
 154
 155    void init();
 156
 157    fs_inst();
 158    fs_inst(enum opcode opcode);
 159    fs_inst(enum opcode opcode, fs_reg dst);
 160    fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0);
 161    fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
 162    fs_inst(enum opcode opcode, fs_reg dst,
 163            fs_reg src0, fs_reg src1,fs_reg src2);
 164
 165    bool equals(fs_inst *inst);
 166    bool overwrites_reg(const fs_reg &reg);
 167    bool is_send_from_grf();
 168    bool is_partial_write();
 169    int regs_read(fs_visitor *v, int arg);
 170
 171    bool reads_flag();
 172    bool writes_flag();
 173
 174    fs_reg dst;
 175    fs_reg src[3];
 176    bool saturate;
 177    int conditional_mod; /**< BRW_CONDITIONAL_* */
 178
 179    /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional
 180     * mod and predication.
 181     */
 182    uint8_t flag_subreg;
 183
 184    int mlen; /**< SEND message length */
 185    int regs_written; /**< Number of vgrfs written by a SEND message, or 1 */
 186    int base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
 187    uint32_t texture_offset; /**< Texture offset bitfield */
 188    int sampler;
 189    int target; /**< MRT target. */
 190    bool eot;
 191    bool header_present;
 192    bool shadow_compare;
 193    bool force_uncompressed;
 194    bool force_sechalf;
 195    bool force_writemask_all;
 196    uint32_t offset; /* spill/unspill offset */
 197
 198    /** @{
 199     * Annotation for the generated IR.  One of the two can be set.
 200     */
 201    const void *ir;
 202    const char *annotation;
 203    /** @} */
 204 };
 205
 206 /**
 207  * The fragment shader front-end.
 208  *
 209  * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
 210  */
 211 class fs_visitor : public backend_visitor
 212 {
 213 public:
 214
 215    fs_visitor(struct brw_context *brw,
 216               struct brw_wm_compile *c,
 217               struct gl_shader_program *shader_prog,
 218               struct gl_fragment_program *fp,
 219               unsigned dispatch_width);
 220    ~fs_visitor();
 221
 222    fs_reg *variable_storage(ir_variable *var);
 223    int virtual_grf_alloc(int size);
 224    void import_uniforms(fs_visitor *v);
 225
 226    void visit(ir_variable *ir);
 227    void visit(ir_assignment *ir);
 228    void visit(ir_dereference_variable *ir);
 229    void visit(ir_dereference_record *ir);
 230    void visit(ir_dereference_array *ir);
 231    void visit(ir_expression *ir);
 232    void visit(ir_texture *ir);
 233    void visit(ir_if *ir);
 234    void visit(ir_constant *ir);
 235    void visit(ir_swizzle *ir);
 236    void visit(ir_return *ir);
 237    void visit(ir_loop *ir);
 238    void visit(ir_loop_jump *ir);
 239    void visit(ir_discard *ir);
 240    void visit(ir_call *ir);
 241    void visit(ir_function *ir);
 242    void visit(ir_function_signature *ir);
 243    void visit(ir_emit_vertex *);
 244    void visit(ir_end_primitive *);
 245
 246    uint32_t gather_channel(ir_texture *ir, int sampler);
 247    void swizzle_result(ir_texture *ir, fs_reg orig_val, int sampler);
 248
 249    bool can_do_source_mods(fs_inst *inst);
 250
 251    fs_inst *emit(fs_inst inst);
 252    fs_inst *emit(fs_inst *inst);
 253    void emit(exec_list list);
 254
 255    fs_inst *emit(enum opcode opcode);
 256    fs_inst *emit(enum opcode opcode, fs_reg dst);
 257    fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0);
 258    fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
 259    fs_inst *emit(enum opcode opcode, fs_reg dst,
 260                  fs_reg src0, fs_reg src1, fs_reg src2);
 261
 262    fs_inst *MOV(fs_reg dst, fs_reg src);
 263    fs_inst *NOT(fs_reg dst, fs_reg src);
 264    fs_inst *RNDD(fs_reg dst, fs_reg src);
 265    fs_inst *RNDE(fs_reg dst, fs_reg src);
 266    fs_inst *RNDZ(fs_reg dst, fs_reg src);
 267    fs_inst *FRC(fs_reg dst, fs_reg src);
 268    fs_inst *ADD(fs_reg dst, fs_reg src0, fs_reg src1);
 269    fs_inst *MUL(fs_reg dst, fs_reg src0, fs_reg src1);
 270    fs_inst *MACH(fs_reg dst, fs_reg src0, fs_reg src1);
 271    fs_inst *MAC(fs_reg dst, fs_reg src0, fs_reg src1);
 272    fs_inst *SHL(fs_reg dst, fs_reg src0, fs_reg src1);
 273    fs_inst *SHR(fs_reg dst, fs_reg src0, fs_reg src1);
 274    fs_inst *ASR(fs_reg dst, fs_reg src0, fs_reg src1);
 275    fs_inst *AND(fs_reg dst, fs_reg src0, fs_reg src1);
 276    fs_inst *OR(fs_reg dst, fs_reg src0, fs_reg src1);
 277    fs_inst *XOR(fs_reg dst, fs_reg src0, fs_reg src1);
 278    fs_inst *IF(uint32_t predicate);
 279    fs_inst *IF(fs_reg src0, fs_reg src1, uint32_t condition);
 280    fs_inst *CMP(fs_reg dst, fs_reg src0, fs_reg src1,
 281                 uint32_t condition);
 282    fs_inst *LRP(fs_reg dst, fs_reg a, fs_reg y, fs_reg x);
 283    fs_inst *DEP_RESOLVE_MOV(int grf);
 284    fs_inst *BFREV(fs_reg dst, fs_reg value);
 285    fs_inst *BFE(fs_reg dst, fs_reg bits, fs_reg offset, fs_reg value);
 286    fs_inst *BFI1(fs_reg dst, fs_reg bits, fs_reg offset);
 287    fs_inst *BFI2(fs_reg dst, fs_reg bfi1_dst, fs_reg insert, fs_reg base);
 288    fs_inst *FBH(fs_reg dst, fs_reg value);
 289    fs_inst *FBL(fs_reg dst, fs_reg value);
 290    fs_inst *CBIT(fs_reg dst, fs_reg value);
 291    fs_inst *MAD(fs_reg dst, fs_reg c, fs_reg b, fs_reg a);
 292    fs_inst *ADDC(fs_reg dst, fs_reg src0, fs_reg src1);
 293    fs_inst *SUBB(fs_reg dst, fs_reg src0, fs_reg src1);
 294    fs_inst *SEL(fs_reg dst, fs_reg src0, fs_reg src1);
 295
 296    int type_size(const struct glsl_type *type);
 297    fs_inst *get_instruction_generating_reg(fs_inst *start,
 298                                            fs_inst *end,
 299                                            fs_reg reg);
 300
 301    exec_list VARYING_PULL_CONSTANT_LOAD(fs_reg dst, fs_reg surf_index,
 302                                         fs_reg varying_offset,
 303                                         uint32_t const_offset);
 304
 305    bool run();
 306    void assign_binding_table_offsets();
 307    void setup_payload_gen4();
 308    void setup_payload_gen6();
 309    void assign_curb_setup();
 310    void calculate_urb_setup();
 311    void assign_urb_setup();
 312    bool assign_regs(bool allow_spilling);
 313    void assign_regs_trivial();
 314    void get_used_mrfs(bool *mrf_used);
 315    void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
 316                                    int first_payload_node);
 317    void setup_mrf_hack_interference(struct ra_graph *g,
 318                                     int first_mrf_hack_node);
 319    int choose_spill_reg(struct ra_graph *g);
 320    void spill_reg(int spill_reg);
 321    void split_virtual_grfs();
 322    void compact_virtual_grfs();
 323    void move_uniform_array_access_to_pull_constants();
 324    void setup_pull_constants();
 325    void invalidate_live_intervals();
 326    void calculate_live_intervals();
 327    void calculate_register_pressure();
 328    bool opt_algebraic();
 329    bool opt_cse();
 330    bool opt_cse_local(bblock_t *block, exec_list *aeb);
 331    bool opt_copy_propagate();
 332    bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
 333    bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
 334    bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
 335                                  exec_list *acp);
 336    bool register_coalesce();
 337    bool compute_to_mrf();
 338    bool dead_code_eliminate();
 339    bool dead_code_eliminate_local();
 340    bool remove_dead_constants();
 341    bool remove_duplicate_mrf_writes();
 342    bool virtual_grf_interferes(int a, int b);
 343    void schedule_instructions(instruction_scheduler_mode mode);
 344    void insert_gen4_send_dependency_workarounds();
 345    void insert_gen4_pre_send_dependency_workarounds(fs_inst *inst);
 346    void insert_gen4_post_send_dependency_workarounds(fs_inst *inst);
 347    void fail(const char *msg, ...);
 348    void lower_uniform_pull_constant_loads();
 349
 350    void push_force_uncompressed();
 351    void pop_force_uncompressed();
 352
 353    void emit_dummy_fs();
 354    fs_reg *emit_fragcoord_interpolation(ir_variable *ir);
 355    fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
 356                          glsl_interp_qualifier interpolation_mode,
 357                          bool is_centroid, bool is_sample);
 358    fs_reg *emit_frontfacing_interpolation(ir_variable *ir);
 359    fs_reg *emit_samplepos_setup(ir_variable *ir);
 360    fs_reg *emit_sampleid_setup(ir_variable *ir);
 361    fs_reg *emit_samplemaskin_setup(ir_variable *ir);
 362    fs_reg *emit_general_interpolation(ir_variable *ir);
 363    void emit_interpolation_setup_gen4();
 364    void emit_interpolation_setup_gen6();
 365    void compute_sample_position(fs_reg dst, fs_reg int_sample_pos);
 366    fs_reg rescale_texcoord(ir_texture *ir, fs_reg coordinate,
 367                            bool is_rect, int sampler, int texunit);
 368    fs_inst *emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 369                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2);
 370    fs_inst *emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 371                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
 372                               fs_reg sample_index);
 373    fs_inst *emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 374                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
 375                               fs_reg sample_index, fs_reg mcs, int sampler);
 376    fs_reg emit_mcs_fetch(ir_texture *ir, fs_reg coordinate, int sampler);
 377    void emit_gen6_gather_wa(uint8_t wa, fs_reg dst);
 378    fs_reg fix_math_operand(fs_reg src);
 379    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0);
 380    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0, fs_reg src1);
 381    void emit_lrp(fs_reg dst, fs_reg x, fs_reg y, fs_reg a);
 382    void emit_minmax(uint32_t conditionalmod, fs_reg dst,
 383                     fs_reg src0, fs_reg src1);
 384    bool try_emit_saturate(ir_expression *ir);
 385    bool try_emit_mad(ir_expression *ir, int mul_arg);
 386    void try_replace_with_sel();
 387    bool opt_peephole_sel();
 388    bool opt_peephole_predicated_break();
 389    bool opt_saturate_propagation();
 390    void emit_bool_to_cond_code(ir_rvalue *condition);
 391    void emit_if_gen6(ir_if *ir);
 392    void emit_unspill(fs_inst *inst, fs_reg reg, uint32_t spill_offset,
 393                      int count);
 394
 395    void emit_fragment_program_code();
 396    void setup_fp_regs();
 397    fs_reg get_fp_src_reg(const prog_src_register *src);
 398    fs_reg get_fp_dst_reg(const prog_dst_register *dst);
 399    void emit_fp_alu1(enum opcode opcode,
 400                      const struct prog_instruction *fpi,
 401                      fs_reg dst, fs_reg src);
 402    void emit_fp_alu2(enum opcode opcode,
 403                      const struct prog_instruction *fpi,
 404                      fs_reg dst, fs_reg src0, fs_reg src1);
 405    void emit_fp_scalar_write(const struct prog_instruction *fpi,
 406                              fs_reg dst, fs_reg src);
 407    void emit_fp_scalar_math(enum opcode opcode,
 408                             const struct prog_instruction *fpi,
 409                             fs_reg dst, fs_reg src);
 410
 411    void emit_fp_minmax(const struct prog_instruction *fpi,
 412                        fs_reg dst, fs_reg src0, fs_reg src1);
 413
 414    void emit_fp_sop(uint32_t conditional_mod,
 415                     const struct prog_instruction *fpi,
 416                     fs_reg dst, fs_reg src0, fs_reg src1, fs_reg one);
 417
 418    void emit_color_write(int target, int index, int first_color_mrf);
 419    void emit_alpha_test();
 420    void emit_fb_writes();
 421
 422    void emit_shader_time_begin();
 423    void emit_shader_time_end();
 424    void emit_shader_time_write(enum shader_time_shader_type type,
 425                                fs_reg value);
 426
 427    void emit_untyped_atomic(unsigned atomic_op, unsigned surf_index,
 428                             fs_reg dst, fs_reg offset, fs_reg src0,
 429                             fs_reg src1);
 430
 431    void emit_untyped_surface_read(unsigned surf_index, fs_reg dst,
 432                                   fs_reg offset);
 433
 434    bool try_rewrite_rhs_to_dst(ir_assignment *ir,
 435                                fs_reg dst,
 436                                fs_reg src,
 437                                fs_inst *pre_rhs_inst,
 438                                fs_inst *last_rhs_inst);
 439    void emit_assignment_writes(fs_reg &l, fs_reg &r,
 440                                const glsl_type *type, bool predicated);
 441    void resolve_ud_negate(fs_reg *reg);
 442    void resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg);
 443
 444    fs_reg get_timestamp();
 445
 446    struct brw_reg interp_reg(int location, int channel);
 447    void setup_uniform_values(ir_variable *ir);
 448    void setup_builtin_uniform_values(ir_variable *ir);
 449    int implied_mrf_writes(fs_inst *inst);
 450
 451    virtual void dump_instructions();
 452    void dump_instruction(backend_instruction *inst);
 453
 454    void visit_atomic_counter_intrinsic(ir_call *ir);
 455
 456    struct gl_fragment_program *fp;
 457    struct brw_wm_compile *c;
 458    unsigned int sanity_param_count;
 459
 460    int param_size[MAX_UNIFORMS * 4];
 461
 462    int *virtual_grf_sizes;
 463    int virtual_grf_count;
 464    int virtual_grf_array_size;
 465    int *virtual_grf_start;
 466    int *virtual_grf_end;
 467    brw::fs_live_variables *live_intervals;
 468
 469    int *regs_live_at_ip;
 470
 471    /* This is the map from UNIFORM hw_reg + reg_offset as generated by
 472     * the visitor to the packed uniform number after
 473     * remove_dead_constants() that represents the actual uploaded
 474     * uniform index.
 475     */
 476    int *params_remap;
 477    int nr_params_remap;
 478
 479    struct hash_table *variable_ht;
 480    fs_reg frag_depth;
 481    fs_reg sample_mask;
 482    fs_reg outputs[BRW_MAX_DRAW_BUFFERS];
 483    unsigned output_components[BRW_MAX_DRAW_BUFFERS];
 484    fs_reg dual_src_output;
 485    int first_non_payload_grf;
 486    /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
 487    int max_grf;
 488
 489    fs_reg *fp_temp_regs;
 490    fs_reg *fp_input_regs;
 491
 492    /** @{ debug annotation info */
 493    const char *current_annotation;
 494    const void *base_ir;
 495    /** @} */
 496
 497    bool failed;
 498    char *fail_msg;
 499
 500    /* Result of last visit() method. */
 501    fs_reg result;
 502
 503    fs_reg pixel_x;
 504    fs_reg pixel_y;
 505    fs_reg wpos_w;
 506    fs_reg pixel_w;
 507    fs_reg delta_x[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 508    fs_reg delta_y[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 509    fs_reg shader_start_time;
 510
 511    int grf_used;
 512    bool spilled_any_registers;
 513
 514    const unsigned dispatch_width; /**< 8 or 16 */
 515
 516    int force_uncompressed_stack;
 517 };
 518
 519 /**
 520  * The fragment shader code generator.
 521  *
 522  * Translates FS IR to actual i965 assembly code.
 523  */
 524 class fs_generator
 525 {
 526 public:
 527    fs_generator(struct brw_context *brw,
 528                 struct brw_wm_compile *c,
 529                 struct gl_shader_program *prog,
 530                 struct gl_fragment_program *fp,
 531                 bool dual_source_output);
 532    ~fs_generator();
 533
 534    const unsigned *generate_assembly(exec_list *simd8_instructions,
 535                                      exec_list *simd16_instructions,
 536                                      unsigned *assembly_size,
 537                                      FILE *dump_file = NULL);
 538
 539 private:
 540    void generate_code(exec_list *instructions, FILE *dump_file);
 541    void generate_fb_write(fs_inst *inst);
 542    void generate_blorp_fb_write(fs_inst *inst);
 543    void generate_pixel_xy(struct brw_reg dst, bool is_x);
 544    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 545                          struct brw_reg *src);
 546    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 547    void generate_math1_gen7(fs_inst *inst,
 548                             struct brw_reg dst,
 549                             struct brw_reg src);
 550    void generate_math2_gen7(fs_inst *inst,
 551                             struct brw_reg dst,
 552                             struct brw_reg src0,
 553                             struct brw_reg src1);
 554    void generate_math1_gen6(fs_inst *inst,
 555                             struct brw_reg dst,
 556                             struct brw_reg src);
 557    void generate_math2_gen6(fs_inst *inst,
 558                             struct brw_reg dst,
 559                             struct brw_reg src0,
 560                             struct brw_reg src1);
 561    void generate_math_gen4(fs_inst *inst,
 562                            struct brw_reg dst,
 563                            struct brw_reg src);
 564    void generate_math_g45(fs_inst *inst,
 565                           struct brw_reg dst,
 566                           struct brw_reg src);
 567    void generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 568    void generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 569                      bool negate_value);
 570    void generate_scratch_write(fs_inst *inst, struct brw_reg src);
 571    void generate_scratch_read(fs_inst *inst, struct brw_reg dst);
 572    void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst);
 573    void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 574                                             struct brw_reg index,
 575                                             struct brw_reg offset);
 576    void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
 577                                                  struct brw_reg dst,
 578                                                  struct brw_reg surf_index,
 579                                                  struct brw_reg offset);
 580    void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 581                                             struct brw_reg index,
 582                                             struct brw_reg offset);
 583    void generate_varying_pull_constant_load_gen7(fs_inst *inst,
 584                                                  struct brw_reg dst,
 585                                                  struct brw_reg index,
 586                                                  struct brw_reg offset);
 587    void generate_mov_dispatch_to_flags(fs_inst *inst);
 588
 589    void generate_set_omask(fs_inst *inst,
 590                            struct brw_reg dst,
 591                            struct brw_reg sample_mask);
 592
 593    void generate_set_sample_id(fs_inst *inst,
 594                                struct brw_reg dst,
 595                                struct brw_reg src0,
 596                                struct brw_reg src1);
 597
 598    void generate_set_simd4x2_offset(fs_inst *inst,
 599                                     struct brw_reg dst,
 600                                     struct brw_reg offset);
 601    void generate_discard_jump(fs_inst *inst);
 602
 603    void generate_pack_half_2x16_split(fs_inst *inst,
 604                                       struct brw_reg dst,
 605                                       struct brw_reg x,
 606                                       struct brw_reg y);
 607    void generate_unpack_half_2x16_split(fs_inst *inst,
 608                                         struct brw_reg dst,
 609                                         struct brw_reg src);
 610
 611    void generate_shader_time_add(fs_inst *inst,
 612                                  struct brw_reg payload,
 613                                  struct brw_reg offset,
 614                                  struct brw_reg value);
 615
 616    void generate_untyped_atomic(fs_inst *inst,
 617                                 struct brw_reg dst,
 618                                 struct brw_reg atomic_op,
 619                                 struct brw_reg surf_index);
 620
 621    void generate_untyped_surface_read(fs_inst *inst,
 622                                       struct brw_reg dst,
 623                                       struct brw_reg surf_index);
 624
 625    void mark_surface_used(unsigned surf_index);
 626
 627    void patch_discard_jumps_to_fb_writes();
 628
 629    struct brw_context *brw;
 630    struct gl_context *ctx;
 631
 632    struct brw_compile *p;
 633    struct brw_wm_compile *c;
 634
 635    struct gl_shader_program *prog;
 636    const struct gl_fragment_program *fp;
 637
 638    unsigned dispatch_width; /**< 8 or 16 */
 639
 640    exec_list discard_halt_patches;
 641    bool dual_source_output;
 642    void *mem_ctx;
 643 };
 644
 645 /**
 646  * The fragment shader code generator.
 647  *
 648  * Translates FS IR to actual i965 assembly code.
 649  */
 650 class gen8_fs_generator : public gen8_generator
 651 {
 652 public:
 653    gen8_fs_generator(struct brw_context *brw,
 654                      struct brw_wm_compile *c,
 655                      struct gl_shader_program *prog,
 656                      struct gl_fragment_program *fp,
 657                      bool dual_source_output);
 658    ~gen8_fs_generator();
 659
 660    const unsigned *generate_assembly(exec_list *simd8_instructions,
 661                                      exec_list *simd16_instructions,
 662                                      unsigned *assembly_size);
 663
 664 private:
 665    void generate_code(exec_list *instructions);
 666    void generate_fb_write(fs_inst *inst);
 667    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 668                          struct brw_reg *src);
 669    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 670    void generate_math1(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 671    void generate_math2(fs_inst *inst, struct brw_reg dst,
 672                        struct brw_reg src0, struct brw_reg src1);
 673    void generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 674    void generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 675                      bool negate_value);
 676    void generate_scratch_write(fs_inst *inst, struct brw_reg src);
 677    void generate_scratch_read(fs_inst *inst, struct brw_reg dst);
 678    void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst);
 679    void generate_uniform_pull_constant_load(fs_inst *inst,
 680                                             struct brw_reg dst,
 681                                             struct brw_reg index,
 682                                             struct brw_reg offset);
 683    void generate_varying_pull_constant_load(fs_inst *inst,
 684                                             struct brw_reg dst,
 685                                             struct brw_reg index,
 686                                             struct brw_reg offset);
 687    void generate_mov_dispatch_to_flags(fs_inst *ir);
 688    void generate_set_simd4x2_offset(fs_inst *ir,
 689                                     struct brw_reg dst,
 690                                     struct brw_reg offset);
 691    void generate_discard_jump(fs_inst *ir);
 692
 693    void patch_discard_jumps_to_fb_writes();
 694
 695    void mark_surface_used(unsigned surf_index);
 696
 697    struct brw_wm_compile *c;
 698    const struct gl_fragment_program *fp;
 699
 700    unsigned dispatch_width; /** 8 or 16 */
 701
 702    bool dual_source_output;
 703
 704    exec_list discard_halt_patches;
 705 };
 706
 707 bool brw_do_channel_expressions(struct exec_list *instructions);
 708 bool brw_do_vector_splitting(struct exec_list *instructions);
 709 bool brw_fs_precompile(struct gl_context *ctx, struct gl_shader_program *prog);
 710
 711 struct brw_reg brw_reg_from_fs_reg(fs_reg *reg);