2 * Copyright © 2010 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
30 #include "brw_shader.h"
34 #include <sys/types.h>
36 #include "main/macros.h"
37 #include "main/shaderobj.h"
38 #include "main/uniforms.h"
39 #include "program/prog_parameter.h"
40 #include "program/prog_print.h"
41 #include "program/prog_optimize.h"
42 #include "program/register_allocate.h"
43 #include "program/sampler.h"
44 #include "program/hash_table.h"
45 #include "brw_context.h"
48 #include "brw_shader.h"
50 #include "glsl/glsl_types.h"
64 FIXED_HW_REG
, /* a struct brw_reg */
65 UNIFORM
, /* prog_data->params[reg] */
70 /* Callers of this ralloc-based new need not call delete. It's
71 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
72 static void* operator new(size_t size
, void *ctx
)
76 node
= ralloc_size(ctx
, size
);
88 fs_reg(struct brw_reg fixed_hw_reg
);
89 fs_reg(enum register_file file
, int reg
);
90 fs_reg(enum register_file file
, int reg
, uint32_t type
);
91 fs_reg(class fs_visitor
*v
, const struct glsl_type
*type
);
93 bool equals(const fs_reg
&r
) const;
95 /** Register file: ARF, GRF, MRF, IMM. */
96 enum register_file file
;
98 * Register number. For ARF/MRF, it's the hardware register. For
99 * GRF, it's a virtual register number until register allocation
103 * For virtual registers, this is a hardware register offset from
104 * the start of the register block (for example, a constant index
105 * in an array access).
108 /** Register type. BRW_REGISTER_TYPE_* */
113 struct brw_reg fixed_hw_reg
;
114 int smear
; /* -1, or a channel of the reg to smear to all channels. */
116 /** Value for file == IMM */
124 static const fs_reg reg_undef
;
125 static const fs_reg
reg_null_f(ARF
, BRW_ARF_NULL
, BRW_REGISTER_TYPE_F
);
126 static const fs_reg
reg_null_d(ARF
, BRW_ARF_NULL
, BRW_REGISTER_TYPE_D
);
128 class fs_inst
: public backend_instruction
{
130 /* Callers of this ralloc-based new need not call delete. It's
131 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
132 static void* operator new(size_t size
, void *ctx
)
136 node
= rzalloc_size(ctx
, size
);
137 assert(node
!= NULL
);
145 fs_inst(enum opcode opcode
);
146 fs_inst(enum opcode opcode
, fs_reg dst
);
147 fs_inst(enum opcode opcode
, fs_reg dst
, fs_reg src0
);
148 fs_inst(enum opcode opcode
, fs_reg dst
, fs_reg src0
, fs_reg src1
);
149 fs_inst(enum opcode opcode
, fs_reg dst
,
150 fs_reg src0
, fs_reg src1
,fs_reg src2
);
152 bool equals(fs_inst
*inst
);
154 bool overwrites_reg(const fs_reg
®
);
161 int conditional_mod
; /**< BRW_CONDITIONAL_* */
163 int mlen
; /**< SEND message length */
164 int base_mrf
; /**< First MRF in the SEND message, if mlen is nonzero. */
165 uint32_t texture_offset
; /**< Texture offset bitfield */
167 int target
; /**< MRT target. */
171 bool force_uncompressed
;
173 uint32_t offset
; /* spill/unspill offset */
176 * Annotation for the generated IR. One of the two can be set.
179 const char *annotation
;
183 class fs_visitor
: public backend_visitor
187 fs_visitor(struct brw_wm_compile
*c
, struct gl_shader_program
*prog
,
188 struct brw_shader
*shader
);
191 fs_reg
*variable_storage(ir_variable
*var
);
192 int virtual_grf_alloc(int size
);
193 void import_uniforms(fs_visitor
*v
);
195 void visit(ir_variable
*ir
);
196 void visit(ir_assignment
*ir
);
197 void visit(ir_dereference_variable
*ir
);
198 void visit(ir_dereference_record
*ir
);
199 void visit(ir_dereference_array
*ir
);
200 void visit(ir_expression
*ir
);
201 void visit(ir_texture
*ir
);
202 void visit(ir_if
*ir
);
203 void visit(ir_constant
*ir
);
204 void visit(ir_swizzle
*ir
);
205 void visit(ir_return
*ir
);
206 void visit(ir_loop
*ir
);
207 void visit(ir_loop_jump
*ir
);
208 void visit(ir_discard
*ir
);
209 void visit(ir_call
*ir
);
210 void visit(ir_function
*ir
);
211 void visit(ir_function_signature
*ir
);
213 void swizzle_result(ir_texture
*ir
, fs_reg orig_val
, int sampler
);
215 fs_inst
*emit(fs_inst inst
);
217 fs_inst
*emit(enum opcode opcode
);
218 fs_inst
*emit(enum opcode opcode
, fs_reg dst
);
219 fs_inst
*emit(enum opcode opcode
, fs_reg dst
, fs_reg src0
);
220 fs_inst
*emit(enum opcode opcode
, fs_reg dst
, fs_reg src0
, fs_reg src1
);
221 fs_inst
*emit(enum opcode opcode
, fs_reg dst
,
222 fs_reg src0
, fs_reg src1
, fs_reg src2
);
224 int type_size(const struct glsl_type
*type
);
225 fs_inst
*get_instruction_generating_reg(fs_inst
*start
,
230 void setup_paramvalues_refs();
231 void assign_curb_setup();
232 void calculate_urb_setup();
233 void assign_urb_setup();
235 void assign_regs_trivial();
236 int choose_spill_reg(struct ra_graph
*g
);
237 void spill_reg(int spill_reg
);
238 void split_virtual_grfs();
239 void setup_pull_constants();
240 void calculate_live_intervals();
241 bool opt_algebraic();
243 bool opt_cse_local(bblock_t
*block
, exec_list
*aeb
);
244 bool opt_copy_propagate();
245 bool try_copy_propagate(fs_inst
*inst
, int arg
, acp_entry
*entry
);
246 bool try_constant_propagate(fs_inst
*inst
, acp_entry
*entry
);
247 bool opt_copy_propagate_local(void *mem_ctx
, bblock_t
*block
);
248 bool register_coalesce();
249 bool register_coalesce_2();
250 bool compute_to_mrf();
251 bool dead_code_eliminate();
252 bool remove_dead_constants();
253 bool remove_duplicate_mrf_writes();
254 bool virtual_grf_interferes(int a
, int b
);
255 void schedule_instructions();
256 void fail(const char *msg
, ...);
258 void push_force_uncompressed();
259 void pop_force_uncompressed();
260 void push_force_sechalf();
261 void pop_force_sechalf();
263 void generate_code();
264 void generate_fb_write(fs_inst
*inst
);
265 void generate_pixel_xy(struct brw_reg dst
, bool is_x
);
266 void generate_linterp(fs_inst
*inst
, struct brw_reg dst
,
267 struct brw_reg
*src
);
268 void generate_tex(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg src
);
269 void generate_math1_gen7(fs_inst
*inst
,
272 void generate_math2_gen7(fs_inst
*inst
,
275 struct brw_reg src1
);
276 void generate_math1_gen6(fs_inst
*inst
,
279 void generate_math2_gen6(fs_inst
*inst
,
282 struct brw_reg src1
);
283 void generate_math_gen4(fs_inst
*inst
,
286 void generate_discard(fs_inst
*inst
);
287 void generate_ddx(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg src
);
288 void generate_ddy(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg src
,
290 void generate_spill(fs_inst
*inst
, struct brw_reg src
);
291 void generate_unspill(fs_inst
*inst
, struct brw_reg dst
);
292 void generate_pull_constant_load(fs_inst
*inst
, struct brw_reg dst
,
293 struct brw_reg index
,
294 struct brw_reg offset
);
295 void generate_mov_dispatch_to_flags();
297 void emit_dummy_fs();
298 fs_reg
*emit_fragcoord_interpolation(ir_variable
*ir
);
299 fs_inst
*emit_linterp(const fs_reg
&attr
, const fs_reg
&interp
,
300 glsl_interp_qualifier interpolation_mode
,
302 fs_reg
*emit_frontfacing_interpolation(ir_variable
*ir
);
303 fs_reg
*emit_general_interpolation(ir_variable
*ir
);
304 void emit_interpolation_setup_gen4();
305 void emit_interpolation_setup_gen6();
306 fs_reg
rescale_texcoord(ir_texture
*ir
, fs_reg coordinate
,
307 bool is_rect
, int sampler
, int texunit
);
308 fs_inst
*emit_texture_gen4(ir_texture
*ir
, fs_reg dst
, fs_reg coordinate
,
309 fs_reg shadow_comp
, fs_reg lod
, fs_reg lod2
);
310 fs_inst
*emit_texture_gen5(ir_texture
*ir
, fs_reg dst
, fs_reg coordinate
,
311 fs_reg shadow_comp
, fs_reg lod
, fs_reg lod2
);
312 fs_inst
*emit_texture_gen7(ir_texture
*ir
, fs_reg dst
, fs_reg coordinate
,
313 fs_reg shadow_comp
, fs_reg lod
, fs_reg lod2
);
314 fs_inst
*emit_math(enum opcode op
, fs_reg dst
, fs_reg src0
);
315 fs_inst
*emit_math(enum opcode op
, fs_reg dst
, fs_reg src0
, fs_reg src1
);
316 void emit_minmax(uint32_t conditionalmod
, fs_reg dst
,
317 fs_reg src0
, fs_reg src1
);
318 bool try_emit_saturate(ir_expression
*ir
);
319 bool try_emit_mad(ir_expression
*ir
, int mul_arg
);
320 void emit_bool_to_cond_code(ir_rvalue
*condition
);
321 void emit_if_gen6(ir_if
*ir
);
322 void emit_unspill(fs_inst
*inst
, fs_reg reg
, uint32_t spill_offset
);
324 void emit_fragment_program_code();
325 void setup_fp_regs();
326 fs_reg
get_fp_src_reg(const prog_src_register
*src
);
327 fs_reg
get_fp_dst_reg(const prog_dst_register
*dst
);
328 void emit_fp_alu1(enum opcode opcode
,
329 const struct prog_instruction
*fpi
,
330 fs_reg dst
, fs_reg src
);
331 void emit_fp_alu2(enum opcode opcode
,
332 const struct prog_instruction
*fpi
,
333 fs_reg dst
, fs_reg src0
, fs_reg src1
);
334 void emit_fp_scalar_write(const struct prog_instruction
*fpi
,
335 fs_reg dst
, fs_reg src
);
336 void emit_fp_scalar_math(enum opcode opcode
,
337 const struct prog_instruction
*fpi
,
338 fs_reg dst
, fs_reg src
);
340 void emit_fp_minmax(const struct prog_instruction
*fpi
,
341 fs_reg dst
, fs_reg src0
, fs_reg src1
);
343 void emit_fp_sop(uint32_t conditional_mod
,
344 const struct prog_instruction
*fpi
,
345 fs_reg dst
, fs_reg src0
, fs_reg src1
, fs_reg one
);
347 void emit_color_write(int target
, int index
, int first_color_mrf
);
348 void emit_fb_writes();
349 bool try_rewrite_rhs_to_dst(ir_assignment
*ir
,
352 fs_inst
*pre_rhs_inst
,
353 fs_inst
*last_rhs_inst
);
354 void emit_assignment_writes(fs_reg
&l
, fs_reg
&r
,
355 const glsl_type
*type
, bool predicated
);
356 void resolve_ud_negate(fs_reg
*reg
);
357 void resolve_bool_comparison(ir_rvalue
*rvalue
, fs_reg
*reg
);
359 struct brw_reg
interp_reg(int location
, int channel
);
360 int setup_uniform_values(int loc
, const glsl_type
*type
);
361 void setup_builtin_uniform_values(ir_variable
*ir
);
362 int implied_mrf_writes(fs_inst
*inst
);
364 const struct gl_fragment_program
*fp
;
365 struct brw_wm_compile
*c
;
367 /* Delayed setup of c->prog_data.params[] due to realloc of
368 * ParamValues[] during compile.
370 int param_index
[MAX_UNIFORMS
* 4];
371 int param_offset
[MAX_UNIFORMS
* 4];
373 int *virtual_grf_sizes
;
374 int virtual_grf_count
;
375 int virtual_grf_array_size
;
376 int *virtual_grf_def
;
377 int *virtual_grf_use
;
378 bool live_intervals_valid
;
380 /* This is the map from UNIFORM hw_reg + reg_offset as generated by
381 * the visitor to the packed uniform number after
382 * remove_dead_constants() that represents the actual uploaded
387 struct hash_table
*variable_ht
;
389 fs_reg outputs
[BRW_MAX_DRAW_BUFFERS
];
390 unsigned output_components
[BRW_MAX_DRAW_BUFFERS
];
391 fs_reg dual_src_output
;
392 int first_non_payload_grf
;
393 /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
395 int urb_setup
[FRAG_ATTRIB_MAX
];
397 fs_reg
*fp_temp_regs
;
398 fs_reg
*fp_input_regs
;
400 /** @{ debug annotation info */
401 const char *current_annotation
;
408 /* Result of last visit() method. */
415 fs_reg delta_x
[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT
];
416 fs_reg delta_y
[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT
];
421 int force_uncompressed_stack
;
422 int force_sechalf_stack
;
424 class bblock_t
*bblock
;
427 bool brw_do_channel_expressions(struct exec_list
*instructions
);
428 bool brw_do_vector_splitting(struct exec_list
*instructions
);
429 bool brw_fs_precompile(struct gl_context
*ctx
, struct gl_shader_program
*prog
);