2 * Copyright © 2010 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
30 #include "brw_shader.h"
31 #include "brw_ir_fs.h"
32 #include "brw_fs_builder.h"
36 #include <sys/types.h>
38 #include "main/macros.h"
39 #include "main/shaderobj.h"
40 #include "main/uniforms.h"
41 #include "program/prog_parameter.h"
42 #include "program/prog_print.h"
43 #include "program/prog_optimize.h"
44 #include "util/register_allocate.h"
45 #include "program/hash_table.h"
46 #include "brw_context.h"
49 #include "intel_asm_annotation.h"
51 #include "glsl/nir/glsl_types.h"
53 #include "glsl/nir/nir.h"
54 #include "program/sampler.h"
62 class fs_live_variables
;
65 struct brw_gs_compile
;
68 offset(fs_reg reg
, const brw::fs_builder
& bld
, unsigned delta
)
78 return byte_offset(reg
,
79 delta
* reg
.component_size(bld
.dispatch_width()));
81 reg
.reg_offset
+= delta
;
90 * The fragment shader front-end.
92 * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
94 class fs_visitor
: public backend_shader
97 fs_visitor(const struct brw_compiler
*compiler
, void *log_data
,
100 struct brw_stage_prog_data
*prog_data
,
101 struct gl_program
*prog
,
102 const nir_shader
*shader
,
103 unsigned dispatch_width
,
104 int shader_time_index
);
105 fs_visitor(const struct brw_compiler
*compiler
, void *log_data
,
107 struct brw_gs_compile
*gs_compile
,
108 struct brw_gs_prog_data
*prog_data
,
109 const nir_shader
*shader
,
110 int shader_time_index
);
114 fs_reg
vgrf(const glsl_type
*const type
);
115 void import_uniforms(fs_visitor
*v
);
116 void setup_uniform_clipplane_values(gl_clip_plane
*clip_planes
);
117 void compute_clip_distance(gl_clip_plane
*clip_planes
);
119 uint32_t gather_channel(int orig_chan
, uint32_t sampler
);
120 void swizzle_result(ir_texture_opcode op
, int dest_components
,
121 fs_reg orig_val
, uint32_t sampler
);
123 fs_inst
*get_instruction_generating_reg(fs_inst
*start
,
127 void VARYING_PULL_CONSTANT_LOAD(const brw::fs_builder
&bld
,
129 const fs_reg
&surf_index
,
130 const fs_reg
&varying_offset
,
131 uint32_t const_offset
);
132 void DEP_RESOLVE_MOV(const brw::fs_builder
&bld
, int grf
);
134 bool run_fs(bool do_rep_send
);
135 bool run_vs(gl_clip_plane
*clip_planes
);
139 void allocate_registers();
140 void setup_payload_gen4();
141 void setup_payload_gen6();
142 void setup_vs_payload();
143 void setup_gs_payload();
144 void setup_cs_payload();
145 void fixup_3src_null_dest();
146 void assign_curb_setup();
147 void calculate_urb_setup();
148 void assign_urb_setup();
149 void convert_attr_sources_to_hw_regs(fs_inst
*inst
);
150 void assign_vs_urb_setup();
151 void assign_gs_urb_setup();
152 bool assign_regs(bool allow_spilling
);
153 void assign_regs_trivial();
154 void calculate_payload_ranges(int payload_node_count
,
155 int *payload_last_use_ip
);
156 void setup_payload_interference(struct ra_graph
*g
, int payload_reg_count
,
157 int first_payload_node
);
158 int choose_spill_reg(struct ra_graph
*g
);
159 void spill_reg(int spill_reg
);
160 void split_virtual_grfs();
161 bool compact_virtual_grfs();
162 void assign_constant_locations();
163 void demote_pull_constants();
164 void invalidate_live_intervals();
165 void calculate_live_intervals();
166 void calculate_register_pressure();
168 bool opt_algebraic();
169 bool opt_redundant_discard_jumps();
171 bool opt_cse_local(bblock_t
*block
);
172 bool opt_copy_propagate();
173 bool try_copy_propagate(fs_inst
*inst
, int arg
, acp_entry
*entry
);
174 bool try_constant_propagate(fs_inst
*inst
, acp_entry
*entry
);
175 bool opt_copy_propagate_local(void *mem_ctx
, bblock_t
*block
,
177 bool opt_register_renaming();
178 bool register_coalesce();
179 bool compute_to_mrf();
180 bool eliminate_find_live_channel();
181 bool dead_code_eliminate();
182 bool remove_duplicate_mrf_writes();
184 bool opt_sampler_eot();
185 bool virtual_grf_interferes(int a
, int b
);
186 void schedule_instructions(instruction_scheduler_mode mode
);
187 void insert_gen4_send_dependency_workarounds();
188 void insert_gen4_pre_send_dependency_workarounds(bblock_t
*block
,
190 void insert_gen4_post_send_dependency_workarounds(bblock_t
*block
,
192 void vfail(const char *msg
, va_list args
);
193 void fail(const char *msg
, ...);
194 void no16(const char *msg
);
195 void lower_uniform_pull_constant_loads();
196 bool lower_load_payload();
197 bool lower_logical_sends();
198 bool lower_integer_multiplication();
199 bool lower_simd_width();
200 bool opt_combine_constants();
202 void emit_dummy_fs();
203 void emit_repclear_shader();
204 fs_reg
*emit_fragcoord_interpolation(bool pixel_center_integer
,
205 bool origin_upper_left
);
206 fs_inst
*emit_linterp(const fs_reg
&attr
, const fs_reg
&interp
,
207 glsl_interp_qualifier interpolation_mode
,
208 bool is_centroid
, bool is_sample
);
209 fs_reg
*emit_frontfacing_interpolation();
210 fs_reg
*emit_samplepos_setup();
211 fs_reg
*emit_sampleid_setup();
212 void emit_general_interpolation(fs_reg attr
, const char *name
,
213 const glsl_type
*type
,
214 glsl_interp_qualifier interpolation_mode
,
215 int location
, bool mod_centroid
,
217 fs_reg
*emit_vs_system_value(int location
);
218 void emit_interpolation_setup_gen4();
219 void emit_interpolation_setup_gen6();
220 void compute_sample_position(fs_reg dst
, fs_reg int_sample_pos
);
221 void emit_texture(ir_texture_opcode op
,
222 const glsl_type
*dest_type
,
223 fs_reg coordinate
, int components
,
225 fs_reg lod
, fs_reg dpdy
, int grad_components
,
229 int gather_component
,
233 fs_reg
emit_mcs_fetch(const fs_reg
&coordinate
, unsigned components
,
234 const fs_reg
&sampler
);
235 void emit_gen6_gather_wa(uint8_t wa
, fs_reg dst
);
236 fs_reg
resolve_source_modifiers(const fs_reg
&src
);
237 void emit_discard_jump();
238 bool opt_peephole_sel();
239 bool opt_peephole_predicated_break();
240 bool opt_saturate_propagation();
241 bool opt_cmod_propagation();
242 bool opt_zero_samples();
243 void emit_unspill(bblock_t
*block
, fs_inst
*inst
, fs_reg reg
,
244 uint32_t spill_offset
, int count
);
245 void emit_spill(bblock_t
*block
, fs_inst
*inst
, fs_reg reg
,
246 uint32_t spill_offset
, int count
);
248 void emit_nir_code();
249 void nir_setup_inputs();
250 void nir_setup_outputs();
251 void nir_setup_uniforms();
252 void nir_emit_system_values();
253 void nir_emit_impl(nir_function_impl
*impl
);
254 void nir_emit_cf_list(exec_list
*list
);
255 void nir_emit_if(nir_if
*if_stmt
);
256 void nir_emit_loop(nir_loop
*loop
);
257 void nir_emit_block(nir_block
*block
);
258 void nir_emit_instr(nir_instr
*instr
);
259 void nir_emit_alu(const brw::fs_builder
&bld
, nir_alu_instr
*instr
);
260 void nir_emit_load_const(const brw::fs_builder
&bld
,
261 nir_load_const_instr
*instr
);
262 void nir_emit_undef(const brw::fs_builder
&bld
,
263 nir_ssa_undef_instr
*instr
);
264 void nir_emit_vs_intrinsic(const brw::fs_builder
&bld
,
265 nir_intrinsic_instr
*instr
);
266 void nir_emit_gs_intrinsic(const brw::fs_builder
&bld
,
267 nir_intrinsic_instr
*instr
);
268 void nir_emit_fs_intrinsic(const brw::fs_builder
&bld
,
269 nir_intrinsic_instr
*instr
);
270 void nir_emit_cs_intrinsic(const brw::fs_builder
&bld
,
271 nir_intrinsic_instr
*instr
);
272 void nir_emit_intrinsic(const brw::fs_builder
&bld
,
273 nir_intrinsic_instr
*instr
);
274 void nir_emit_ssbo_atomic(const brw::fs_builder
&bld
,
275 int op
, nir_intrinsic_instr
*instr
);
276 void nir_emit_texture(const brw::fs_builder
&bld
,
277 nir_tex_instr
*instr
);
278 void nir_emit_jump(const brw::fs_builder
&bld
,
279 nir_jump_instr
*instr
);
280 fs_reg
get_nir_src(nir_src src
);
281 fs_reg
get_nir_dest(nir_dest dest
);
282 fs_reg
get_nir_image_deref(const nir_deref_var
*deref
);
283 void emit_percomp(const brw::fs_builder
&bld
, const fs_inst
&inst
,
286 bool optimize_frontfacing_ternary(nir_alu_instr
*instr
,
287 const fs_reg
&result
);
289 void emit_alpha_test();
290 fs_inst
*emit_single_fb_write(const brw::fs_builder
&bld
,
291 fs_reg color1
, fs_reg color2
,
292 fs_reg src0_alpha
, unsigned components
);
293 void emit_fb_writes();
294 void emit_urb_writes(const fs_reg
&gs_vertex_count
= fs_reg());
295 void set_gs_stream_control_data_bits(const fs_reg
&vertex_count
,
297 void emit_gs_control_data_bits(const fs_reg
&vertex_count
);
298 void emit_gs_end_primitive(const nir_src
&vertex_count_nir_src
);
299 void emit_gs_vertex(const nir_src
&vertex_count_nir_src
,
301 void emit_gs_thread_end();
302 void emit_gs_input_load(const fs_reg
&dst
, const nir_src
&vertex_src
,
303 const fs_reg
&indirect_offset
, unsigned imm_offset
,
304 unsigned num_components
);
305 void emit_cs_terminate();
306 fs_reg
*emit_cs_local_invocation_id_setup();
307 fs_reg
*emit_cs_work_group_id_setup();
311 void emit_shader_time_begin();
312 void emit_shader_time_end();
313 void SHADER_TIME_ADD(const brw::fs_builder
&bld
,
314 int shader_time_subindex
,
317 fs_reg
get_timestamp(const brw::fs_builder
&bld
);
319 struct brw_reg
interp_reg(int location
, int channel
);
321 int implied_mrf_writes(fs_inst
*inst
);
323 virtual void dump_instructions();
324 virtual void dump_instructions(const char *name
);
325 void dump_instruction(backend_instruction
*inst
);
326 void dump_instruction(backend_instruction
*inst
, FILE *file
);
328 const void *const key
;
329 const struct brw_sampler_prog_key_data
*key_tex
;
331 struct brw_gs_compile
*gs_compile
;
333 struct brw_stage_prog_data
*prog_data
;
334 struct gl_program
*prog
;
338 int *virtual_grf_start
;
339 int *virtual_grf_end
;
340 brw::fs_live_variables
*live_intervals
;
342 int *regs_live_at_ip
;
344 /** Number of uniform variable components visited. */
347 /** Byte-offset for the next available spot in the scratch space buffer. */
348 unsigned last_scratch
;
351 * Array mapping UNIFORM register numbers to the pull parameter index,
352 * or -1 if this uniform register isn't being uploaded as a pull constant.
354 int *pull_constant_loc
;
357 * Array mapping UNIFORM register numbers to the push parameter index,
358 * or -1 if this uniform register isn't being uploaded as a push constant.
360 int *push_constant_loc
;
365 fs_reg outputs
[VARYING_SLOT_MAX
];
366 unsigned output_components
[VARYING_SLOT_MAX
];
367 fs_reg dual_src_output
;
369 int first_non_payload_grf
;
370 /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
374 fs_reg
*nir_ssa_values
;
377 fs_reg
*nir_system_values
;
381 bool simd16_unsupported
;
384 /* Result of last visit() method. Still used by emit_texture() */
387 /** Register numbers for thread payload fields. */
388 struct thread_payload
{
389 uint8_t source_depth_reg
;
390 uint8_t source_w_reg
;
391 uint8_t aa_dest_stencil_reg
;
392 uint8_t dest_depth_reg
;
393 uint8_t sample_pos_reg
;
394 uint8_t sample_mask_in_reg
;
395 uint8_t barycentric_coord_reg
[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT
];
396 uint8_t local_invocation_id_reg
;
398 /** The number of thread payload registers the hardware will supply. */
402 bool source_depth_to_render_target
;
403 bool runtime_check_aads_emit
;
409 fs_reg delta_xy
[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT
];
410 fs_reg shader_start_time
;
411 fs_reg userplane
[MAX_CLIP_PLANES
];
412 fs_reg final_gs_vertex_count
;
413 fs_reg control_data_bits
;
416 bool spilled_any_registers
;
418 const unsigned dispatch_width
; /**< 8 or 16 */
420 int shader_time_index
;
422 unsigned promoted_constants
;
427 * The fragment shader code generator.
429 * Translates FS IR to actual i965 assembly code.
434 fs_generator(const struct brw_compiler
*compiler
, void *log_data
,
437 struct brw_stage_prog_data
*prog_data
,
438 unsigned promoted_constants
,
439 bool runtime_check_aads_emit
,
440 const char *stage_abbrev
);
443 void enable_debug(const char *shader_name
);
444 int generate_code(const cfg_t
*cfg
, int dispatch_width
);
445 const unsigned *get_assembly(unsigned int *assembly_size
);
448 void fire_fb_write(fs_inst
*inst
,
449 struct brw_reg payload
,
450 struct brw_reg implied_header
,
452 void generate_fb_write(fs_inst
*inst
, struct brw_reg payload
);
453 void generate_urb_read(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg payload
);
454 void generate_urb_write(fs_inst
*inst
, struct brw_reg payload
);
455 void generate_cs_terminate(fs_inst
*inst
, struct brw_reg payload
);
456 void generate_stencil_ref_packing(fs_inst
*inst
, struct brw_reg dst
,
458 void generate_barrier(fs_inst
*inst
, struct brw_reg src
);
459 void generate_blorp_fb_write(fs_inst
*inst
);
460 void generate_linterp(fs_inst
*inst
, struct brw_reg dst
,
461 struct brw_reg
*src
);
462 void generate_tex(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg src
,
463 struct brw_reg sampler_index
);
464 void generate_get_buffer_size(fs_inst
*inst
, struct brw_reg dst
,
466 struct brw_reg surf_index
);
467 void generate_math_gen6(fs_inst
*inst
,
470 struct brw_reg src1
);
471 void generate_math_gen4(fs_inst
*inst
,
474 void generate_math_g45(fs_inst
*inst
,
477 void generate_ddx(enum opcode op
, struct brw_reg dst
, struct brw_reg src
);
478 void generate_ddy(enum opcode op
, struct brw_reg dst
, struct brw_reg src
,
480 void generate_scratch_write(fs_inst
*inst
, struct brw_reg src
);
481 void generate_scratch_read(fs_inst
*inst
, struct brw_reg dst
);
482 void generate_scratch_read_gen7(fs_inst
*inst
, struct brw_reg dst
);
483 void generate_uniform_pull_constant_load(fs_inst
*inst
, struct brw_reg dst
,
484 struct brw_reg index
,
485 struct brw_reg offset
);
486 void generate_uniform_pull_constant_load_gen7(fs_inst
*inst
,
488 struct brw_reg surf_index
,
489 struct brw_reg offset
);
490 void generate_varying_pull_constant_load(fs_inst
*inst
, struct brw_reg dst
,
491 struct brw_reg index
,
492 struct brw_reg offset
);
493 void generate_varying_pull_constant_load_gen7(fs_inst
*inst
,
495 struct brw_reg index
,
496 struct brw_reg offset
);
497 void generate_mov_dispatch_to_flags(fs_inst
*inst
);
499 void generate_pixel_interpolator_query(fs_inst
*inst
,
502 struct brw_reg msg_data
,
505 void generate_set_sample_id(fs_inst
*inst
,
508 struct brw_reg src1
);
510 void generate_set_simd4x2_offset(fs_inst
*inst
,
512 struct brw_reg offset
);
513 void generate_discard_jump(fs_inst
*inst
);
515 void generate_pack_half_2x16_split(fs_inst
*inst
,
519 void generate_unpack_half_2x16_split(fs_inst
*inst
,
523 void generate_shader_time_add(fs_inst
*inst
,
524 struct brw_reg payload
,
525 struct brw_reg offset
,
526 struct brw_reg value
);
528 void generate_mov_indirect(fs_inst
*inst
,
531 struct brw_reg indirect_byte_offset
);
533 bool patch_discard_jumps_to_fb_writes();
535 const struct brw_compiler
*compiler
;
536 void *log_data
; /* Passed to compiler->*_log functions */
538 const struct brw_device_info
*devinfo
;
540 struct brw_codegen
*p
;
541 const void * const key
;
542 struct brw_stage_prog_data
* const prog_data
;
544 unsigned dispatch_width
; /**< 8 or 16 */
546 exec_list discard_halt_patches
;
547 unsigned promoted_constants
;
548 bool runtime_check_aads_emit
;
550 const char *shader_name
;
551 const char *stage_abbrev
;
555 bool brw_do_channel_expressions(struct exec_list
*instructions
);
556 bool brw_do_vector_splitting(struct exec_list
*instructions
);