src/mesa/drivers/dri/i965/brw_fs.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #pragma once
  29
  30 #include "brw_shader.h"
  31 #include "brw_ir_fs.h"
  32
  33 extern "C" {
  34
  35 #include <sys/types.h>
  36
  37 #include "main/macros.h"
  38 #include "main/shaderobj.h"
  39 #include "main/uniforms.h"
  40 #include "program/prog_parameter.h"
  41 #include "program/prog_print.h"
  42 #include "program/prog_optimize.h"
  43 #include "util/register_allocate.h"
  44 #include "program/hash_table.h"
  45 #include "brw_context.h"
  46 #include "brw_eu.h"
  47 #include "brw_wm.h"
  48 #include "intel_asm_annotation.h"
  49 }
  50 #include "glsl/glsl_types.h"
  51 #include "glsl/ir.h"
  52 #include "glsl/nir/nir.h"
  53 #include "program/sampler.h"
  54
  55 struct bblock_t;
  56 namespace {
  57    struct acp_entry;
  58 }
  59
  60 namespace brw {
  61    class fs_live_variables;
  62 }
  63
  64 /**
  65  * The fragment shader front-end.
  66  *
  67  * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
  68  */
  69 class fs_visitor : public backend_shader, public ir_visitor
  70 {
  71 public:
  72    const fs_reg reg_null_f;
  73    const fs_reg reg_null_d;
  74    const fs_reg reg_null_ud;
  75
  76    fs_visitor(struct brw_context *brw,
  77               void *mem_ctx,
  78               gl_shader_stage stage,
  79               const void *key,
  80               struct brw_stage_prog_data *prog_data,
  81               struct gl_shader_program *shader_prog,
  82               struct gl_program *prog,
  83               unsigned dispatch_width);
  84
  85    ~fs_visitor();
  86
  87    fs_reg *variable_storage(ir_variable *var);
  88    fs_reg vgrf(const glsl_type *const type);
  89    fs_reg vgrf(int num_components);
  90    void import_uniforms(fs_visitor *v);
  91    void setup_uniform_clipplane_values();
  92    void compute_clip_distance();
  93
  94    void visit(ir_variable *ir);
  95    void visit(ir_assignment *ir);
  96    void visit(ir_dereference_variable *ir);
  97    void visit(ir_dereference_record *ir);
  98    void visit(ir_dereference_array *ir);
  99    void visit(ir_expression *ir);
 100    void visit(ir_texture *ir);
 101    void visit(ir_if *ir);
 102    void visit(ir_constant *ir);
 103    void visit(ir_swizzle *ir);
 104    void visit(ir_return *ir);
 105    void visit(ir_loop *ir);
 106    void visit(ir_loop_jump *ir);
 107    void visit(ir_discard *ir);
 108    void visit(ir_call *ir);
 109    void visit(ir_function *ir);
 110    void visit(ir_function_signature *ir);
 111    void visit(ir_emit_vertex *);
 112    void visit(ir_end_primitive *);
 113
 114    uint32_t gather_channel(int orig_chan, uint32_t sampler);
 115    void swizzle_result(ir_texture_opcode op, int dest_components,
 116                        fs_reg orig_val, uint32_t sampler);
 117
 118    fs_inst *emit(fs_inst *inst);
 119    void emit(exec_list list);
 120
 121    fs_inst *emit(enum opcode opcode);
 122    fs_inst *emit(enum opcode opcode, const fs_reg &dst);
 123    fs_inst *emit(enum opcode opcode, const fs_reg &dst, const fs_reg &src0);
 124    fs_inst *emit(enum opcode opcode, const fs_reg &dst, const fs_reg &src0,
 125                  const fs_reg &src1);
 126    fs_inst *emit(enum opcode opcode, const fs_reg &dst,
 127                  const fs_reg &src0, const fs_reg &src1, const fs_reg &src2);
 128    fs_inst *emit(enum opcode opcode, const fs_reg &dst,
 129                  fs_reg src[], int sources);
 130
 131    fs_inst *MOV(const fs_reg &dst, const fs_reg &src);
 132    fs_inst *NOT(const fs_reg &dst, const fs_reg &src);
 133    fs_inst *RNDD(const fs_reg &dst, const fs_reg &src);
 134    fs_inst *RNDE(const fs_reg &dst, const fs_reg &src);
 135    fs_inst *RNDZ(const fs_reg &dst, const fs_reg &src);
 136    fs_inst *FRC(const fs_reg &dst, const fs_reg &src);
 137    fs_inst *ADD(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 138    fs_inst *MUL(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 139    fs_inst *MACH(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 140    fs_inst *MAC(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 141    fs_inst *SHL(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 142    fs_inst *SHR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 143    fs_inst *ASR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 144    fs_inst *AND(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 145    fs_inst *OR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 146    fs_inst *XOR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 147    fs_inst *IF(enum brw_predicate predicate);
 148    fs_inst *IF(const fs_reg &src0, const fs_reg &src1,
 149                enum brw_conditional_mod condition);
 150    fs_inst *CMP(fs_reg dst, fs_reg src0, fs_reg src1,
 151                 enum brw_conditional_mod condition);
 152    fs_inst *LRP(const fs_reg &dst, const fs_reg &a, const fs_reg &y,
 153                 const fs_reg &x);
 154    fs_inst *DEP_RESOLVE_MOV(int grf);
 155    fs_inst *BFREV(const fs_reg &dst, const fs_reg &value);
 156    fs_inst *BFE(const fs_reg &dst, const fs_reg &bits, const fs_reg &offset,
 157                 const fs_reg &value);
 158    fs_inst *BFI1(const fs_reg &dst, const fs_reg &bits, const fs_reg &offset);
 159    fs_inst *BFI2(const fs_reg &dst, const fs_reg &bfi1_dst,
 160                  const fs_reg &insert, const fs_reg &base);
 161    fs_inst *FBH(const fs_reg &dst, const fs_reg &value);
 162    fs_inst *FBL(const fs_reg &dst, const fs_reg &value);
 163    fs_inst *CBIT(const fs_reg &dst, const fs_reg &value);
 164    fs_inst *MAD(const fs_reg &dst, const fs_reg &c, const fs_reg &b,
 165                 const fs_reg &a);
 166    fs_inst *ADDC(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 167    fs_inst *SUBB(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 168    fs_inst *SEL(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 169
 170    int type_size(const struct glsl_type *type);
 171    fs_inst *get_instruction_generating_reg(fs_inst *start,
 172                                            fs_inst *end,
 173                                            const fs_reg &reg);
 174
 175    fs_inst *LOAD_PAYLOAD(const fs_reg &dst, fs_reg *src, int sources,
 176                          int header_size);
 177
 178    exec_list VARYING_PULL_CONSTANT_LOAD(const fs_reg &dst,
 179                                         const fs_reg &surf_index,
 180                                         const fs_reg &varying_offset,
 181                                         uint32_t const_offset);
 182
 183    bool run_fs();
 184    bool run_vs();
 185    bool run_cs();
 186    void optimize();
 187    void allocate_registers();
 188    void assign_binding_table_offsets();
 189    void setup_payload_gen4();
 190    void setup_payload_gen6();
 191    void setup_vs_payload();
 192    void setup_cs_payload();
 193    void fixup_3src_null_dest();
 194    void assign_curb_setup();
 195    void calculate_urb_setup();
 196    void assign_urb_setup();
 197    void assign_vs_urb_setup();
 198    bool assign_regs(bool allow_spilling);
 199    void assign_regs_trivial();
 200    void get_used_mrfs(bool *mrf_used);
 201    void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
 202                                    int first_payload_node);
 203    void setup_mrf_hack_interference(struct ra_graph *g,
 204                                     int first_mrf_hack_node);
 205    int choose_spill_reg(struct ra_graph *g);
 206    void spill_reg(int spill_reg);
 207    void split_virtual_grfs();
 208    bool compact_virtual_grfs();
 209    void move_uniform_array_access_to_pull_constants();
 210    void assign_constant_locations();
 211    void demote_pull_constants();
 212    void invalidate_live_intervals();
 213    void calculate_live_intervals();
 214    void calculate_register_pressure();
 215    bool opt_algebraic();
 216    bool opt_redundant_discard_jumps();
 217    bool opt_cse();
 218    bool opt_cse_local(bblock_t *block);
 219    bool opt_copy_propagate();
 220    bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
 221    bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
 222    bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
 223                                  exec_list *acp);
 224    bool opt_register_renaming();
 225    bool register_coalesce();
 226    bool compute_to_mrf();
 227    bool eliminate_find_live_channel();
 228    bool dead_code_eliminate();
 229    bool remove_duplicate_mrf_writes();
 230
 231    bool opt_sampler_eot();
 232    bool virtual_grf_interferes(int a, int b);
 233    void schedule_instructions(instruction_scheduler_mode mode);
 234    void insert_gen4_send_dependency_workarounds();
 235    void insert_gen4_pre_send_dependency_workarounds(bblock_t *block,
 236                                                     fs_inst *inst);
 237    void insert_gen4_post_send_dependency_workarounds(bblock_t *block,
 238                                                      fs_inst *inst);
 239    void vfail(const char *msg, va_list args);
 240    void fail(const char *msg, ...);
 241    void no16(const char *msg, ...);
 242    void lower_uniform_pull_constant_loads();
 243    bool lower_load_payload();
 244    bool lower_integer_multiplication();
 245    bool opt_combine_constants();
 246
 247    void emit_dummy_fs();
 248    void emit_repclear_shader();
 249    fs_reg *emit_fragcoord_interpolation(bool pixel_center_integer,
 250                                         bool origin_upper_left);
 251    fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
 252                          glsl_interp_qualifier interpolation_mode,
 253                          bool is_centroid, bool is_sample);
 254    fs_reg *emit_frontfacing_interpolation();
 255    fs_reg *emit_samplepos_setup();
 256    fs_reg *emit_sampleid_setup();
 257    void emit_general_interpolation(fs_reg attr, const char *name,
 258                                    const glsl_type *type,
 259                                    glsl_interp_qualifier interpolation_mode,
 260                                    int location, bool mod_centroid,
 261                                    bool mod_sample);
 262    fs_reg *emit_vs_system_value(int location);
 263    void emit_interpolation_setup_gen4();
 264    void emit_interpolation_setup_gen6();
 265    void compute_sample_position(fs_reg dst, fs_reg int_sample_pos);
 266    fs_reg rescale_texcoord(fs_reg coordinate, int coord_components,
 267                            bool is_rect, uint32_t sampler, int texunit);
 268    fs_inst *emit_texture_gen4(ir_texture_opcode op, fs_reg dst,
 269                               fs_reg coordinate, int coord_components,
 270                               fs_reg shadow_comp,
 271                               fs_reg lod, fs_reg lod2, int grad_components,
 272                               uint32_t sampler);
 273    fs_inst *emit_texture_gen4_simd16(ir_texture_opcode op, fs_reg dst,
 274                                      fs_reg coordinate, int vector_elements,
 275                                      fs_reg shadow_c, fs_reg lod,
 276                                      uint32_t sampler);
 277    fs_inst *emit_texture_gen5(ir_texture_opcode op, fs_reg dst,
 278                               fs_reg coordinate, int coord_components,
 279                               fs_reg shadow_comp,
 280                               fs_reg lod, fs_reg lod2, int grad_components,
 281                               fs_reg sample_index, uint32_t sampler,
 282                               bool has_offset);
 283    fs_inst *emit_texture_gen7(ir_texture_opcode op, fs_reg dst,
 284                               fs_reg coordinate, int coord_components,
 285                               fs_reg shadow_comp,
 286                               fs_reg lod, fs_reg lod2, int grad_components,
 287                               fs_reg sample_index, fs_reg mcs, fs_reg sampler,
 288                               fs_reg offset_value);
 289    void emit_texture(ir_texture_opcode op,
 290                      const glsl_type *dest_type,
 291                      fs_reg coordinate, int components,
 292                      fs_reg shadow_c,
 293                      fs_reg lod, fs_reg dpdy, int grad_components,
 294                      fs_reg sample_index,
 295                      fs_reg offset,
 296                      fs_reg mcs,
 297                      int gather_component,
 298                      bool is_cube_array,
 299                      bool is_rect,
 300                      uint32_t sampler,
 301                      fs_reg sampler_reg,
 302                      int texunit);
 303    fs_reg emit_mcs_fetch(fs_reg coordinate, int components, fs_reg sampler);
 304    void emit_gen6_gather_wa(uint8_t wa, fs_reg dst);
 305    void resolve_source_modifiers(fs_reg *src);
 306    fs_reg fix_math_operand(fs_reg src);
 307    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0);
 308    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0, fs_reg src1);
 309    fs_inst *emit_lrp(const fs_reg &dst, const fs_reg &x, const fs_reg &y,
 310                      const fs_reg &a);
 311    void emit_minmax(enum brw_conditional_mod conditionalmod, const fs_reg &dst,
 312                     const fs_reg &src0, const fs_reg &src1);
 313    void emit_discard_jump();
 314    /** Copy any live channel from \p src to the first channel of \p dst. */
 315    void emit_uniformize(const fs_reg &dst, const fs_reg &src);
 316    bool try_emit_b2f_of_comparison(ir_expression *ir);
 317    bool try_emit_saturate(ir_expression *ir);
 318    bool try_emit_line(ir_expression *ir);
 319    bool try_emit_mad(ir_expression *ir);
 320    bool try_replace_with_sel();
 321    bool try_opt_frontfacing_ternary(ir_if *ir);
 322    bool opt_peephole_sel();
 323    bool opt_peephole_predicated_break();
 324    bool opt_saturate_propagation();
 325    bool opt_cmod_propagation();
 326    bool opt_zero_samples();
 327    void emit_bool_to_cond_code(ir_rvalue *condition);
 328    void emit_bool_to_cond_code_of_reg(ir_expression *expr, fs_reg op[3]);
 329    void emit_if_gen6(ir_if *ir);
 330    void emit_unspill(bblock_t *block, fs_inst *inst, fs_reg reg,
 331                      uint32_t spill_offset, int count);
 332    void emit_spill(bblock_t *block, fs_inst *inst, fs_reg reg,
 333                    uint32_t spill_offset, int count);
 334
 335    void emit_fragment_program_code();
 336    void setup_fp_regs();
 337    fs_reg get_fp_src_reg(const prog_src_register *src);
 338    fs_reg get_fp_dst_reg(const prog_dst_register *dst);
 339    void emit_fp_alu1(enum opcode opcode,
 340                      const struct prog_instruction *fpi,
 341                      fs_reg dst, fs_reg src);
 342    void emit_fp_alu2(enum opcode opcode,
 343                      const struct prog_instruction *fpi,
 344                      fs_reg dst, fs_reg src0, fs_reg src1);
 345    void emit_fp_scalar_write(const struct prog_instruction *fpi,
 346                              fs_reg dst, fs_reg src);
 347    void emit_fp_scalar_math(enum opcode opcode,
 348                             const struct prog_instruction *fpi,
 349                             fs_reg dst, fs_reg src);
 350
 351    void emit_fp_minmax(const struct prog_instruction *fpi,
 352                        fs_reg dst, fs_reg src0, fs_reg src1);
 353
 354    void emit_fp_sop(enum brw_conditional_mod conditional_mod,
 355                     const struct prog_instruction *fpi,
 356                     fs_reg dst, fs_reg src0, fs_reg src1, fs_reg one);
 357
 358    void emit_nir_code();
 359    void nir_setup_inputs(nir_shader *shader);
 360    void nir_setup_outputs(nir_shader *shader);
 361    void nir_setup_uniforms(nir_shader *shader);
 362    void nir_setup_uniform(nir_variable *var);
 363    void nir_setup_builtin_uniform(nir_variable *var);
 364    void nir_emit_system_values(nir_shader *shader);
 365    void nir_emit_impl(nir_function_impl *impl);
 366    void nir_emit_cf_list(exec_list *list);
 367    void nir_emit_if(nir_if *if_stmt);
 368    void nir_emit_loop(nir_loop *loop);
 369    void nir_emit_block(nir_block *block);
 370    void nir_emit_instr(nir_instr *instr);
 371    void nir_emit_alu(nir_alu_instr *instr);
 372    void nir_emit_intrinsic(nir_intrinsic_instr *instr);
 373    void nir_emit_texture(nir_tex_instr *instr);
 374    void nir_emit_jump(nir_jump_instr *instr);
 375    fs_reg get_nir_src(nir_src src);
 376    fs_reg get_nir_dest(nir_dest dest);
 377    void emit_percomp(fs_inst *inst, unsigned wr_mask);
 378
 379    bool optimize_frontfacing_ternary(nir_alu_instr *instr,
 380                                      const fs_reg &result);
 381
 382    void setup_color_payload(fs_reg *dst, fs_reg color, unsigned components,
 383                             unsigned exec_size, bool use_2nd_half);
 384    void emit_alpha_test();
 385    fs_inst *emit_single_fb_write(fs_reg color1, fs_reg color2,
 386                                  fs_reg src0_alpha, unsigned components,
 387                                  unsigned exec_size, bool use_2nd_half = false);
 388    void emit_fb_writes();
 389    void emit_urb_writes();
 390    void emit_cs_terminate();
 391
 392    void emit_shader_time_begin();
 393    void emit_shader_time_end();
 394    fs_inst *SHADER_TIME_ADD(enum shader_time_shader_type type, fs_reg value);
 395
 396    void emit_untyped_atomic(unsigned atomic_op, unsigned surf_index,
 397                             fs_reg dst, fs_reg offset, fs_reg src0,
 398                             fs_reg src1);
 399
 400    void emit_untyped_surface_read(unsigned surf_index, fs_reg dst,
 401                                   fs_reg offset);
 402
 403    void emit_interpolate_expression(ir_expression *ir);
 404
 405    bool try_rewrite_rhs_to_dst(ir_assignment *ir,
 406                                fs_reg dst,
 407                                fs_reg src,
 408                                fs_inst *pre_rhs_inst,
 409                                fs_inst *last_rhs_inst);
 410    void emit_assignment_writes(fs_reg &l, fs_reg &r,
 411                                const glsl_type *type, bool predicated);
 412    void resolve_ud_negate(fs_reg *reg);
 413    void resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg);
 414
 415    fs_reg get_timestamp(fs_inst **out_mov);
 416
 417    struct brw_reg interp_reg(int location, int channel);
 418    void setup_uniform_values(ir_variable *ir);
 419    void setup_builtin_uniform_values(ir_variable *ir);
 420    int implied_mrf_writes(fs_inst *inst);
 421
 422    virtual void dump_instructions();
 423    virtual void dump_instructions(const char *name);
 424    void dump_instruction(backend_instruction *inst);
 425    void dump_instruction(backend_instruction *inst, FILE *file);
 426
 427    void visit_atomic_counter_intrinsic(ir_call *ir);
 428
 429    const void *const key;
 430    const struct brw_sampler_prog_key_data *key_tex;
 431
 432    struct brw_stage_prog_data *prog_data;
 433    unsigned int sanity_param_count;
 434
 435    int *param_size;
 436
 437    int *virtual_grf_start;
 438    int *virtual_grf_end;
 439    brw::fs_live_variables *live_intervals;
 440
 441    int *regs_live_at_ip;
 442
 443    /** Number of uniform variable components visited. */
 444    unsigned uniforms;
 445
 446    /** Total number of direct uniforms we can get from NIR */
 447    unsigned num_direct_uniforms;
 448
 449    /** Byte-offset for the next available spot in the scratch space buffer. */
 450    unsigned last_scratch;
 451
 452    /**
 453     * Array mapping UNIFORM register numbers to the pull parameter index,
 454     * or -1 if this uniform register isn't being uploaded as a pull constant.
 455     */
 456    int *pull_constant_loc;
 457
 458    /**
 459     * Array mapping UNIFORM register numbers to the push parameter index,
 460     * or -1 if this uniform register isn't being uploaded as a push constant.
 461     */
 462    int *push_constant_loc;
 463
 464    struct hash_table *variable_ht;
 465    fs_reg frag_depth;
 466    fs_reg sample_mask;
 467    fs_reg outputs[VARYING_SLOT_MAX];
 468    unsigned output_components[VARYING_SLOT_MAX];
 469    fs_reg dual_src_output;
 470    bool do_dual_src;
 471    int first_non_payload_grf;
 472    /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
 473    unsigned max_grf;
 474
 475    fs_reg *fp_temp_regs;
 476    fs_reg *fp_input_regs;
 477
 478    fs_reg *nir_locals;
 479    fs_reg *nir_globals;
 480    fs_reg nir_inputs;
 481    fs_reg nir_outputs;
 482    fs_reg *nir_system_values;
 483
 484    /** @{ debug annotation info */
 485    const char *current_annotation;
 486    const void *base_ir;
 487    /** @} */
 488
 489    bool failed;
 490    char *fail_msg;
 491    bool simd16_unsupported;
 492    char *no16_msg;
 493
 494    /* Result of last visit() method. */
 495    fs_reg result;
 496
 497    /** Register numbers for thread payload fields. */
 498    struct {
 499       uint8_t source_depth_reg;
 500       uint8_t source_w_reg;
 501       uint8_t aa_dest_stencil_reg;
 502       uint8_t dest_depth_reg;
 503       uint8_t sample_pos_reg;
 504       uint8_t sample_mask_in_reg;
 505       uint8_t barycentric_coord_reg[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 506
 507       /** The number of thread payload registers the hardware will supply. */
 508       uint8_t num_regs;
 509    } payload;
 510
 511    bool source_depth_to_render_target;
 512    bool runtime_check_aads_emit;
 513
 514    fs_reg pixel_x;
 515    fs_reg pixel_y;
 516    fs_reg wpos_w;
 517    fs_reg pixel_w;
 518    fs_reg delta_xy[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 519    fs_reg shader_start_time;
 520    fs_reg userplane[MAX_CLIP_PLANES];
 521
 522    unsigned grf_used;
 523    bool spilled_any_registers;
 524
 525    const unsigned dispatch_width; /**< 8 or 16 */
 526
 527    unsigned promoted_constants;
 528 };
 529
 530 /**
 531  * The fragment shader code generator.
 532  *
 533  * Translates FS IR to actual i965 assembly code.
 534  */
 535 class fs_generator
 536 {
 537 public:
 538    fs_generator(struct brw_context *brw,
 539                 void *mem_ctx,
 540                 const void *key,
 541                 struct brw_stage_prog_data *prog_data,
 542                 struct gl_program *fp,
 543                 unsigned promoted_constants,
 544                 bool runtime_check_aads_emit,
 545                 const char *stage_abbrev);
 546    ~fs_generator();
 547
 548    void enable_debug(const char *shader_name);
 549    int generate_code(const cfg_t *cfg, int dispatch_width);
 550    const unsigned *get_assembly(unsigned int *assembly_size);
 551
 552 private:
 553    void fire_fb_write(fs_inst *inst,
 554                       struct brw_reg payload,
 555                       struct brw_reg implied_header,
 556                       GLuint nr);
 557    void generate_fb_write(fs_inst *inst, struct brw_reg payload);
 558    void generate_urb_write(fs_inst *inst, struct brw_reg payload);
 559    void generate_cs_terminate(fs_inst *inst, struct brw_reg payload);
 560    void generate_blorp_fb_write(fs_inst *inst);
 561    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 562                          struct brw_reg *src);
 563    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 564                      struct brw_reg sampler_index);
 565    void generate_math_gen6(fs_inst *inst,
 566                            struct brw_reg dst,
 567                            struct brw_reg src0,
 568                            struct brw_reg src1);
 569    void generate_math_gen4(fs_inst *inst,
 570                            struct brw_reg dst,
 571                            struct brw_reg src);
 572    void generate_math_g45(fs_inst *inst,
 573                           struct brw_reg dst,
 574                           struct brw_reg src);
 575    void generate_ddx(enum opcode op, struct brw_reg dst, struct brw_reg src);
 576    void generate_ddy(enum opcode op, struct brw_reg dst, struct brw_reg src,
 577                      bool negate_value);
 578    void generate_scratch_write(fs_inst *inst, struct brw_reg src);
 579    void generate_scratch_read(fs_inst *inst, struct brw_reg dst);
 580    void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst);
 581    void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 582                                             struct brw_reg index,
 583                                             struct brw_reg offset);
 584    void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
 585                                                  struct brw_reg dst,
 586                                                  struct brw_reg surf_index,
 587                                                  struct brw_reg offset);
 588    void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 589                                             struct brw_reg index,
 590                                             struct brw_reg offset);
 591    void generate_varying_pull_constant_load_gen7(fs_inst *inst,
 592                                                  struct brw_reg dst,
 593                                                  struct brw_reg index,
 594                                                  struct brw_reg offset);
 595    void generate_mov_dispatch_to_flags(fs_inst *inst);
 596
 597    void generate_pixel_interpolator_query(fs_inst *inst,
 598                                           struct brw_reg dst,
 599                                           struct brw_reg src,
 600                                           struct brw_reg msg_data,
 601                                           unsigned msg_type);
 602
 603    void generate_set_omask(fs_inst *inst,
 604                            struct brw_reg dst,
 605                            struct brw_reg sample_mask);
 606
 607    void generate_set_sample_id(fs_inst *inst,
 608                                struct brw_reg dst,
 609                                struct brw_reg src0,
 610                                struct brw_reg src1);
 611
 612    void generate_set_simd4x2_offset(fs_inst *inst,
 613                                     struct brw_reg dst,
 614                                     struct brw_reg offset);
 615    void generate_discard_jump(fs_inst *inst);
 616
 617    void generate_pack_half_2x16_split(fs_inst *inst,
 618                                       struct brw_reg dst,
 619                                       struct brw_reg x,
 620                                       struct brw_reg y);
 621    void generate_unpack_half_2x16_split(fs_inst *inst,
 622                                         struct brw_reg dst,
 623                                         struct brw_reg src);
 624
 625    void generate_shader_time_add(fs_inst *inst,
 626                                  struct brw_reg payload,
 627                                  struct brw_reg offset,
 628                                  struct brw_reg value);
 629
 630    bool patch_discard_jumps_to_fb_writes();
 631
 632    struct brw_context *brw;
 633    const struct brw_device_info *devinfo;
 634
 635    struct brw_codegen *p;
 636    const void * const key;
 637    struct brw_stage_prog_data * const prog_data;
 638
 639    const struct gl_program *prog;
 640
 641    unsigned dispatch_width; /**< 8 or 16 */
 642
 643    exec_list discard_halt_patches;
 644    unsigned promoted_constants;
 645    bool runtime_check_aads_emit;
 646    bool debug_flag;
 647    const char *shader_name;
 648    const char *stage_abbrev;
 649    void *mem_ctx;
 650 };
 651
 652 bool brw_do_channel_expressions(struct exec_list *instructions);
 653 bool brw_do_vector_splitting(struct exec_list *instructions);
 654 void brw_setup_tex_for_precompile(struct brw_context *brw,
 655                                   struct brw_sampler_prog_key_data *tex,
 656                                   struct gl_program *prog);