src/mesa/drivers/dri/i965/brw_fs.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #pragma once
  29
  30 #include "brw_shader.h"
  31
  32 extern "C" {
  33
  34 #include <sys/types.h>
  35
  36 #include "main/macros.h"
  37 #include "main/shaderobj.h"
  38 #include "main/uniforms.h"
  39 #include "program/prog_parameter.h"
  40 #include "program/prog_print.h"
  41 #include "program/prog_optimize.h"
  42 #include "program/register_allocate.h"
  43 #include "program/sampler.h"
  44 #include "program/hash_table.h"
  45 #include "brw_context.h"
  46 #include "brw_eu.h"
  47 #include "brw_wm.h"
  48 #include "brw_shader.h"
  49 }
  50 #include "glsl/glsl_types.h"
  51 #include "glsl/ir.h"
  52
  53 class bblock_t;
  54 namespace {
  55    struct acp_entry;
  56 }
  57
  58 class fs_reg {
  59 public:
  60    DECLARE_RALLOC_CXX_OPERATORS(fs_reg)
  61
  62    void init();
  63
  64    fs_reg();
  65    fs_reg(float f);
  66    fs_reg(int32_t i);
  67    fs_reg(uint32_t u);
  68    fs_reg(struct brw_reg fixed_hw_reg);
  69    fs_reg(enum register_file file, int reg);
  70    fs_reg(enum register_file file, int reg, uint32_t type);
  71    fs_reg(class fs_visitor *v, const struct glsl_type *type);
  72
  73    bool equals(const fs_reg &r) const;
  74    bool is_zero() const;
  75    bool is_one() const;
  76    bool is_valid_3src() const;
  77
  78    /** Register file: ARF, GRF, MRF, IMM. */
  79    enum register_file file;
  80    /**
  81     * Register number.  For ARF/MRF, it's the hardware register.  For
  82     * GRF, it's a virtual register number until register allocation
  83     */
  84    int reg;
  85    /**
  86     * For virtual registers, this is a hardware register offset from
  87     * the start of the register block (for example, a constant index
  88     * in an array access).
  89     */
  90    int reg_offset;
  91    /** Register type.  BRW_REGISTER_TYPE_* */
  92    int type;
  93    bool negate;
  94    bool abs;
  95    bool sechalf;
  96    struct brw_reg fixed_hw_reg;
  97    int smear; /* -1, or a channel of the reg to smear to all channels. */
  98
  99    /** Value for file == IMM */
 100    union {
 101       int32_t i;
 102       uint32_t u;
 103       float f;
 104    } imm;
 105
 106    fs_reg *reladdr;
 107 };
 108
 109 static const fs_reg reg_undef;
 110 static const fs_reg reg_null_f(ARF, BRW_ARF_NULL, BRW_REGISTER_TYPE_F);
 111 static const fs_reg reg_null_d(ARF, BRW_ARF_NULL, BRW_REGISTER_TYPE_D);
 112
 113 class ip_record : public exec_node {
 114 public:
 115    DECLARE_RALLOC_CXX_OPERATORS(ip_record)
 116
 117    ip_record(int ip)
 118    {
 119       this->ip = ip;
 120    }
 121
 122    int ip;
 123 };
 124
 125 class fs_inst : public backend_instruction {
 126 public:
 127    DECLARE_RALLOC_CXX_OPERATORS(fs_inst)
 128
 129    void init();
 130
 131    fs_inst();
 132    fs_inst(enum opcode opcode);
 133    fs_inst(enum opcode opcode, fs_reg dst);
 134    fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0);
 135    fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
 136    fs_inst(enum opcode opcode, fs_reg dst,
 137            fs_reg src0, fs_reg src1,fs_reg src2);
 138
 139    bool equals(fs_inst *inst);
 140    bool overwrites_reg(const fs_reg &reg);
 141    bool is_send_from_grf();
 142    bool is_partial_write();
 143
 144    fs_reg dst;
 145    fs_reg src[3];
 146    bool saturate;
 147    int conditional_mod; /**< BRW_CONDITIONAL_* */
 148
 149    /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional
 150     * mod and predication.
 151     */
 152    uint8_t flag_subreg;
 153
 154    int mlen; /**< SEND message length */
 155    int regs_written; /**< Number of vgrfs written by a SEND message, or 1 */
 156    int base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
 157    uint32_t texture_offset; /**< Texture offset bitfield */
 158    int sampler;
 159    int target; /**< MRT target. */
 160    bool eot;
 161    bool header_present;
 162    bool shadow_compare;
 163    bool force_uncompressed;
 164    bool force_sechalf;
 165    bool force_writemask_all;
 166    uint32_t offset; /* spill/unspill offset */
 167
 168    /** @{
 169     * Annotation for the generated IR.  One of the two can be set.
 170     */
 171    const void *ir;
 172    const char *annotation;
 173    /** @} */
 174 };
 175
 176 /**
 177  * The fragment shader front-end.
 178  *
 179  * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
 180  */
 181 class fs_visitor : public backend_visitor
 182 {
 183 public:
 184
 185    fs_visitor(struct brw_context *brw,
 186               struct brw_wm_compile *c,
 187               struct gl_shader_program *shader_prog,
 188               struct gl_fragment_program *fp,
 189               unsigned dispatch_width);
 190    ~fs_visitor();
 191
 192    fs_reg *variable_storage(ir_variable *var);
 193    int virtual_grf_alloc(int size);
 194    void import_uniforms(fs_visitor *v);
 195
 196    void visit(ir_variable *ir);
 197    void visit(ir_assignment *ir);
 198    void visit(ir_dereference_variable *ir);
 199    void visit(ir_dereference_record *ir);
 200    void visit(ir_dereference_array *ir);
 201    void visit(ir_expression *ir);
 202    void visit(ir_texture *ir);
 203    void visit(ir_if *ir);
 204    void visit(ir_constant *ir);
 205    void visit(ir_swizzle *ir);
 206    void visit(ir_return *ir);
 207    void visit(ir_loop *ir);
 208    void visit(ir_loop_jump *ir);
 209    void visit(ir_discard *ir);
 210    void visit(ir_call *ir);
 211    void visit(ir_function *ir);
 212    void visit(ir_function_signature *ir);
 213    void visit(ir_emit_vertex *);
 214    void visit(ir_end_primitive *);
 215
 216    uint32_t gather_channel(ir_texture *ir, int sampler);
 217    void swizzle_result(ir_texture *ir, fs_reg orig_val, int sampler);
 218
 219    bool can_do_source_mods(fs_inst *inst);
 220
 221    fs_inst *emit(fs_inst inst);
 222    fs_inst *emit(fs_inst *inst);
 223    void emit(exec_list list);
 224
 225    fs_inst *emit(enum opcode opcode);
 226    fs_inst *emit(enum opcode opcode, fs_reg dst);
 227    fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0);
 228    fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
 229    fs_inst *emit(enum opcode opcode, fs_reg dst,
 230                  fs_reg src0, fs_reg src1, fs_reg src2);
 231
 232    fs_inst *MOV(fs_reg dst, fs_reg src);
 233    fs_inst *NOT(fs_reg dst, fs_reg src);
 234    fs_inst *RNDD(fs_reg dst, fs_reg src);
 235    fs_inst *RNDE(fs_reg dst, fs_reg src);
 236    fs_inst *RNDZ(fs_reg dst, fs_reg src);
 237    fs_inst *FRC(fs_reg dst, fs_reg src);
 238    fs_inst *ADD(fs_reg dst, fs_reg src0, fs_reg src1);
 239    fs_inst *MUL(fs_reg dst, fs_reg src0, fs_reg src1);
 240    fs_inst *MACH(fs_reg dst, fs_reg src0, fs_reg src1);
 241    fs_inst *MAC(fs_reg dst, fs_reg src0, fs_reg src1);
 242    fs_inst *SHL(fs_reg dst, fs_reg src0, fs_reg src1);
 243    fs_inst *SHR(fs_reg dst, fs_reg src0, fs_reg src1);
 244    fs_inst *ASR(fs_reg dst, fs_reg src0, fs_reg src1);
 245    fs_inst *AND(fs_reg dst, fs_reg src0, fs_reg src1);
 246    fs_inst *OR(fs_reg dst, fs_reg src0, fs_reg src1);
 247    fs_inst *XOR(fs_reg dst, fs_reg src0, fs_reg src1);
 248    fs_inst *IF(uint32_t predicate);
 249    fs_inst *IF(fs_reg src0, fs_reg src1, uint32_t condition);
 250    fs_inst *CMP(fs_reg dst, fs_reg src0, fs_reg src1,
 251                 uint32_t condition);
 252    fs_inst *LRP(fs_reg dst, fs_reg a, fs_reg y, fs_reg x);
 253    fs_inst *DEP_RESOLVE_MOV(int grf);
 254    fs_inst *BFREV(fs_reg dst, fs_reg value);
 255    fs_inst *BFE(fs_reg dst, fs_reg bits, fs_reg offset, fs_reg value);
 256    fs_inst *BFI1(fs_reg dst, fs_reg bits, fs_reg offset);
 257    fs_inst *BFI2(fs_reg dst, fs_reg bfi1_dst, fs_reg insert, fs_reg base);
 258    fs_inst *FBH(fs_reg dst, fs_reg value);
 259    fs_inst *FBL(fs_reg dst, fs_reg value);
 260    fs_inst *CBIT(fs_reg dst, fs_reg value);
 261    fs_inst *MAD(fs_reg dst, fs_reg c, fs_reg b, fs_reg a);
 262
 263    int type_size(const struct glsl_type *type);
 264    fs_inst *get_instruction_generating_reg(fs_inst *start,
 265                                            fs_inst *end,
 266                                            fs_reg reg);
 267
 268    exec_list VARYING_PULL_CONSTANT_LOAD(fs_reg dst, fs_reg surf_index,
 269                                         fs_reg varying_offset,
 270                                         uint32_t const_offset);
 271
 272    bool run();
 273    void setup_payload_gen4();
 274    void setup_payload_gen6();
 275    void assign_curb_setup();
 276    void calculate_urb_setup();
 277    void assign_urb_setup();
 278    bool assign_regs();
 279    void assign_regs_trivial();
 280    void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
 281                                    int first_payload_node);
 282    void setup_mrf_hack_interference(struct ra_graph *g,
 283                                     int first_mrf_hack_node);
 284    int choose_spill_reg(struct ra_graph *g);
 285    void spill_reg(int spill_reg);
 286    void split_virtual_grfs();
 287    void compact_virtual_grfs();
 288    void move_uniform_array_access_to_pull_constants();
 289    void setup_pull_constants();
 290    void calculate_live_intervals();
 291    bool opt_algebraic();
 292    bool opt_cse();
 293    bool opt_cse_local(bblock_t *block, exec_list *aeb);
 294    bool opt_copy_propagate();
 295    bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
 296    bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
 297    bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
 298                                  exec_list *acp);
 299    bool register_coalesce();
 300    bool register_coalesce_2();
 301    bool compute_to_mrf();
 302    bool dead_code_eliminate();
 303    bool dead_code_eliminate_local();
 304    bool remove_dead_constants();
 305    bool remove_duplicate_mrf_writes();
 306    bool virtual_grf_interferes(int a, int b);
 307    void schedule_instructions(bool post_reg_alloc);
 308    void insert_gen4_send_dependency_workarounds();
 309    void insert_gen4_pre_send_dependency_workarounds(fs_inst *inst);
 310    void insert_gen4_post_send_dependency_workarounds(fs_inst *inst);
 311    void fail(const char *msg, ...);
 312    void lower_uniform_pull_constant_loads();
 313
 314    void push_force_uncompressed();
 315    void pop_force_uncompressed();
 316    void push_force_sechalf();
 317    void pop_force_sechalf();
 318
 319    void emit_dummy_fs();
 320    fs_reg *emit_fragcoord_interpolation(ir_variable *ir);
 321    fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
 322                          glsl_interp_qualifier interpolation_mode,
 323                          bool is_centroid);
 324    fs_reg *emit_frontfacing_interpolation(ir_variable *ir);
 325    fs_reg *emit_general_interpolation(ir_variable *ir);
 326    void emit_interpolation_setup_gen4();
 327    void emit_interpolation_setup_gen6();
 328    fs_reg rescale_texcoord(ir_texture *ir, fs_reg coordinate,
 329                            bool is_rect, int sampler, int texunit);
 330    fs_inst *emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 331                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2);
 332    fs_inst *emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 333                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
 334                               fs_reg sample_index);
 335    fs_inst *emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 336                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
 337                               fs_reg sample_index);
 338    fs_reg fix_math_operand(fs_reg src);
 339    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0);
 340    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0, fs_reg src1);
 341    void emit_lrp(fs_reg dst, fs_reg x, fs_reg y, fs_reg a);
 342    void emit_minmax(uint32_t conditionalmod, fs_reg dst,
 343                     fs_reg src0, fs_reg src1);
 344    bool try_emit_saturate(ir_expression *ir);
 345    bool try_emit_mad(ir_expression *ir, int mul_arg);
 346    void try_replace_with_sel();
 347    void emit_bool_to_cond_code(ir_rvalue *condition);
 348    void emit_if_gen6(ir_if *ir);
 349    void emit_unspill(fs_inst *inst, fs_reg reg, uint32_t spill_offset);
 350
 351    void emit_fragment_program_code();
 352    void setup_fp_regs();
 353    fs_reg get_fp_src_reg(const prog_src_register *src);
 354    fs_reg get_fp_dst_reg(const prog_dst_register *dst);
 355    void emit_fp_alu1(enum opcode opcode,
 356                      const struct prog_instruction *fpi,
 357                      fs_reg dst, fs_reg src);
 358    void emit_fp_alu2(enum opcode opcode,
 359                      const struct prog_instruction *fpi,
 360                      fs_reg dst, fs_reg src0, fs_reg src1);
 361    void emit_fp_scalar_write(const struct prog_instruction *fpi,
 362                              fs_reg dst, fs_reg src);
 363    void emit_fp_scalar_math(enum opcode opcode,
 364                             const struct prog_instruction *fpi,
 365                             fs_reg dst, fs_reg src);
 366
 367    void emit_fp_minmax(const struct prog_instruction *fpi,
 368                        fs_reg dst, fs_reg src0, fs_reg src1);
 369
 370    void emit_fp_sop(uint32_t conditional_mod,
 371                     const struct prog_instruction *fpi,
 372                     fs_reg dst, fs_reg src0, fs_reg src1, fs_reg one);
 373
 374    void emit_color_write(int target, int index, int first_color_mrf);
 375    void emit_fb_writes();
 376
 377    void emit_shader_time_begin();
 378    void emit_shader_time_end();
 379    void emit_shader_time_write(enum shader_time_shader_type type,
 380                                fs_reg value);
 381
 382    bool try_rewrite_rhs_to_dst(ir_assignment *ir,
 383                                fs_reg dst,
 384                                fs_reg src,
 385                                fs_inst *pre_rhs_inst,
 386                                fs_inst *last_rhs_inst);
 387    void emit_assignment_writes(fs_reg &l, fs_reg &r,
 388                                const glsl_type *type, bool predicated);
 389    void resolve_ud_negate(fs_reg *reg);
 390    void resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg);
 391
 392    fs_reg get_timestamp();
 393
 394    struct brw_reg interp_reg(int location, int channel);
 395    void setup_uniform_values(ir_variable *ir);
 396    void setup_builtin_uniform_values(ir_variable *ir);
 397    int implied_mrf_writes(fs_inst *inst);
 398
 399    void dump_instruction(backend_instruction *inst);
 400
 401    struct gl_fragment_program *fp;
 402    struct brw_wm_compile *c;
 403    unsigned int sanity_param_count;
 404
 405    int param_size[MAX_UNIFORMS * 4];
 406
 407    int *virtual_grf_sizes;
 408    int virtual_grf_count;
 409    int virtual_grf_array_size;
 410    int *virtual_grf_start;
 411    int *virtual_grf_end;
 412    bool live_intervals_valid;
 413
 414    /* This is the map from UNIFORM hw_reg + reg_offset as generated by
 415     * the visitor to the packed uniform number after
 416     * remove_dead_constants() that represents the actual uploaded
 417     * uniform index.
 418     */
 419    int *params_remap;
 420    int nr_params_remap;
 421
 422    struct hash_table *variable_ht;
 423    fs_reg frag_depth;
 424    fs_reg outputs[BRW_MAX_DRAW_BUFFERS];
 425    unsigned output_components[BRW_MAX_DRAW_BUFFERS];
 426    fs_reg dual_src_output;
 427    int first_non_payload_grf;
 428    /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
 429    int max_grf;
 430
 431    fs_reg *fp_temp_regs;
 432    fs_reg *fp_input_regs;
 433
 434    /** @{ debug annotation info */
 435    const char *current_annotation;
 436    const void *base_ir;
 437    /** @} */
 438
 439    bool failed;
 440    char *fail_msg;
 441
 442    /* Result of last visit() method. */
 443    fs_reg result;
 444
 445    fs_reg pixel_x;
 446    fs_reg pixel_y;
 447    fs_reg wpos_w;
 448    fs_reg pixel_w;
 449    fs_reg delta_x[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 450    fs_reg delta_y[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 451    fs_reg shader_start_time;
 452
 453    int grf_used;
 454
 455    const unsigned dispatch_width; /**< 8 or 16 */
 456
 457    int force_uncompressed_stack;
 458    int force_sechalf_stack;
 459 };
 460
 461 /**
 462  * The fragment shader code generator.
 463  *
 464  * Translates FS IR to actual i965 assembly code.
 465  */
 466 class fs_generator
 467 {
 468 public:
 469    fs_generator(struct brw_context *brw,
 470                 struct brw_wm_compile *c,
 471                 struct gl_shader_program *prog,
 472                 struct gl_fragment_program *fp,
 473                 bool dual_source_output);
 474    ~fs_generator();
 475
 476    const unsigned *generate_assembly(exec_list *simd8_instructions,
 477                                      exec_list *simd16_instructions,
 478                                      unsigned *assembly_size);
 479
 480 private:
 481    void generate_code(exec_list *instructions);
 482    void generate_fb_write(fs_inst *inst);
 483    void generate_pixel_xy(struct brw_reg dst, bool is_x);
 484    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 485                          struct brw_reg *src);
 486    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 487    void generate_math1_gen7(fs_inst *inst,
 488                             struct brw_reg dst,
 489                             struct brw_reg src);
 490    void generate_math2_gen7(fs_inst *inst,
 491                             struct brw_reg dst,
 492                             struct brw_reg src0,
 493                             struct brw_reg src1);
 494    void generate_math1_gen6(fs_inst *inst,
 495                             struct brw_reg dst,
 496                             struct brw_reg src);
 497    void generate_math2_gen6(fs_inst *inst,
 498                             struct brw_reg dst,
 499                             struct brw_reg src0,
 500                             struct brw_reg src1);
 501    void generate_math_gen4(fs_inst *inst,
 502                            struct brw_reg dst,
 503                            struct brw_reg src);
 504    void generate_math_g45(fs_inst *inst,
 505                           struct brw_reg dst,
 506                           struct brw_reg src);
 507    void generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 508    void generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 509                      bool negate_value);
 510    void generate_spill(fs_inst *inst, struct brw_reg src);
 511    void generate_unspill(fs_inst *inst, struct brw_reg dst);
 512    void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 513                                             struct brw_reg index,
 514                                             struct brw_reg offset);
 515    void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
 516                                                  struct brw_reg dst,
 517                                                  struct brw_reg surf_index,
 518                                                  struct brw_reg offset);
 519    void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 520                                             struct brw_reg index,
 521                                             struct brw_reg offset);
 522    void generate_varying_pull_constant_load_gen7(fs_inst *inst,
 523                                                  struct brw_reg dst,
 524                                                  struct brw_reg index,
 525                                                  struct brw_reg offset);
 526    void generate_mov_dispatch_to_flags(fs_inst *inst);
 527    void generate_set_simd4x2_offset(fs_inst *inst,
 528                                     struct brw_reg dst,
 529                                     struct brw_reg offset);
 530    void generate_discard_jump(fs_inst *inst);
 531
 532    void generate_pack_half_2x16_split(fs_inst *inst,
 533                                       struct brw_reg dst,
 534                                       struct brw_reg x,
 535                                       struct brw_reg y);
 536    void generate_unpack_half_2x16_split(fs_inst *inst,
 537                                         struct brw_reg dst,
 538                                         struct brw_reg src);
 539
 540    void generate_shader_time_add(fs_inst *inst,
 541                                  struct brw_reg payload,
 542                                  struct brw_reg offset,
 543                                  struct brw_reg value);
 544
 545    void mark_surface_used(unsigned surf_index);
 546
 547    void patch_discard_jumps_to_fb_writes();
 548
 549    struct brw_context *brw;
 550    struct gl_context *ctx;
 551
 552    struct brw_compile *p;
 553    struct brw_wm_compile *c;
 554
 555    struct gl_shader_program *prog;
 556    struct gl_shader *shader;
 557    const struct gl_fragment_program *fp;
 558
 559    unsigned dispatch_width; /**< 8 or 16 */
 560
 561    exec_list discard_halt_patches;
 562    bool dual_source_output;
 563    void *mem_ctx;
 564 };
 565
 566 bool brw_do_channel_expressions(struct exec_list *instructions);
 567 bool brw_do_vector_splitting(struct exec_list *instructions);
 568 bool brw_fs_precompile(struct gl_context *ctx, struct gl_shader_program *prog);