src/mesa/drivers/dri/i965/brw_fs.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #pragma once
  29
  30 #include "brw_shader.h"
  31
  32 extern "C" {
  33
  34 #include <sys/types.h>
  35
  36 #include "main/macros.h"
  37 #include "main/shaderobj.h"
  38 #include "main/uniforms.h"
  39 #include "program/prog_parameter.h"
  40 #include "program/prog_print.h"
  41 #include "program/prog_optimize.h"
  42 #include "program/register_allocate.h"
  43 #include "program/sampler.h"
  44 #include "program/hash_table.h"
  45 #include "brw_context.h"
  46 #include "brw_eu.h"
  47 #include "brw_wm.h"
  48 #include "brw_shader.h"
  49 }
  50 #include "gen8_generator.h"
  51 #include "glsl/glsl_types.h"
  52 #include "glsl/ir.h"
  53
  54 #define MAX_SAMPLER_MESSAGE_SIZE 11
  55
  56 class bblock_t;
  57 namespace {
  58    struct acp_entry;
  59 }
  60
  61 namespace brw {
  62    class fs_live_variables;
  63 }
  64
  65 class fs_reg {
  66 public:
  67    DECLARE_RALLOC_CXX_OPERATORS(fs_reg)
  68
  69    void init();
  70
  71    fs_reg();
  72    fs_reg(float f);
  73    fs_reg(int32_t i);
  74    fs_reg(uint32_t u);
  75    fs_reg(struct brw_reg fixed_hw_reg);
  76    fs_reg(enum register_file file, int reg);
  77    fs_reg(enum register_file file, int reg, uint32_t type);
  78    fs_reg(class fs_visitor *v, const struct glsl_type *type);
  79
  80    bool equals(const fs_reg &r) const;
  81    bool is_zero() const;
  82    bool is_one() const;
  83    bool is_null() const;
  84    bool is_valid_3src() const;
  85    fs_reg retype(uint32_t type);
  86
  87    /** Register file: GRF, MRF, IMM. */
  88    enum register_file file;
  89    /**
  90     * Register number.  For MRF, it's the hardware register.  For
  91     * GRF, it's a virtual register number until register allocation
  92     */
  93    int reg;
  94    /**
  95     * Offset from the start of the contiguous register block.
  96     *
  97     * For pre-register-allocation GRFs, this is in units of a float per pixel
  98     * (1 hardware register for SIMD8 mode, or 2 registers for SIMD16 mode).
  99     * For uniforms, this is in units of 1 float.
 100     */
 101    int reg_offset;
 102    /** Register type.  BRW_REGISTER_TYPE_* */
 103    int type;
 104    bool negate;
 105    bool abs;
 106    bool sechalf;
 107    struct brw_reg fixed_hw_reg;
 108    int smear; /* -1, or a channel of the reg to smear to all channels. */
 109
 110    /** Value for file == IMM */
 111    union {
 112       int32_t i;
 113       uint32_t u;
 114       float f;
 115    } imm;
 116
 117    fs_reg *reladdr;
 118 };
 119
 120 static const fs_reg reg_undef;
 121 static const fs_reg reg_null_f(retype(brw_null_reg(), BRW_REGISTER_TYPE_F));
 122 static const fs_reg reg_null_d(retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
 123 static const fs_reg reg_null_ud(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD));
 124
 125 class ip_record : public exec_node {
 126 public:
 127    DECLARE_RALLOC_CXX_OPERATORS(ip_record)
 128
 129    ip_record(int ip)
 130    {
 131       this->ip = ip;
 132    }
 133
 134    int ip;
 135 };
 136
 137 class fs_inst : public backend_instruction {
 138 public:
 139    DECLARE_RALLOC_CXX_OPERATORS(fs_inst)
 140
 141    void init();
 142
 143    fs_inst();
 144    fs_inst(enum opcode opcode);
 145    fs_inst(enum opcode opcode, fs_reg dst);
 146    fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0);
 147    fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
 148    fs_inst(enum opcode opcode, fs_reg dst,
 149            fs_reg src0, fs_reg src1,fs_reg src2);
 150
 151    bool equals(fs_inst *inst);
 152    bool overwrites_reg(const fs_reg &reg);
 153    bool is_send_from_grf();
 154    bool is_partial_write();
 155    int regs_read(fs_visitor *v, int arg);
 156
 157    bool reads_flag();
 158    bool writes_flag();
 159
 160    fs_reg dst;
 161    fs_reg src[3];
 162    bool saturate;
 163    int conditional_mod; /**< BRW_CONDITIONAL_* */
 164
 165    /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional
 166     * mod and predication.
 167     */
 168    uint8_t flag_subreg;
 169
 170    int mlen; /**< SEND message length */
 171    int regs_written; /**< Number of vgrfs written by a SEND message, or 1 */
 172    int base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
 173    uint32_t texture_offset; /**< Texture offset bitfield */
 174    int sampler;
 175    int target; /**< MRT target. */
 176    bool eot;
 177    bool header_present;
 178    bool shadow_compare;
 179    bool force_uncompressed;
 180    bool force_sechalf;
 181    bool force_writemask_all;
 182    uint32_t offset; /* spill/unspill offset */
 183
 184    /** @{
 185     * Annotation for the generated IR.  One of the two can be set.
 186     */
 187    const void *ir;
 188    const char *annotation;
 189    /** @} */
 190 };
 191
 192 /**
 193  * The fragment shader front-end.
 194  *
 195  * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
 196  */
 197 class fs_visitor : public backend_visitor
 198 {
 199 public:
 200
 201    fs_visitor(struct brw_context *brw,
 202               struct brw_wm_compile *c,
 203               struct gl_shader_program *shader_prog,
 204               struct gl_fragment_program *fp,
 205               unsigned dispatch_width);
 206    ~fs_visitor();
 207
 208    fs_reg *variable_storage(ir_variable *var);
 209    int virtual_grf_alloc(int size);
 210    void import_uniforms(fs_visitor *v);
 211
 212    void visit(ir_variable *ir);
 213    void visit(ir_assignment *ir);
 214    void visit(ir_dereference_variable *ir);
 215    void visit(ir_dereference_record *ir);
 216    void visit(ir_dereference_array *ir);
 217    void visit(ir_expression *ir);
 218    void visit(ir_texture *ir);
 219    void visit(ir_if *ir);
 220    void visit(ir_constant *ir);
 221    void visit(ir_swizzle *ir);
 222    void visit(ir_return *ir);
 223    void visit(ir_loop *ir);
 224    void visit(ir_loop_jump *ir);
 225    void visit(ir_discard *ir);
 226    void visit(ir_call *ir);
 227    void visit(ir_function *ir);
 228    void visit(ir_function_signature *ir);
 229    void visit(ir_emit_vertex *);
 230    void visit(ir_end_primitive *);
 231
 232    uint32_t gather_channel(ir_texture *ir, int sampler);
 233    void swizzle_result(ir_texture *ir, fs_reg orig_val, int sampler);
 234
 235    bool can_do_source_mods(fs_inst *inst);
 236
 237    fs_inst *emit(fs_inst inst);
 238    fs_inst *emit(fs_inst *inst);
 239    void emit(exec_list list);
 240
 241    fs_inst *emit(enum opcode opcode);
 242    fs_inst *emit(enum opcode opcode, fs_reg dst);
 243    fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0);
 244    fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
 245    fs_inst *emit(enum opcode opcode, fs_reg dst,
 246                  fs_reg src0, fs_reg src1, fs_reg src2);
 247
 248    fs_inst *MOV(fs_reg dst, fs_reg src);
 249    fs_inst *NOT(fs_reg dst, fs_reg src);
 250    fs_inst *RNDD(fs_reg dst, fs_reg src);
 251    fs_inst *RNDE(fs_reg dst, fs_reg src);
 252    fs_inst *RNDZ(fs_reg dst, fs_reg src);
 253    fs_inst *FRC(fs_reg dst, fs_reg src);
 254    fs_inst *ADD(fs_reg dst, fs_reg src0, fs_reg src1);
 255    fs_inst *MUL(fs_reg dst, fs_reg src0, fs_reg src1);
 256    fs_inst *MACH(fs_reg dst, fs_reg src0, fs_reg src1);
 257    fs_inst *MAC(fs_reg dst, fs_reg src0, fs_reg src1);
 258    fs_inst *SHL(fs_reg dst, fs_reg src0, fs_reg src1);
 259    fs_inst *SHR(fs_reg dst, fs_reg src0, fs_reg src1);
 260    fs_inst *ASR(fs_reg dst, fs_reg src0, fs_reg src1);
 261    fs_inst *AND(fs_reg dst, fs_reg src0, fs_reg src1);
 262    fs_inst *OR(fs_reg dst, fs_reg src0, fs_reg src1);
 263    fs_inst *XOR(fs_reg dst, fs_reg src0, fs_reg src1);
 264    fs_inst *IF(uint32_t predicate);
 265    fs_inst *IF(fs_reg src0, fs_reg src1, uint32_t condition);
 266    fs_inst *CMP(fs_reg dst, fs_reg src0, fs_reg src1,
 267                 uint32_t condition);
 268    fs_inst *LRP(fs_reg dst, fs_reg a, fs_reg y, fs_reg x);
 269    fs_inst *DEP_RESOLVE_MOV(int grf);
 270    fs_inst *BFREV(fs_reg dst, fs_reg value);
 271    fs_inst *BFE(fs_reg dst, fs_reg bits, fs_reg offset, fs_reg value);
 272    fs_inst *BFI1(fs_reg dst, fs_reg bits, fs_reg offset);
 273    fs_inst *BFI2(fs_reg dst, fs_reg bfi1_dst, fs_reg insert, fs_reg base);
 274    fs_inst *FBH(fs_reg dst, fs_reg value);
 275    fs_inst *FBL(fs_reg dst, fs_reg value);
 276    fs_inst *CBIT(fs_reg dst, fs_reg value);
 277    fs_inst *MAD(fs_reg dst, fs_reg c, fs_reg b, fs_reg a);
 278    fs_inst *ADDC(fs_reg dst, fs_reg src0, fs_reg src1);
 279    fs_inst *SUBB(fs_reg dst, fs_reg src0, fs_reg src1);
 280    fs_inst *SEL(fs_reg dst, fs_reg src0, fs_reg src1);
 281
 282    int type_size(const struct glsl_type *type);
 283    fs_inst *get_instruction_generating_reg(fs_inst *start,
 284                                            fs_inst *end,
 285                                            fs_reg reg);
 286
 287    exec_list VARYING_PULL_CONSTANT_LOAD(fs_reg dst, fs_reg surf_index,
 288                                         fs_reg varying_offset,
 289                                         uint32_t const_offset);
 290
 291    bool run();
 292    void assign_binding_table_offsets();
 293    void setup_payload_gen4();
 294    void setup_payload_gen6();
 295    void assign_curb_setup();
 296    void calculate_urb_setup();
 297    void assign_urb_setup();
 298    bool assign_regs(bool allow_spilling);
 299    void assign_regs_trivial();
 300    void get_used_mrfs(bool *mrf_used);
 301    void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
 302                                    int first_payload_node);
 303    void setup_mrf_hack_interference(struct ra_graph *g,
 304                                     int first_mrf_hack_node);
 305    int choose_spill_reg(struct ra_graph *g);
 306    void spill_reg(int spill_reg);
 307    void split_virtual_grfs();
 308    void compact_virtual_grfs();
 309    void move_uniform_array_access_to_pull_constants();
 310    void setup_pull_constants();
 311    void invalidate_live_intervals();
 312    void calculate_live_intervals();
 313    void calculate_register_pressure();
 314    bool opt_algebraic();
 315    bool opt_cse();
 316    bool opt_cse_local(bblock_t *block, exec_list *aeb);
 317    bool opt_copy_propagate();
 318    bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
 319    bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
 320    bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
 321                                  exec_list *acp);
 322    bool register_coalesce();
 323    bool compute_to_mrf();
 324    bool dead_code_eliminate();
 325    bool dead_code_eliminate_local();
 326    bool remove_dead_constants();
 327    bool remove_duplicate_mrf_writes();
 328    bool virtual_grf_interferes(int a, int b);
 329    void schedule_instructions(instruction_scheduler_mode mode);
 330    void insert_gen4_send_dependency_workarounds();
 331    void insert_gen4_pre_send_dependency_workarounds(fs_inst *inst);
 332    void insert_gen4_post_send_dependency_workarounds(fs_inst *inst);
 333    void fail(const char *msg, ...);
 334    void lower_uniform_pull_constant_loads();
 335
 336    void push_force_uncompressed();
 337    void pop_force_uncompressed();
 338
 339    void emit_dummy_fs();
 340    fs_reg *emit_fragcoord_interpolation(ir_variable *ir);
 341    fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
 342                          glsl_interp_qualifier interpolation_mode,
 343                          bool is_centroid, bool is_sample);
 344    fs_reg *emit_frontfacing_interpolation(ir_variable *ir);
 345    fs_reg *emit_samplepos_setup(ir_variable *ir);
 346    fs_reg *emit_sampleid_setup(ir_variable *ir);
 347    fs_reg *emit_samplemaskin_setup(ir_variable *ir);
 348    fs_reg *emit_general_interpolation(ir_variable *ir);
 349    void emit_interpolation_setup_gen4();
 350    void emit_interpolation_setup_gen6();
 351    void compute_sample_position(fs_reg dst, fs_reg int_sample_pos);
 352    fs_reg rescale_texcoord(ir_texture *ir, fs_reg coordinate,
 353                            bool is_rect, int sampler, int texunit);
 354    fs_inst *emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 355                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2);
 356    fs_inst *emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 357                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
 358                               fs_reg sample_index);
 359    fs_inst *emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 360                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
 361                               fs_reg sample_index, fs_reg mcs, int sampler);
 362    fs_reg emit_mcs_fetch(ir_texture *ir, fs_reg coordinate, int sampler);
 363    fs_reg fix_math_operand(fs_reg src);
 364    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0);
 365    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0, fs_reg src1);
 366    void emit_lrp(fs_reg dst, fs_reg x, fs_reg y, fs_reg a);
 367    void emit_minmax(uint32_t conditionalmod, fs_reg dst,
 368                     fs_reg src0, fs_reg src1);
 369    bool try_emit_saturate(ir_expression *ir);
 370    bool try_emit_mad(ir_expression *ir, int mul_arg);
 371    void try_replace_with_sel();
 372    bool opt_peephole_sel();
 373    bool opt_peephole_predicated_break();
 374    bool opt_saturate_propagation();
 375    void emit_bool_to_cond_code(ir_rvalue *condition);
 376    void emit_if_gen6(ir_if *ir);
 377    void emit_unspill(fs_inst *inst, fs_reg reg, uint32_t spill_offset,
 378                      int count);
 379
 380    void emit_fragment_program_code();
 381    void setup_fp_regs();
 382    fs_reg get_fp_src_reg(const prog_src_register *src);
 383    fs_reg get_fp_dst_reg(const prog_dst_register *dst);
 384    void emit_fp_alu1(enum opcode opcode,
 385                      const struct prog_instruction *fpi,
 386                      fs_reg dst, fs_reg src);
 387    void emit_fp_alu2(enum opcode opcode,
 388                      const struct prog_instruction *fpi,
 389                      fs_reg dst, fs_reg src0, fs_reg src1);
 390    void emit_fp_scalar_write(const struct prog_instruction *fpi,
 391                              fs_reg dst, fs_reg src);
 392    void emit_fp_scalar_math(enum opcode opcode,
 393                             const struct prog_instruction *fpi,
 394                             fs_reg dst, fs_reg src);
 395
 396    void emit_fp_minmax(const struct prog_instruction *fpi,
 397                        fs_reg dst, fs_reg src0, fs_reg src1);
 398
 399    void emit_fp_sop(uint32_t conditional_mod,
 400                     const struct prog_instruction *fpi,
 401                     fs_reg dst, fs_reg src0, fs_reg src1, fs_reg one);
 402
 403    void emit_color_write(int target, int index, int first_color_mrf);
 404    void emit_alpha_test();
 405    void emit_fb_writes();
 406
 407    void emit_shader_time_begin();
 408    void emit_shader_time_end();
 409    void emit_shader_time_write(enum shader_time_shader_type type,
 410                                fs_reg value);
 411
 412    void emit_untyped_atomic(unsigned atomic_op, unsigned surf_index,
 413                             fs_reg dst, fs_reg offset, fs_reg src0,
 414                             fs_reg src1);
 415
 416    void emit_untyped_surface_read(unsigned surf_index, fs_reg dst,
 417                                   fs_reg offset);
 418
 419    bool try_rewrite_rhs_to_dst(ir_assignment *ir,
 420                                fs_reg dst,
 421                                fs_reg src,
 422                                fs_inst *pre_rhs_inst,
 423                                fs_inst *last_rhs_inst);
 424    void emit_assignment_writes(fs_reg &l, fs_reg &r,
 425                                const glsl_type *type, bool predicated);
 426    void resolve_ud_negate(fs_reg *reg);
 427    void resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg);
 428
 429    fs_reg get_timestamp();
 430
 431    struct brw_reg interp_reg(int location, int channel);
 432    void setup_uniform_values(ir_variable *ir);
 433    void setup_builtin_uniform_values(ir_variable *ir);
 434    int implied_mrf_writes(fs_inst *inst);
 435
 436    virtual void dump_instructions();
 437    void dump_instruction(backend_instruction *inst);
 438
 439    void visit_atomic_counter_intrinsic(ir_call *ir);
 440
 441    struct gl_fragment_program *fp;
 442    struct brw_wm_compile *c;
 443    unsigned int sanity_param_count;
 444
 445    int param_size[MAX_UNIFORMS * 4];
 446
 447    int *virtual_grf_sizes;
 448    int virtual_grf_count;
 449    int virtual_grf_array_size;
 450    int *virtual_grf_start;
 451    int *virtual_grf_end;
 452    brw::fs_live_variables *live_intervals;
 453
 454    int *regs_live_at_ip;
 455
 456    /* This is the map from UNIFORM hw_reg + reg_offset as generated by
 457     * the visitor to the packed uniform number after
 458     * remove_dead_constants() that represents the actual uploaded
 459     * uniform index.
 460     */
 461    int *params_remap;
 462    int nr_params_remap;
 463
 464    struct hash_table *variable_ht;
 465    fs_reg frag_depth;
 466    fs_reg sample_mask;
 467    fs_reg outputs[BRW_MAX_DRAW_BUFFERS];
 468    unsigned output_components[BRW_MAX_DRAW_BUFFERS];
 469    fs_reg dual_src_output;
 470    int first_non_payload_grf;
 471    /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
 472    int max_grf;
 473
 474    fs_reg *fp_temp_regs;
 475    fs_reg *fp_input_regs;
 476
 477    /** @{ debug annotation info */
 478    const char *current_annotation;
 479    const void *base_ir;
 480    /** @} */
 481
 482    bool failed;
 483    char *fail_msg;
 484
 485    /* Result of last visit() method. */
 486    fs_reg result;
 487
 488    fs_reg pixel_x;
 489    fs_reg pixel_y;
 490    fs_reg wpos_w;
 491    fs_reg pixel_w;
 492    fs_reg delta_x[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 493    fs_reg delta_y[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 494    fs_reg shader_start_time;
 495
 496    int grf_used;
 497    bool spilled_any_registers;
 498
 499    const unsigned dispatch_width; /**< 8 or 16 */
 500
 501    int force_uncompressed_stack;
 502 };
 503
 504 /**
 505  * The fragment shader code generator.
 506  *
 507  * Translates FS IR to actual i965 assembly code.
 508  */
 509 class fs_generator
 510 {
 511 public:
 512    fs_generator(struct brw_context *brw,
 513                 struct brw_wm_compile *c,
 514                 struct gl_shader_program *prog,
 515                 struct gl_fragment_program *fp,
 516                 bool dual_source_output);
 517    ~fs_generator();
 518
 519    const unsigned *generate_assembly(exec_list *simd8_instructions,
 520                                      exec_list *simd16_instructions,
 521                                      unsigned *assembly_size,
 522                                      FILE *dump_file = NULL);
 523
 524 private:
 525    void generate_code(exec_list *instructions, FILE *dump_file);
 526    void generate_fb_write(fs_inst *inst);
 527    void generate_blorp_fb_write(fs_inst *inst);
 528    void generate_pixel_xy(struct brw_reg dst, bool is_x);
 529    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 530                          struct brw_reg *src);
 531    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 532    void generate_math1_gen7(fs_inst *inst,
 533                             struct brw_reg dst,
 534                             struct brw_reg src);
 535    void generate_math2_gen7(fs_inst *inst,
 536                             struct brw_reg dst,
 537                             struct brw_reg src0,
 538                             struct brw_reg src1);
 539    void generate_math1_gen6(fs_inst *inst,
 540                             struct brw_reg dst,
 541                             struct brw_reg src);
 542    void generate_math2_gen6(fs_inst *inst,
 543                             struct brw_reg dst,
 544                             struct brw_reg src0,
 545                             struct brw_reg src1);
 546    void generate_math_gen4(fs_inst *inst,
 547                            struct brw_reg dst,
 548                            struct brw_reg src);
 549    void generate_math_g45(fs_inst *inst,
 550                           struct brw_reg dst,
 551                           struct brw_reg src);
 552    void generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 553    void generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 554                      bool negate_value);
 555    void generate_scratch_write(fs_inst *inst, struct brw_reg src);
 556    void generate_scratch_read(fs_inst *inst, struct brw_reg dst);
 557    void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst);
 558    void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 559                                             struct brw_reg index,
 560                                             struct brw_reg offset);
 561    void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
 562                                                  struct brw_reg dst,
 563                                                  struct brw_reg surf_index,
 564                                                  struct brw_reg offset);
 565    void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 566                                             struct brw_reg index,
 567                                             struct brw_reg offset);
 568    void generate_varying_pull_constant_load_gen7(fs_inst *inst,
 569                                                  struct brw_reg dst,
 570                                                  struct brw_reg index,
 571                                                  struct brw_reg offset);
 572    void generate_mov_dispatch_to_flags(fs_inst *inst);
 573
 574    void generate_set_omask(fs_inst *inst,
 575                            struct brw_reg dst,
 576                            struct brw_reg sample_mask);
 577
 578    void generate_set_sample_id(fs_inst *inst,
 579                                struct brw_reg dst,
 580                                struct brw_reg src0,
 581                                struct brw_reg src1);
 582
 583    void generate_set_simd4x2_offset(fs_inst *inst,
 584                                     struct brw_reg dst,
 585                                     struct brw_reg offset);
 586    void generate_discard_jump(fs_inst *inst);
 587
 588    void generate_pack_half_2x16_split(fs_inst *inst,
 589                                       struct brw_reg dst,
 590                                       struct brw_reg x,
 591                                       struct brw_reg y);
 592    void generate_unpack_half_2x16_split(fs_inst *inst,
 593                                         struct brw_reg dst,
 594                                         struct brw_reg src);
 595
 596    void generate_shader_time_add(fs_inst *inst,
 597                                  struct brw_reg payload,
 598                                  struct brw_reg offset,
 599                                  struct brw_reg value);
 600
 601    void generate_untyped_atomic(fs_inst *inst,
 602                                 struct brw_reg dst,
 603                                 struct brw_reg atomic_op,
 604                                 struct brw_reg surf_index);
 605
 606    void generate_untyped_surface_read(fs_inst *inst,
 607                                       struct brw_reg dst,
 608                                       struct brw_reg surf_index);
 609
 610    void mark_surface_used(unsigned surf_index);
 611
 612    void patch_discard_jumps_to_fb_writes();
 613
 614    struct brw_context *brw;
 615    struct gl_context *ctx;
 616
 617    struct brw_compile *p;
 618    struct brw_wm_compile *c;
 619
 620    struct gl_shader_program *prog;
 621    const struct gl_fragment_program *fp;
 622
 623    unsigned dispatch_width; /**< 8 or 16 */
 624
 625    exec_list discard_halt_patches;
 626    bool dual_source_output;
 627    void *mem_ctx;
 628 };
 629
 630 /**
 631  * The fragment shader code generator.
 632  *
 633  * Translates FS IR to actual i965 assembly code.
 634  */
 635 class gen8_fs_generator : public gen8_generator
 636 {
 637 public:
 638    gen8_fs_generator(struct brw_context *brw,
 639                      struct brw_wm_compile *c,
 640                      struct gl_shader_program *prog,
 641                      struct gl_fragment_program *fp,
 642                      bool dual_source_output);
 643    ~gen8_fs_generator();
 644
 645    const unsigned *generate_assembly(exec_list *simd8_instructions,
 646                                      exec_list *simd16_instructions,
 647                                      unsigned *assembly_size);
 648
 649 private:
 650    void generate_code(exec_list *instructions);
 651    void generate_fb_write(fs_inst *inst);
 652    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 653                          struct brw_reg *src);
 654    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 655    void generate_math1(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 656    void generate_math2(fs_inst *inst, struct brw_reg dst,
 657                        struct brw_reg src0, struct brw_reg src1);
 658    void generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 659    void generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 660                      bool negate_value);
 661    void generate_scratch_write(fs_inst *inst, struct brw_reg src);
 662    void generate_scratch_read(fs_inst *inst, struct brw_reg dst);
 663    void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst);
 664    void generate_uniform_pull_constant_load(fs_inst *inst,
 665                                             struct brw_reg dst,
 666                                             struct brw_reg index,
 667                                             struct brw_reg offset);
 668    void generate_varying_pull_constant_load(fs_inst *inst,
 669                                             struct brw_reg dst,
 670                                             struct brw_reg index,
 671                                             struct brw_reg offset);
 672    void generate_mov_dispatch_to_flags(fs_inst *ir);
 673    void generate_set_simd4x2_offset(fs_inst *ir,
 674                                     struct brw_reg dst,
 675                                     struct brw_reg offset);
 676    void generate_discard_jump(fs_inst *ir);
 677
 678    void patch_discard_jumps_to_fb_writes();
 679
 680    void mark_surface_used(unsigned surf_index);
 681
 682    struct brw_wm_compile *c;
 683    const struct gl_fragment_program *fp;
 684
 685    unsigned dispatch_width; /** 8 or 16 */
 686
 687    bool dual_source_output;
 688
 689    exec_list discard_halt_patches;
 690 };
 691
 692 bool brw_do_channel_expressions(struct exec_list *instructions);
 693 bool brw_do_vector_splitting(struct exec_list *instructions);
 694 bool brw_fs_precompile(struct gl_context *ctx, struct gl_shader_program *prog);
 695
 696 struct brw_reg brw_reg_from_fs_reg(fs_reg *reg);