src/mesa/drivers/dri/i965/brw_fs.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #pragma once
  29
  30 #include "brw_shader.h"
  31 #include "brw_ir_fs.h"
  32 #include "brw_fs_builder.h"
  33 #include "compiler/nir/nir.h"
  34
  35 struct bblock_t;
  36 namespace {
  37    struct acp_entry;
  38 }
  39
  40 namespace brw {
  41    class fs_live_variables;
  42 }
  43
  44 struct brw_gs_compile;
  45
  46 static inline fs_reg
  47 offset(const fs_reg &reg, const brw::fs_builder &bld, unsigned delta)
  48 {
  49    return offset(reg, bld.dispatch_width(), delta);
  50 }
  51
  52 /**
  53  * The fragment shader front-end.
  54  *
  55  * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
  56  */
  57 class fs_visitor : public backend_shader
  58 {
  59 public:
  60    fs_visitor(const struct brw_compiler *compiler, void *log_data,
  61               void *mem_ctx,
  62               const void *key,
  63               struct brw_stage_prog_data *prog_data,
  64               struct gl_program *prog,
  65               const nir_shader *shader,
  66               unsigned dispatch_width,
  67               int shader_time_index,
  68               const struct brw_vue_map *input_vue_map = NULL);
  69    fs_visitor(const struct brw_compiler *compiler, void *log_data,
  70               void *mem_ctx,
  71               struct brw_gs_compile *gs_compile,
  72               struct brw_gs_prog_data *prog_data,
  73               const nir_shader *shader,
  74               int shader_time_index);
  75    void init();
  76    ~fs_visitor();
  77
  78    fs_reg vgrf(const glsl_type *const type);
  79    void import_uniforms(fs_visitor *v);
  80    void setup_uniform_clipplane_values(gl_clip_plane *clip_planes);
  81    void compute_clip_distance(gl_clip_plane *clip_planes);
  82
  83    fs_inst *get_instruction_generating_reg(fs_inst *start,
  84                                            fs_inst *end,
  85                                            const fs_reg &reg);
  86
  87    void VARYING_PULL_CONSTANT_LOAD(const brw::fs_builder &bld,
  88                                    const fs_reg &dst,
  89                                    const fs_reg &surf_index,
  90                                    const fs_reg &varying_offset,
  91                                    uint32_t const_offset);
  92    void DEP_RESOLVE_MOV(const brw::fs_builder &bld, int grf);
  93
  94    bool run_fs(bool allow_spilling, bool do_rep_send);
  95    bool run_vs(gl_clip_plane *clip_planes);
  96    bool run_tcs_single_patch();
  97    bool run_tes();
  98    bool run_gs();
  99    bool run_cs();
 100    void optimize();
 101    void allocate_registers(bool allow_spilling);
 102    void setup_fs_payload_gen4();
 103    void setup_fs_payload_gen6();
 104    void setup_vs_payload();
 105    void setup_gs_payload();
 106    void setup_cs_payload();
 107    void fixup_3src_null_dest();
 108    void assign_curb_setup();
 109    void calculate_urb_setup();
 110    void assign_urb_setup();
 111    void convert_attr_sources_to_hw_regs(fs_inst *inst);
 112    void assign_vs_urb_setup();
 113    void assign_tcs_single_patch_urb_setup();
 114    void assign_tes_urb_setup();
 115    void assign_gs_urb_setup();
 116    bool assign_regs(bool allow_spilling, bool spill_all);
 117    void assign_regs_trivial();
 118    void calculate_payload_ranges(int payload_node_count,
 119                                  int *payload_last_use_ip);
 120    void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
 121                                    int first_payload_node);
 122    int choose_spill_reg(struct ra_graph *g);
 123    void spill_reg(int spill_reg);
 124    void split_virtual_grfs();
 125    bool compact_virtual_grfs();
 126    void assign_constant_locations();
 127    void lower_constant_loads();
 128    void invalidate_live_intervals();
 129    void calculate_live_intervals();
 130    void calculate_register_pressure();
 131    void validate();
 132    bool opt_algebraic();
 133    bool opt_redundant_discard_jumps();
 134    bool opt_cse();
 135    bool opt_cse_local(bblock_t *block);
 136    bool opt_copy_propagate();
 137    bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
 138    bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
 139    bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
 140                                  exec_list *acp);
 141    bool opt_drop_redundant_mov_to_flags();
 142    bool opt_register_renaming();
 143    bool register_coalesce();
 144    bool compute_to_mrf();
 145    bool eliminate_find_live_channel();
 146    bool dead_code_eliminate();
 147    bool remove_duplicate_mrf_writes();
 148
 149    bool opt_sampler_eot();
 150    bool virtual_grf_interferes(int a, int b);
 151    void schedule_instructions(instruction_scheduler_mode mode);
 152    void insert_gen4_send_dependency_workarounds();
 153    void insert_gen4_pre_send_dependency_workarounds(bblock_t *block,
 154                                                     fs_inst *inst);
 155    void insert_gen4_post_send_dependency_workarounds(bblock_t *block,
 156                                                      fs_inst *inst);
 157    void vfail(const char *msg, va_list args);
 158    void fail(const char *msg, ...);
 159    void limit_dispatch_width(unsigned n, const char *msg);
 160    void lower_uniform_pull_constant_loads();
 161    bool lower_load_payload();
 162    bool lower_pack();
 163    bool lower_d2x();
 164    bool lower_logical_sends();
 165    bool lower_integer_multiplication();
 166    bool lower_minmax();
 167    bool lower_simd_width();
 168    bool opt_combine_constants();
 169
 170    void emit_dummy_fs();
 171    void emit_repclear_shader();
 172    fs_reg *emit_fragcoord_interpolation();
 173    fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
 174                          glsl_interp_qualifier interpolation_mode,
 175                          bool is_centroid, bool is_sample);
 176    fs_reg *emit_frontfacing_interpolation();
 177    fs_reg *emit_samplepos_setup();
 178    fs_reg *emit_sampleid_setup();
 179    fs_reg *emit_samplemaskin_setup();
 180    void emit_general_interpolation(fs_reg *attr, const char *name,
 181                                    const glsl_type *type,
 182                                    glsl_interp_qualifier interpolation_mode,
 183                                    int *location, bool mod_centroid,
 184                                    bool mod_sample);
 185    fs_reg *emit_vs_system_value(int location);
 186    void emit_interpolation_setup_gen4();
 187    void emit_interpolation_setup_gen6();
 188    void compute_sample_position(fs_reg dst, fs_reg int_sample_pos);
 189    fs_reg emit_mcs_fetch(const fs_reg &coordinate, unsigned components,
 190                          const fs_reg &sampler);
 191    void emit_gen6_gather_wa(uint8_t wa, fs_reg dst);
 192    fs_reg resolve_source_modifiers(const fs_reg &src);
 193    void emit_discard_jump();
 194    bool opt_peephole_sel();
 195    bool opt_peephole_predicated_break();
 196    bool opt_saturate_propagation();
 197    bool opt_cmod_propagation();
 198    bool opt_zero_samples();
 199
 200    void emit_nir_code();
 201    void nir_setup_inputs();
 202    void nir_setup_single_output_varying(fs_reg *reg, const glsl_type *type,
 203                                         unsigned *location);
 204    void nir_setup_outputs();
 205    void nir_setup_uniforms();
 206    void nir_emit_system_values();
 207    void nir_emit_impl(nir_function_impl *impl);
 208    void nir_emit_cf_list(exec_list *list);
 209    void nir_emit_if(nir_if *if_stmt);
 210    void nir_emit_loop(nir_loop *loop);
 211    void nir_emit_block(nir_block *block);
 212    void nir_emit_instr(nir_instr *instr);
 213    void nir_emit_alu(const brw::fs_builder &bld, nir_alu_instr *instr);
 214    void nir_emit_load_const(const brw::fs_builder &bld,
 215                             nir_load_const_instr *instr);
 216    void nir_emit_undef(const brw::fs_builder &bld,
 217                        nir_ssa_undef_instr *instr);
 218    void nir_emit_vs_intrinsic(const brw::fs_builder &bld,
 219                               nir_intrinsic_instr *instr);
 220    void nir_emit_tcs_intrinsic(const brw::fs_builder &bld,
 221                                nir_intrinsic_instr *instr);
 222    void nir_emit_gs_intrinsic(const brw::fs_builder &bld,
 223                               nir_intrinsic_instr *instr);
 224    void nir_emit_fs_intrinsic(const brw::fs_builder &bld,
 225                               nir_intrinsic_instr *instr);
 226    void nir_emit_cs_intrinsic(const brw::fs_builder &bld,
 227                               nir_intrinsic_instr *instr);
 228    void nir_emit_intrinsic(const brw::fs_builder &bld,
 229                            nir_intrinsic_instr *instr);
 230    void nir_emit_tes_intrinsic(const brw::fs_builder &bld,
 231                                nir_intrinsic_instr *instr);
 232    void nir_emit_ssbo_atomic(const brw::fs_builder &bld,
 233                              int op, nir_intrinsic_instr *instr);
 234    void nir_emit_shared_atomic(const brw::fs_builder &bld,
 235                                int op, nir_intrinsic_instr *instr);
 236    void nir_emit_texture(const brw::fs_builder &bld,
 237                          nir_tex_instr *instr);
 238    void nir_emit_jump(const brw::fs_builder &bld,
 239                       nir_jump_instr *instr);
 240    fs_reg get_nir_src(const nir_src &src);
 241    fs_reg get_nir_src_imm(const nir_src &src);
 242    fs_reg get_nir_dest(const nir_dest &dest);
 243    fs_reg get_nir_image_deref(const nir_deref_var *deref);
 244    fs_reg get_indirect_offset(nir_intrinsic_instr *instr);
 245    void emit_percomp(const brw::fs_builder &bld, const fs_inst &inst,
 246                      unsigned wr_mask);
 247
 248    bool optimize_extract_to_float(nir_alu_instr *instr,
 249                                   const fs_reg &result);
 250    bool optimize_frontfacing_ternary(nir_alu_instr *instr,
 251                                      const fs_reg &result);
 252
 253    void emit_alpha_test();
 254    fs_inst *emit_single_fb_write(const brw::fs_builder &bld,
 255                                  fs_reg color1, fs_reg color2,
 256                                  fs_reg src0_alpha, unsigned components);
 257    void emit_fb_writes();
 258    void emit_urb_writes(const fs_reg &gs_vertex_count = fs_reg());
 259    void set_gs_stream_control_data_bits(const fs_reg &vertex_count,
 260                                         unsigned stream_id);
 261    void emit_gs_control_data_bits(const fs_reg &vertex_count);
 262    void emit_gs_end_primitive(const nir_src &vertex_count_nir_src);
 263    void emit_gs_vertex(const nir_src &vertex_count_nir_src,
 264                        unsigned stream_id);
 265    void emit_gs_thread_end();
 266    void emit_gs_input_load(const fs_reg &dst, const nir_src &vertex_src,
 267                            unsigned base_offset, const nir_src &offset_src,
 268                            unsigned num_components, unsigned first_component);
 269    void emit_cs_terminate();
 270    fs_reg *emit_cs_work_group_id_setup();
 271
 272    void emit_barrier();
 273
 274    void emit_shader_time_begin();
 275    void emit_shader_time_end();
 276    void SHADER_TIME_ADD(const brw::fs_builder &bld,
 277                         int shader_time_subindex,
 278                         fs_reg value);
 279
 280    fs_reg get_timestamp(const brw::fs_builder &bld);
 281
 282    struct brw_reg interp_reg(int location, int channel);
 283
 284    int implied_mrf_writes(fs_inst *inst);
 285
 286    virtual void dump_instructions();
 287    virtual void dump_instructions(const char *name);
 288    void dump_instruction(backend_instruction *inst);
 289    void dump_instruction(backend_instruction *inst, FILE *file);
 290
 291    const void *const key;
 292    const struct brw_sampler_prog_key_data *key_tex;
 293
 294    struct brw_gs_compile *gs_compile;
 295
 296    struct brw_stage_prog_data *prog_data;
 297    struct gl_program *prog;
 298
 299    const struct brw_vue_map *input_vue_map;
 300
 301    int *virtual_grf_start;
 302    int *virtual_grf_end;
 303    brw::fs_live_variables *live_intervals;
 304
 305    int *regs_live_at_ip;
 306
 307    /** Number of uniform variable components visited. */
 308    unsigned uniforms;
 309
 310    /** Byte-offset for the next available spot in the scratch space buffer. */
 311    unsigned last_scratch;
 312
 313    /**
 314     * Array mapping UNIFORM register numbers to the pull parameter index,
 315     * or -1 if this uniform register isn't being uploaded as a pull constant.
 316     */
 317    int *pull_constant_loc;
 318
 319    /**
 320     * Array mapping UNIFORM register numbers to the push parameter index,
 321     * or -1 if this uniform register isn't being uploaded as a push constant.
 322     */
 323    int *push_constant_loc;
 324
 325    fs_reg frag_depth;
 326    fs_reg frag_stencil;
 327    fs_reg sample_mask;
 328    fs_reg outputs[VARYING_SLOT_MAX];
 329    unsigned output_components[VARYING_SLOT_MAX];
 330    fs_reg dual_src_output;
 331    bool do_dual_src;
 332    int first_non_payload_grf;
 333    /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
 334    unsigned max_grf;
 335
 336    fs_reg *nir_locals;
 337    fs_reg *nir_ssa_values;
 338    fs_reg nir_inputs;
 339    fs_reg nir_outputs;
 340    fs_reg *nir_system_values;
 341
 342    bool failed;
 343    char *fail_msg;
 344
 345    /** Register numbers for thread payload fields. */
 346    struct thread_payload {
 347       uint8_t source_depth_reg;
 348       uint8_t source_w_reg;
 349       uint8_t aa_dest_stencil_reg;
 350       uint8_t dest_depth_reg;
 351       uint8_t sample_pos_reg;
 352       uint8_t sample_mask_in_reg;
 353       uint8_t barycentric_coord_reg[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 354       uint8_t local_invocation_id_reg;
 355
 356       /** The number of thread payload registers the hardware will supply. */
 357       uint8_t num_regs;
 358    } payload;
 359
 360    bool source_depth_to_render_target;
 361    bool runtime_check_aads_emit;
 362
 363    fs_reg pixel_x;
 364    fs_reg pixel_y;
 365    fs_reg wpos_w;
 366    fs_reg pixel_w;
 367    fs_reg delta_xy[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 368    fs_reg shader_start_time;
 369    fs_reg userplane[MAX_CLIP_PLANES];
 370    fs_reg final_gs_vertex_count;
 371    fs_reg control_data_bits;
 372    fs_reg invocation_id;
 373
 374    unsigned grf_used;
 375    bool spilled_any_registers;
 376
 377    const unsigned dispatch_width; /**< 8, 16 or 32 */
 378    unsigned min_dispatch_width;
 379    unsigned max_dispatch_width;
 380
 381    int shader_time_index;
 382
 383    unsigned promoted_constants;
 384    brw::fs_builder bld;
 385 };
 386
 387 /**
 388  * The fragment shader code generator.
 389  *
 390  * Translates FS IR to actual i965 assembly code.
 391  */
 392 class fs_generator
 393 {
 394 public:
 395    fs_generator(const struct brw_compiler *compiler, void *log_data,
 396                 void *mem_ctx,
 397                 const void *key,
 398                 struct brw_stage_prog_data *prog_data,
 399                 unsigned promoted_constants,
 400                 bool runtime_check_aads_emit,
 401                 gl_shader_stage stage);
 402    ~fs_generator();
 403
 404    void enable_debug(const char *shader_name);
 405    int generate_code(const cfg_t *cfg, int dispatch_width);
 406    const unsigned *get_assembly(unsigned int *assembly_size);
 407
 408 private:
 409    void fire_fb_write(fs_inst *inst,
 410                       struct brw_reg payload,
 411                       struct brw_reg implied_header,
 412                       GLuint nr);
 413    void generate_fb_write(fs_inst *inst, struct brw_reg payload);
 414    void generate_urb_read(fs_inst *inst, struct brw_reg dst, struct brw_reg payload);
 415    void generate_urb_write(fs_inst *inst, struct brw_reg payload);
 416    void generate_cs_terminate(fs_inst *inst, struct brw_reg payload);
 417    void generate_barrier(fs_inst *inst, struct brw_reg src);
 418    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 419                          struct brw_reg *src);
 420    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 421                      struct brw_reg surface_index,
 422                      struct brw_reg sampler_index);
 423    void generate_get_buffer_size(fs_inst *inst, struct brw_reg dst,
 424                                  struct brw_reg src,
 425                                  struct brw_reg surf_index);
 426    void generate_ddx(enum opcode op, struct brw_reg dst, struct brw_reg src);
 427    void generate_ddy(enum opcode op, struct brw_reg dst, struct brw_reg src);
 428    void generate_scratch_write(fs_inst *inst, struct brw_reg src);
 429    void generate_scratch_read(fs_inst *inst, struct brw_reg dst);
 430    void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst);
 431    void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 432                                             struct brw_reg index,
 433                                             struct brw_reg offset);
 434    void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
 435                                                  struct brw_reg dst,
 436                                                  struct brw_reg surf_index,
 437                                                  struct brw_reg offset);
 438    void generate_varying_pull_constant_load_gen4(fs_inst *inst,
 439                                                  struct brw_reg dst,
 440                                                  struct brw_reg index);
 441    void generate_varying_pull_constant_load_gen7(fs_inst *inst,
 442                                                  struct brw_reg dst,
 443                                                  struct brw_reg index,
 444                                                  struct brw_reg offset);
 445    void generate_mov_dispatch_to_flags(fs_inst *inst);
 446
 447    void generate_pixel_interpolator_query(fs_inst *inst,
 448                                           struct brw_reg dst,
 449                                           struct brw_reg src,
 450                                           struct brw_reg msg_data,
 451                                           unsigned msg_type);
 452
 453    void generate_set_sample_id(fs_inst *inst,
 454                                struct brw_reg dst,
 455                                struct brw_reg src0,
 456                                struct brw_reg src1);
 457
 458    void generate_set_simd4x2_offset(fs_inst *inst,
 459                                     struct brw_reg dst,
 460                                     struct brw_reg offset);
 461    void generate_discard_jump(fs_inst *inst);
 462
 463    void generate_pack_half_2x16_split(fs_inst *inst,
 464                                       struct brw_reg dst,
 465                                       struct brw_reg x,
 466                                       struct brw_reg y);
 467    void generate_unpack_half_2x16_split(fs_inst *inst,
 468                                         struct brw_reg dst,
 469                                         struct brw_reg src);
 470
 471    void generate_shader_time_add(fs_inst *inst,
 472                                  struct brw_reg payload,
 473                                  struct brw_reg offset,
 474                                  struct brw_reg value);
 475
 476    void generate_mov_indirect(fs_inst *inst,
 477                               struct brw_reg dst,
 478                               struct brw_reg reg,
 479                               struct brw_reg indirect_byte_offset);
 480
 481    bool patch_discard_jumps_to_fb_writes();
 482
 483    const struct brw_compiler *compiler;
 484    void *log_data; /* Passed to compiler->*_log functions */
 485
 486    const struct brw_device_info *devinfo;
 487
 488    struct brw_codegen *p;
 489    const void * const key;
 490    struct brw_stage_prog_data * const prog_data;
 491
 492    unsigned dispatch_width; /**< 8, 16 or 32 */
 493
 494    exec_list discard_halt_patches;
 495    unsigned promoted_constants;
 496    bool runtime_check_aads_emit;
 497    bool debug_flag;
 498    const char *shader_name;
 499    gl_shader_stage stage;
 500    void *mem_ctx;
 501 };
 502
 503 bool brw_do_channel_expressions(struct exec_list *instructions);
 504 bool brw_do_vector_splitting(struct exec_list *instructions);
 505
 506 void shuffle_32bit_load_result_to_64bit_data(const brw::fs_builder &bld,
 507                                              const fs_reg &dst,
 508                                              const fs_reg &src,
 509                                              uint32_t components);
 510
 511 void shuffle_64bit_data_for_32bit_write(const brw::fs_builder &bld,
 512                                         const fs_reg &dst,
 513                                         const fs_reg &src,
 514                                         uint32_t components);
 515 fs_reg setup_imm_df(const brw::fs_builder &bld,
 516                     double v);