src/mesa/drivers/dri/i965/brw_fs.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #pragma once
  29
  30 #include "brw_shader.h"
  31
  32 extern "C" {
  33
  34 #include <sys/types.h>
  35
  36 #include "main/macros.h"
  37 #include "main/shaderobj.h"
  38 #include "main/uniforms.h"
  39 #include "program/prog_parameter.h"
  40 #include "program/prog_print.h"
  41 #include "program/prog_optimize.h"
  42 #include "util/register_allocate.h"
  43 #include "program/sampler.h"
  44 #include "program/hash_table.h"
  45 #include "brw_context.h"
  46 #include "brw_eu.h"
  47 #include "brw_wm.h"
  48 #include "brw_shader.h"
  49 #include "intel_asm_annotation.h"
  50 }
  51 #include "glsl/glsl_types.h"
  52 #include "glsl/ir.h"
  53
  54 #define MAX_SAMPLER_MESSAGE_SIZE 11
  55
  56 struct bblock_t;
  57 namespace {
  58    struct acp_entry;
  59 }
  60
  61 namespace brw {
  62    class fs_live_variables;
  63 }
  64
  65 class fs_reg : public backend_reg {
  66 public:
  67    DECLARE_RALLOC_CXX_OPERATORS(fs_reg)
  68
  69    void init();
  70
  71    fs_reg();
  72    fs_reg(float f);
  73    fs_reg(int32_t i);
  74    fs_reg(uint32_t u);
  75    fs_reg(struct brw_reg fixed_hw_reg);
  76    fs_reg(enum register_file file, int reg);
  77    fs_reg(enum register_file file, int reg, enum brw_reg_type type);
  78    fs_reg(class fs_visitor *v, const struct glsl_type *type);
  79
  80    bool equals(const fs_reg &r) const;
  81    bool is_valid_3src() const;
  82    bool is_contiguous() const;
  83
  84    fs_reg &apply_stride(unsigned stride);
  85    /** Smear a channel of the reg to all channels. */
  86    fs_reg &set_smear(unsigned subreg);
  87
  88    /**
  89     * Offset in bytes from the start of the register.  Values up to a
  90     * backend_reg::reg_offset unit are valid.
  91     */
  92    int subreg_offset;
  93
  94    fs_reg *reladdr;
  95
  96    /** Register region horizontal stride */
  97    uint8_t stride;
  98 };
  99
 100 static inline fs_reg
 101 retype(fs_reg reg, enum brw_reg_type type)
 102 {
 103    reg.fixed_hw_reg.type = reg.type = type;
 104    return reg;
 105 }
 106
 107 static inline fs_reg
 108 offset(fs_reg reg, unsigned delta)
 109 {
 110    assert(delta == 0 || (reg.file != HW_REG && reg.file != IMM));
 111    reg.reg_offset += delta;
 112    return reg;
 113 }
 114
 115 static inline fs_reg
 116 byte_offset(fs_reg reg, unsigned delta)
 117 {
 118    assert(delta == 0 || (reg.file != HW_REG && reg.file != IMM));
 119    reg.subreg_offset += delta;
 120    return reg;
 121 }
 122
 123 /**
 124  * Get either of the 8-component halves of a 16-component register.
 125  *
 126  * Note: this also works if \c reg represents a SIMD16 pair of registers.
 127  */
 128 static inline fs_reg
 129 half(const fs_reg &reg, unsigned idx)
 130 {
 131    assert(idx < 2);
 132    assert(idx == 0 || (reg.file != HW_REG && reg.file != IMM));
 133    return byte_offset(reg, 8 * idx * reg.stride * type_sz(reg.type));
 134 }
 135
 136 static const fs_reg reg_undef;
 137 static const fs_reg reg_null_f(retype(brw_null_reg(), BRW_REGISTER_TYPE_F));
 138 static const fs_reg reg_null_d(retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
 139 static const fs_reg reg_null_ud(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD));
 140
 141 class ip_record : public exec_node {
 142 public:
 143    DECLARE_RALLOC_CXX_OPERATORS(ip_record)
 144
 145    ip_record(int ip)
 146    {
 147       this->ip = ip;
 148    }
 149
 150    int ip;
 151 };
 152
 153 class fs_inst : public backend_instruction {
 154    fs_inst &operator=(const fs_inst &);
 155
 156 public:
 157    DECLARE_RALLOC_CXX_OPERATORS(fs_inst)
 158
 159    void init(enum opcode opcode, const fs_reg &dst, fs_reg *src, int sources);
 160
 161    fs_inst(enum opcode opcode = BRW_OPCODE_NOP, const fs_reg &dst = reg_undef);
 162    fs_inst(enum opcode opcode, const fs_reg &dst, const fs_reg &src0);
 163    fs_inst(enum opcode opcode, const fs_reg &dst, const fs_reg &src0,
 164            const fs_reg &src1);
 165    fs_inst(enum opcode opcode, const fs_reg &dst, const fs_reg &src0,
 166            const fs_reg &src1, const fs_reg &src2);
 167    fs_inst(enum opcode opcode, const fs_reg &dst, fs_reg src[], int sources);
 168    fs_inst(const fs_inst &that);
 169
 170    void resize_sources(uint8_t num_sources);
 171
 172    bool equals(fs_inst *inst) const;
 173    bool overwrites_reg(const fs_reg &reg) const;
 174    bool is_send_from_grf() const;
 175    bool is_partial_write() const;
 176    int regs_read(fs_visitor *v, int arg) const;
 177    bool can_do_source_mods(struct brw_context *brw);
 178
 179    bool reads_flag() const;
 180    bool writes_flag() const;
 181
 182    fs_reg dst;
 183    fs_reg *src;
 184
 185    uint8_t sources; /**< Number of fs_reg sources. */
 186
 187    /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional
 188     * mod and predication.
 189     */
 190    uint8_t flag_subreg;
 191
 192    uint8_t regs_written; /**< Number of vgrfs written by a SEND message, or 1 */
 193    bool eot:1;
 194    bool header_present:1;
 195    bool shadow_compare:1;
 196    bool force_uncompressed:1;
 197    bool force_sechalf:1;
 198    bool pi_noperspective:1;   /**< Pixel interpolator noperspective flag */
 199 };
 200
 201 /**
 202  * The fragment shader front-end.
 203  *
 204  * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
 205  */
 206 class fs_visitor : public backend_visitor
 207 {
 208 public:
 209
 210    fs_visitor(struct brw_context *brw,
 211               void *mem_ctx,
 212               const struct brw_wm_prog_key *key,
 213               struct brw_wm_prog_data *prog_data,
 214               struct gl_shader_program *shader_prog,
 215               struct gl_fragment_program *fp,
 216               unsigned dispatch_width);
 217    ~fs_visitor();
 218    void init();
 219
 220    fs_reg *variable_storage(ir_variable *var);
 221    int virtual_grf_alloc(int size);
 222    void import_uniforms(fs_visitor *v);
 223
 224    void visit(ir_variable *ir);
 225    void visit(ir_assignment *ir);
 226    void visit(ir_dereference_variable *ir);
 227    void visit(ir_dereference_record *ir);
 228    void visit(ir_dereference_array *ir);
 229    void visit(ir_expression *ir);
 230    void visit(ir_texture *ir);
 231    void visit(ir_if *ir);
 232    void visit(ir_constant *ir);
 233    void visit(ir_swizzle *ir);
 234    void visit(ir_return *ir);
 235    void visit(ir_loop *ir);
 236    void visit(ir_loop_jump *ir);
 237    void visit(ir_discard *ir);
 238    void visit(ir_call *ir);
 239    void visit(ir_function *ir);
 240    void visit(ir_function_signature *ir);
 241    void visit(ir_emit_vertex *);
 242    void visit(ir_end_primitive *);
 243
 244    uint32_t gather_channel(ir_texture *ir, uint32_t sampler);
 245    void swizzle_result(ir_texture *ir, fs_reg orig_val, uint32_t sampler);
 246
 247    fs_inst *emit(fs_inst *inst);
 248    void emit(exec_list list);
 249
 250    fs_inst *emit(enum opcode opcode);
 251    fs_inst *emit(enum opcode opcode, const fs_reg &dst);
 252    fs_inst *emit(enum opcode opcode, const fs_reg &dst, const fs_reg &src0);
 253    fs_inst *emit(enum opcode opcode, const fs_reg &dst, const fs_reg &src0,
 254                  const fs_reg &src1);
 255    fs_inst *emit(enum opcode opcode, const fs_reg &dst,
 256                  const fs_reg &src0, const fs_reg &src1, const fs_reg &src2);
 257    fs_inst *emit(enum opcode opcode, const fs_reg &dst,
 258                  fs_reg src[], int sources);
 259
 260    fs_inst *MOV(const fs_reg &dst, const fs_reg &src);
 261    fs_inst *NOT(const fs_reg &dst, const fs_reg &src);
 262    fs_inst *RNDD(const fs_reg &dst, const fs_reg &src);
 263    fs_inst *RNDE(const fs_reg &dst, const fs_reg &src);
 264    fs_inst *RNDZ(const fs_reg &dst, const fs_reg &src);
 265    fs_inst *FRC(const fs_reg &dst, const fs_reg &src);
 266    fs_inst *ADD(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 267    fs_inst *MUL(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 268    fs_inst *MACH(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 269    fs_inst *MAC(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 270    fs_inst *SHL(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 271    fs_inst *SHR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 272    fs_inst *ASR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 273    fs_inst *AND(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 274    fs_inst *OR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 275    fs_inst *XOR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 276    fs_inst *IF(enum brw_predicate predicate);
 277    fs_inst *IF(const fs_reg &src0, const fs_reg &src1,
 278                enum brw_conditional_mod condition);
 279    fs_inst *CMP(fs_reg dst, fs_reg src0, fs_reg src1,
 280                 enum brw_conditional_mod condition);
 281    fs_inst *LRP(const fs_reg &dst, const fs_reg &a, const fs_reg &y,
 282                 const fs_reg &x);
 283    fs_inst *DEP_RESOLVE_MOV(int grf);
 284    fs_inst *BFREV(const fs_reg &dst, const fs_reg &value);
 285    fs_inst *BFE(const fs_reg &dst, const fs_reg &bits, const fs_reg &offset,
 286                 const fs_reg &value);
 287    fs_inst *BFI1(const fs_reg &dst, const fs_reg &bits, const fs_reg &offset);
 288    fs_inst *BFI2(const fs_reg &dst, const fs_reg &bfi1_dst,
 289                  const fs_reg &insert, const fs_reg &base);
 290    fs_inst *FBH(const fs_reg &dst, const fs_reg &value);
 291    fs_inst *FBL(const fs_reg &dst, const fs_reg &value);
 292    fs_inst *CBIT(const fs_reg &dst, const fs_reg &value);
 293    fs_inst *MAD(const fs_reg &dst, const fs_reg &c, const fs_reg &b,
 294                 const fs_reg &a);
 295    fs_inst *ADDC(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 296    fs_inst *SUBB(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 297    fs_inst *SEL(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 298
 299    int type_size(const struct glsl_type *type);
 300    fs_inst *get_instruction_generating_reg(fs_inst *start,
 301                                            fs_inst *end,
 302                                            const fs_reg &reg);
 303
 304    fs_inst *LOAD_PAYLOAD(const fs_reg &dst, fs_reg *src, int sources);
 305
 306    exec_list VARYING_PULL_CONSTANT_LOAD(const fs_reg &dst,
 307                                         const fs_reg &surf_index,
 308                                         const fs_reg &varying_offset,
 309                                         uint32_t const_offset);
 310
 311    bool run();
 312    void assign_binding_table_offsets();
 313    void setup_payload_gen4();
 314    void setup_payload_gen6();
 315    void assign_curb_setup();
 316    void calculate_urb_setup();
 317    void assign_urb_setup();
 318    bool assign_regs(bool allow_spilling);
 319    void assign_regs_trivial();
 320    void get_used_mrfs(bool *mrf_used);
 321    void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
 322                                    int first_payload_node);
 323    void setup_mrf_hack_interference(struct ra_graph *g,
 324                                     int first_mrf_hack_node);
 325    int choose_spill_reg(struct ra_graph *g);
 326    void spill_reg(int spill_reg);
 327    void split_virtual_grfs();
 328    void compact_virtual_grfs();
 329    void move_uniform_array_access_to_pull_constants();
 330    void assign_constant_locations();
 331    void demote_pull_constants();
 332    void invalidate_live_intervals(bool invalidate_cfg = true);
 333    void calculate_live_intervals();
 334    void calculate_register_pressure();
 335    bool opt_algebraic();
 336    bool opt_cse();
 337    bool opt_cse_local(bblock_t *block);
 338    bool opt_copy_propagate();
 339    bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
 340    bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
 341                                  exec_list *acp);
 342    void opt_drop_redundant_mov_to_flags();
 343    bool opt_register_renaming();
 344    bool register_coalesce();
 345    bool compute_to_mrf();
 346    bool dead_code_eliminate();
 347    bool remove_duplicate_mrf_writes();
 348    bool virtual_grf_interferes(int a, int b);
 349    void schedule_instructions(instruction_scheduler_mode mode);
 350    void insert_gen4_send_dependency_workarounds();
 351    void insert_gen4_pre_send_dependency_workarounds(bblock_t *block,
 352                                                     fs_inst *inst);
 353    void insert_gen4_post_send_dependency_workarounds(bblock_t *block,
 354                                                      fs_inst *inst);
 355    void vfail(const char *msg, va_list args);
 356    void fail(const char *msg, ...);
 357    void no16(const char *msg, ...);
 358    void lower_uniform_pull_constant_loads();
 359    bool lower_load_payload();
 360
 361    void try_rep_send();
 362
 363    void push_force_uncompressed();
 364    void pop_force_uncompressed();
 365
 366    void emit_dummy_fs();
 367    fs_reg *emit_fragcoord_interpolation(ir_variable *ir);
 368    fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
 369                          glsl_interp_qualifier interpolation_mode,
 370                          bool is_centroid, bool is_sample);
 371    fs_reg *emit_frontfacing_interpolation();
 372    fs_reg *emit_samplepos_setup();
 373    fs_reg *emit_sampleid_setup(ir_variable *ir);
 374    fs_reg *emit_general_interpolation(ir_variable *ir);
 375    void emit_interpolation_setup_gen4();
 376    void emit_interpolation_setup_gen6();
 377    void compute_sample_position(fs_reg dst, fs_reg int_sample_pos);
 378    fs_reg rescale_texcoord(ir_texture *ir, fs_reg coordinate,
 379                            bool is_rect, uint32_t sampler, int texunit);
 380    fs_inst *emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 381                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
 382                               uint32_t sampler);
 383    fs_inst *emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 384                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
 385                               fs_reg sample_index, uint32_t sampler);
 386    fs_inst *emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 387                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
 388                               fs_reg sample_index, fs_reg mcs, fs_reg sampler);
 389    fs_reg emit_mcs_fetch(ir_texture *ir, fs_reg coordinate, fs_reg sampler);
 390    void emit_gen6_gather_wa(uint8_t wa, fs_reg dst);
 391    fs_reg fix_math_operand(fs_reg src);
 392    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0);
 393    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0, fs_reg src1);
 394    void emit_lrp(const fs_reg &dst, const fs_reg &x, const fs_reg &y,
 395                  const fs_reg &a);
 396    void emit_minmax(enum brw_conditional_mod conditionalmod, const fs_reg &dst,
 397                     const fs_reg &src0, const fs_reg &src1);
 398    bool try_emit_saturate(ir_expression *ir);
 399    bool try_emit_mad(ir_expression *ir);
 400    void try_replace_with_sel();
 401    bool opt_peephole_sel();
 402    bool opt_peephole_predicated_break();
 403    bool opt_saturate_propagation();
 404    void emit_bool_to_cond_code(ir_rvalue *condition);
 405    void emit_if_gen6(ir_if *ir);
 406    void emit_unspill(bblock_t *block, fs_inst *inst, fs_reg reg,
 407                      uint32_t spill_offset, int count);
 408
 409    void emit_fragment_program_code();
 410    void setup_fp_regs();
 411    fs_reg get_fp_src_reg(const prog_src_register *src);
 412    fs_reg get_fp_dst_reg(const prog_dst_register *dst);
 413    void emit_fp_alu1(enum opcode opcode,
 414                      const struct prog_instruction *fpi,
 415                      fs_reg dst, fs_reg src);
 416    void emit_fp_alu2(enum opcode opcode,
 417                      const struct prog_instruction *fpi,
 418                      fs_reg dst, fs_reg src0, fs_reg src1);
 419    void emit_fp_scalar_write(const struct prog_instruction *fpi,
 420                              fs_reg dst, fs_reg src);
 421    void emit_fp_scalar_math(enum opcode opcode,
 422                             const struct prog_instruction *fpi,
 423                             fs_reg dst, fs_reg src);
 424
 425    void emit_fp_minmax(const struct prog_instruction *fpi,
 426                        fs_reg dst, fs_reg src0, fs_reg src1);
 427
 428    void emit_fp_sop(enum brw_conditional_mod conditional_mod,
 429                     const struct prog_instruction *fpi,
 430                     fs_reg dst, fs_reg src0, fs_reg src1, fs_reg one);
 431
 432    void emit_color_write(int target, int index, int first_color_mrf);
 433    void emit_alpha_test();
 434    void emit_fb_writes();
 435
 436    void emit_shader_time_begin();
 437    void emit_shader_time_end();
 438    void emit_shader_time_write(enum shader_time_shader_type type,
 439                                fs_reg value);
 440
 441    void emit_untyped_atomic(unsigned atomic_op, unsigned surf_index,
 442                             fs_reg dst, fs_reg offset, fs_reg src0,
 443                             fs_reg src1);
 444
 445    void emit_untyped_surface_read(unsigned surf_index, fs_reg dst,
 446                                   fs_reg offset);
 447
 448    void emit_interpolate_expression(ir_expression *ir);
 449
 450    bool try_rewrite_rhs_to_dst(ir_assignment *ir,
 451                                fs_reg dst,
 452                                fs_reg src,
 453                                fs_inst *pre_rhs_inst,
 454                                fs_inst *last_rhs_inst);
 455    void emit_assignment_writes(fs_reg &l, fs_reg &r,
 456                                const glsl_type *type, bool predicated);
 457    void resolve_ud_negate(fs_reg *reg);
 458    void resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg);
 459
 460    fs_reg get_timestamp();
 461
 462    struct brw_reg interp_reg(int location, int channel);
 463    void setup_uniform_values(ir_variable *ir);
 464    void setup_builtin_uniform_values(ir_variable *ir);
 465    int implied_mrf_writes(fs_inst *inst);
 466
 467    virtual void dump_instructions();
 468    virtual void dump_instructions(const char *name);
 469    void dump_instruction(backend_instruction *inst);
 470    void dump_instruction(backend_instruction *inst, FILE *file);
 471
 472    void visit_atomic_counter_intrinsic(ir_call *ir);
 473
 474    const void *const key;
 475    struct brw_stage_prog_data *prog_data;
 476    unsigned int sanity_param_count;
 477
 478    int *param_size;
 479
 480    int *virtual_grf_sizes;
 481    int virtual_grf_count;
 482    int virtual_grf_array_size;
 483    int *virtual_grf_start;
 484    int *virtual_grf_end;
 485    brw::fs_live_variables *live_intervals;
 486
 487    int *regs_live_at_ip;
 488
 489    /** Number of uniform variable components visited. */
 490    unsigned uniforms;
 491
 492    /** Byte-offset for the next available spot in the scratch space buffer. */
 493    unsigned last_scratch;
 494
 495    /**
 496     * Array mapping UNIFORM register numbers to the pull parameter index,
 497     * or -1 if this uniform register isn't being uploaded as a pull constant.
 498     */
 499    int *pull_constant_loc;
 500
 501    /**
 502     * Array mapping UNIFORM register numbers to the push parameter index,
 503     * or -1 if this uniform register isn't being uploaded as a push constant.
 504     */
 505    int *push_constant_loc;
 506
 507    struct hash_table *variable_ht;
 508    fs_reg frag_depth;
 509    fs_reg sample_mask;
 510    fs_reg outputs[BRW_MAX_DRAW_BUFFERS];
 511    unsigned output_components[BRW_MAX_DRAW_BUFFERS];
 512    fs_reg dual_src_output;
 513    bool do_dual_src;
 514    int first_non_payload_grf;
 515    /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
 516    int max_grf;
 517
 518    fs_reg *fp_temp_regs;
 519    fs_reg *fp_input_regs;
 520
 521    /** @{ debug annotation info */
 522    const char *current_annotation;
 523    const void *base_ir;
 524    /** @} */
 525
 526    bool failed;
 527    char *fail_msg;
 528    bool simd16_unsupported;
 529    char *no16_msg;
 530
 531    /* Result of last visit() method. */
 532    fs_reg result;
 533
 534    /** Register numbers for thread payload fields. */
 535    struct {
 536       uint8_t source_depth_reg;
 537       uint8_t source_w_reg;
 538       uint8_t aa_dest_stencil_reg;
 539       uint8_t dest_depth_reg;
 540       uint8_t sample_pos_reg;
 541       uint8_t sample_mask_in_reg;
 542       uint8_t barycentric_coord_reg[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 543
 544       /** The number of thread payload registers the hardware will supply. */
 545       uint8_t num_regs;
 546    } payload;
 547
 548    bool source_depth_to_render_target;
 549    bool runtime_check_aads_emit;
 550
 551    fs_reg pixel_x;
 552    fs_reg pixel_y;
 553    fs_reg wpos_w;
 554    fs_reg pixel_w;
 555    fs_reg delta_x[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 556    fs_reg delta_y[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 557    fs_reg shader_start_time;
 558
 559    int grf_used;
 560    bool spilled_any_registers;
 561
 562    const unsigned dispatch_width; /**< 8 or 16 */
 563
 564    int force_uncompressed_stack;
 565 };
 566
 567 /**
 568  * The fragment shader code generator.
 569  *
 570  * Translates FS IR to actual i965 assembly code.
 571  */
 572 class fs_generator
 573 {
 574 public:
 575    fs_generator(struct brw_context *brw,
 576                 void *mem_ctx,
 577                 const struct brw_wm_prog_key *key,
 578                 struct brw_wm_prog_data *prog_data,
 579                 struct gl_shader_program *shader_prog,
 580                 struct gl_fragment_program *fp,
 581                 bool runtime_check_aads_emit,
 582                 bool debug_flag);
 583    ~fs_generator();
 584
 585    const unsigned *generate_assembly(const cfg_t *simd8_cfg,
 586                                      const cfg_t *simd16_cfg,
 587                                      unsigned *assembly_size);
 588
 589 private:
 590    void generate_code(const cfg_t *cfg);
 591    void fire_fb_write(fs_inst *inst,
 592                       GLuint base_reg,
 593                       struct brw_reg implied_header,
 594                       GLuint nr);
 595    void generate_fb_write(fs_inst *inst);
 596    void generate_blorp_fb_write(fs_inst *inst);
 597    void generate_rep_fb_write(fs_inst *inst);
 598    void generate_pixel_xy(struct brw_reg dst, bool is_x);
 599    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 600                          struct brw_reg *src);
 601    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 602                      struct brw_reg sampler_index);
 603    void generate_math_gen6(fs_inst *inst,
 604                            struct brw_reg dst,
 605                            struct brw_reg src0,
 606                            struct brw_reg src1);
 607    void generate_math_gen4(fs_inst *inst,
 608                            struct brw_reg dst,
 609                            struct brw_reg src);
 610    void generate_math_g45(fs_inst *inst,
 611                           struct brw_reg dst,
 612                           struct brw_reg src);
 613    void generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src, struct brw_reg quality);
 614    void generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 615                      struct brw_reg quality, bool negate_value);
 616    void generate_scratch_write(fs_inst *inst, struct brw_reg src);
 617    void generate_scratch_read(fs_inst *inst, struct brw_reg dst);
 618    void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst);
 619    void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 620                                             struct brw_reg index,
 621                                             struct brw_reg offset);
 622    void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
 623                                                  struct brw_reg dst,
 624                                                  struct brw_reg surf_index,
 625                                                  struct brw_reg offset);
 626    void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 627                                             struct brw_reg index,
 628                                             struct brw_reg offset);
 629    void generate_varying_pull_constant_load_gen7(fs_inst *inst,
 630                                                  struct brw_reg dst,
 631                                                  struct brw_reg index,
 632                                                  struct brw_reg offset);
 633    void generate_mov_dispatch_to_flags(fs_inst *inst);
 634
 635    void generate_pixel_interpolator_query(fs_inst *inst,
 636                                           struct brw_reg dst,
 637                                           struct brw_reg src,
 638                                           struct brw_reg msg_data,
 639                                           unsigned msg_type);
 640
 641    void generate_set_omask(fs_inst *inst,
 642                            struct brw_reg dst,
 643                            struct brw_reg sample_mask);
 644
 645    void generate_set_sample_id(fs_inst *inst,
 646                                struct brw_reg dst,
 647                                struct brw_reg src0,
 648                                struct brw_reg src1);
 649
 650    void generate_set_simd4x2_offset(fs_inst *inst,
 651                                     struct brw_reg dst,
 652                                     struct brw_reg offset);
 653    void generate_discard_jump(fs_inst *inst);
 654
 655    void generate_pack_half_2x16_split(fs_inst *inst,
 656                                       struct brw_reg dst,
 657                                       struct brw_reg x,
 658                                       struct brw_reg y);
 659    void generate_unpack_half_2x16_split(fs_inst *inst,
 660                                         struct brw_reg dst,
 661                                         struct brw_reg src);
 662
 663    void generate_shader_time_add(fs_inst *inst,
 664                                  struct brw_reg payload,
 665                                  struct brw_reg offset,
 666                                  struct brw_reg value);
 667
 668    void generate_untyped_atomic(fs_inst *inst,
 669                                 struct brw_reg dst,
 670                                 struct brw_reg atomic_op,
 671                                 struct brw_reg surf_index);
 672
 673    void generate_untyped_surface_read(fs_inst *inst,
 674                                       struct brw_reg dst,
 675                                       struct brw_reg surf_index);
 676
 677    bool patch_discard_jumps_to_fb_writes();
 678
 679    struct brw_context *brw;
 680    struct gl_context *ctx;
 681
 682    struct brw_compile *p;
 683    gl_shader_stage stage;
 684    const void * const key;
 685    struct brw_stage_prog_data * const prog_data;
 686
 687    struct gl_shader_program * const shader_prog;
 688    const struct gl_program *prog;
 689
 690    unsigned dispatch_width; /**< 8 or 16 */
 691
 692    exec_list discard_halt_patches;
 693    bool runtime_check_aads_emit;
 694    const bool debug_flag;
 695    void *mem_ctx;
 696 };
 697
 698 bool brw_do_channel_expressions(struct exec_list *instructions);
 699 bool brw_do_vector_splitting(struct exec_list *instructions);
 700 bool brw_fs_precompile(struct gl_context *ctx, struct gl_shader_program *prog);
 701
 702 struct brw_reg brw_reg_from_fs_reg(fs_reg *reg);