src/mesa/drivers/dri/i965/brw_fs.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #pragma once
  29
  30 #include "brw_shader.h"
  31
  32 extern "C" {
  33
  34 #include <sys/types.h>
  35
  36 #include "main/macros.h"
  37 #include "main/shaderobj.h"
  38 #include "main/uniforms.h"
  39 #include "program/prog_parameter.h"
  40 #include "program/prog_print.h"
  41 #include "program/prog_optimize.h"
  42 #include "program/register_allocate.h"
  43 #include "program/sampler.h"
  44 #include "program/hash_table.h"
  45 #include "brw_context.h"
  46 #include "brw_eu.h"
  47 #include "brw_wm.h"
  48 #include "brw_shader.h"
  49 }
  50 #include "glsl/glsl_types.h"
  51 #include "glsl/ir.h"
  52
  53 class bblock_t;
  54 namespace {
  55    struct acp_entry;
  56 }
  57
  58 enum register_file {
  59    BAD_FILE,
  60    ARF,
  61    GRF,
  62    MRF,
  63    IMM,
  64    FIXED_HW_REG, /* a struct brw_reg */
  65    UNIFORM, /* prog_data->params[reg] */
  66 };
  67
  68 class fs_reg {
  69 public:
  70    /* Callers of this ralloc-based new need not call delete. It's
  71     * easier to just ralloc_free 'ctx' (or any of its ancestors). */
  72    static void* operator new(size_t size, void *ctx)
  73    {
  74       void *node;
  75
  76       node = ralloc_size(ctx, size);
  77       assert(node != NULL);
  78
  79       return node;
  80    }
  81
  82    void init();
  83
  84    fs_reg();
  85    fs_reg(float f);
  86    fs_reg(int32_t i);
  87    fs_reg(uint32_t u);
  88    fs_reg(struct brw_reg fixed_hw_reg);
  89    fs_reg(enum register_file file, int reg);
  90    fs_reg(enum register_file file, int reg, uint32_t type);
  91    fs_reg(class fs_visitor *v, const struct glsl_type *type);
  92
  93    bool equals(const fs_reg &r) const;
  94    bool is_zero() const;
  95    bool is_one() const;
  96
  97    /** Register file: ARF, GRF, MRF, IMM. */
  98    enum register_file file;
  99    /**
 100     * Register number.  For ARF/MRF, it's the hardware register.  For
 101     * GRF, it's a virtual register number until register allocation
 102     */
 103    int reg;
 104    /**
 105     * For virtual registers, this is a hardware register offset from
 106     * the start of the register block (for example, a constant index
 107     * in an array access).
 108     */
 109    int reg_offset;
 110    /** Register type.  BRW_REGISTER_TYPE_* */
 111    int type;
 112    bool negate;
 113    bool abs;
 114    bool sechalf;
 115    struct brw_reg fixed_hw_reg;
 116    int smear; /* -1, or a channel of the reg to smear to all channels. */
 117
 118    /** Value for file == IMM */
 119    union {
 120       int32_t i;
 121       uint32_t u;
 122       float f;
 123    } imm;
 124
 125    fs_reg *reladdr;
 126 };
 127
 128 static const fs_reg reg_undef;
 129 static const fs_reg reg_null_f(ARF, BRW_ARF_NULL, BRW_REGISTER_TYPE_F);
 130 static const fs_reg reg_null_d(ARF, BRW_ARF_NULL, BRW_REGISTER_TYPE_D);
 131
 132 class ip_record : public exec_node {
 133 public:
 134    static void* operator new(size_t size, void *ctx)
 135    {
 136       void *node;
 137
 138       node = rzalloc_size(ctx, size);
 139       assert(node != NULL);
 140
 141       return node;
 142    }
 143
 144    ip_record(int ip)
 145    {
 146       this->ip = ip;
 147    }
 148
 149    int ip;
 150 };
 151
 152 class fs_inst : public backend_instruction {
 153 public:
 154    /* Callers of this ralloc-based new need not call delete. It's
 155     * easier to just ralloc_free 'ctx' (or any of its ancestors). */
 156    static void* operator new(size_t size, void *ctx)
 157    {
 158       void *node;
 159
 160       node = rzalloc_size(ctx, size);
 161       assert(node != NULL);
 162
 163       return node;
 164    }
 165
 166    void init();
 167
 168    fs_inst();
 169    fs_inst(enum opcode opcode);
 170    fs_inst(enum opcode opcode, fs_reg dst);
 171    fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0);
 172    fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
 173    fs_inst(enum opcode opcode, fs_reg dst,
 174            fs_reg src0, fs_reg src1,fs_reg src2);
 175
 176    bool equals(fs_inst *inst);
 177    int regs_written();
 178    bool overwrites_reg(const fs_reg &reg);
 179    bool is_tex();
 180    bool is_math();
 181    bool is_control_flow();
 182    bool is_send_from_grf();
 183
 184    fs_reg dst;
 185    fs_reg src[3];
 186    bool saturate;
 187    int conditional_mod; /**< BRW_CONDITIONAL_* */
 188
 189    /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional
 190     * mod and predication.
 191     */
 192    uint8_t flag_subreg;
 193
 194    int mlen; /**< SEND message length */
 195    int base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
 196    uint32_t texture_offset; /**< Texture offset bitfield */
 197    int sampler;
 198    int target; /**< MRT target. */
 199    bool eot;
 200    bool header_present;
 201    bool shadow_compare;
 202    bool force_uncompressed;
 203    bool force_sechalf;
 204    bool force_writemask_all;
 205    uint32_t offset; /* spill/unspill offset */
 206
 207    /** @{
 208     * Annotation for the generated IR.  One of the two can be set.
 209     */
 210    const void *ir;
 211    const char *annotation;
 212    /** @} */
 213 };
 214
 215 /**
 216  * The fragment shader front-end.
 217  *
 218  * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
 219  */
 220 class fs_visitor : public backend_visitor
 221 {
 222 public:
 223
 224    fs_visitor(struct brw_context *brw,
 225               struct brw_wm_compile *c,
 226               struct gl_shader_program *prog,
 227               struct gl_fragment_program *fp,
 228               unsigned dispatch_width);
 229    ~fs_visitor();
 230
 231    fs_reg *variable_storage(ir_variable *var);
 232    int virtual_grf_alloc(int size);
 233    void import_uniforms(fs_visitor *v);
 234
 235    void visit(ir_variable *ir);
 236    void visit(ir_assignment *ir);
 237    void visit(ir_dereference_variable *ir);
 238    void visit(ir_dereference_record *ir);
 239    void visit(ir_dereference_array *ir);
 240    void visit(ir_expression *ir);
 241    void visit(ir_texture *ir);
 242    void visit(ir_if *ir);
 243    void visit(ir_constant *ir);
 244    void visit(ir_swizzle *ir);
 245    void visit(ir_return *ir);
 246    void visit(ir_loop *ir);
 247    void visit(ir_loop_jump *ir);
 248    void visit(ir_discard *ir);
 249    void visit(ir_call *ir);
 250    void visit(ir_function *ir);
 251    void visit(ir_function_signature *ir);
 252
 253    void swizzle_result(ir_texture *ir, fs_reg orig_val, int sampler);
 254
 255    bool can_do_source_mods(fs_inst *inst);
 256
 257    fs_inst *emit(fs_inst inst);
 258    fs_inst *emit(fs_inst *inst);
 259    void emit(exec_list list);
 260
 261    fs_inst *emit(enum opcode opcode);
 262    fs_inst *emit(enum opcode opcode, fs_reg dst);
 263    fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0);
 264    fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
 265    fs_inst *emit(enum opcode opcode, fs_reg dst,
 266                  fs_reg src0, fs_reg src1, fs_reg src2);
 267
 268    fs_inst *MOV(fs_reg dst, fs_reg src);
 269    fs_inst *NOT(fs_reg dst, fs_reg src);
 270    fs_inst *RNDD(fs_reg dst, fs_reg src);
 271    fs_inst *RNDE(fs_reg dst, fs_reg src);
 272    fs_inst *RNDZ(fs_reg dst, fs_reg src);
 273    fs_inst *FRC(fs_reg dst, fs_reg src);
 274    fs_inst *ADD(fs_reg dst, fs_reg src0, fs_reg src1);
 275    fs_inst *MUL(fs_reg dst, fs_reg src0, fs_reg src1);
 276    fs_inst *MACH(fs_reg dst, fs_reg src0, fs_reg src1);
 277    fs_inst *MAC(fs_reg dst, fs_reg src0, fs_reg src1);
 278    fs_inst *SHL(fs_reg dst, fs_reg src0, fs_reg src1);
 279    fs_inst *SHR(fs_reg dst, fs_reg src0, fs_reg src1);
 280    fs_inst *ASR(fs_reg dst, fs_reg src0, fs_reg src1);
 281    fs_inst *AND(fs_reg dst, fs_reg src0, fs_reg src1);
 282    fs_inst *OR(fs_reg dst, fs_reg src0, fs_reg src1);
 283    fs_inst *XOR(fs_reg dst, fs_reg src0, fs_reg src1);
 284    fs_inst *IF(uint32_t predicate);
 285    fs_inst *IF(fs_reg src0, fs_reg src1, uint32_t condition);
 286    fs_inst *CMP(fs_reg dst, fs_reg src0, fs_reg src1,
 287                 uint32_t condition);
 288    fs_inst *DEP_RESOLVE_MOV(int grf);
 289
 290    int type_size(const struct glsl_type *type);
 291    fs_inst *get_instruction_generating_reg(fs_inst *start,
 292                                            fs_inst *end,
 293                                            fs_reg reg);
 294
 295    exec_list VARYING_PULL_CONSTANT_LOAD(fs_reg dst, fs_reg surf_index,
 296                                         fs_reg offset);
 297
 298    bool run();
 299    void setup_payload_gen4();
 300    void setup_payload_gen6();
 301    void assign_curb_setup();
 302    void calculate_urb_setup();
 303    void assign_urb_setup();
 304    bool assign_regs();
 305    void assign_regs_trivial();
 306    void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
 307                                    int first_payload_node);
 308    void setup_mrf_hack_interference(struct ra_graph *g,
 309                                     int first_mrf_hack_node);
 310    int choose_spill_reg(struct ra_graph *g);
 311    void spill_reg(int spill_reg);
 312    void split_virtual_grfs();
 313    void compact_virtual_grfs();
 314    void move_uniform_array_access_to_pull_constants();
 315    void setup_pull_constants();
 316    void calculate_live_intervals();
 317    bool opt_algebraic();
 318    bool opt_cse();
 319    bool opt_cse_local(bblock_t *block, exec_list *aeb);
 320    bool opt_copy_propagate();
 321    bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
 322    bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
 323    bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
 324                                  exec_list *acp);
 325    bool register_coalesce();
 326    bool register_coalesce_2();
 327    bool compute_to_mrf();
 328    bool dead_code_eliminate();
 329    bool remove_dead_constants();
 330    bool remove_duplicate_mrf_writes();
 331    bool virtual_grf_interferes(int a, int b);
 332    void schedule_instructions(bool post_reg_alloc);
 333    void insert_gen4_send_dependency_workarounds();
 334    void insert_gen4_pre_send_dependency_workarounds(fs_inst *inst);
 335    void insert_gen4_post_send_dependency_workarounds(fs_inst *inst);
 336    void fail(const char *msg, ...);
 337    void lower_uniform_pull_constant_loads();
 338
 339    void push_force_uncompressed();
 340    void pop_force_uncompressed();
 341    void push_force_sechalf();
 342    void pop_force_sechalf();
 343
 344    void emit_dummy_fs();
 345    fs_reg *emit_fragcoord_interpolation(ir_variable *ir);
 346    fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
 347                          glsl_interp_qualifier interpolation_mode,
 348                          bool is_centroid);
 349    fs_reg *emit_frontfacing_interpolation(ir_variable *ir);
 350    fs_reg *emit_general_interpolation(ir_variable *ir);
 351    void emit_interpolation_setup_gen4();
 352    void emit_interpolation_setup_gen6();
 353    fs_reg rescale_texcoord(ir_texture *ir, fs_reg coordinate,
 354                            bool is_rect, int sampler, int texunit);
 355    fs_inst *emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 356                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2);
 357    fs_inst *emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 358                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2);
 359    fs_inst *emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 360                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2);
 361    fs_reg fix_math_operand(fs_reg src);
 362    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0);
 363    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0, fs_reg src1);
 364    void emit_minmax(uint32_t conditionalmod, fs_reg dst,
 365                     fs_reg src0, fs_reg src1);
 366    bool try_emit_saturate(ir_expression *ir);
 367    bool try_emit_mad(ir_expression *ir, int mul_arg);
 368    void emit_bool_to_cond_code(ir_rvalue *condition);
 369    void emit_if_gen6(ir_if *ir);
 370    void emit_unspill(fs_inst *inst, fs_reg reg, uint32_t spill_offset);
 371
 372    void emit_fragment_program_code();
 373    void setup_fp_regs();
 374    fs_reg get_fp_src_reg(const prog_src_register *src);
 375    fs_reg get_fp_dst_reg(const prog_dst_register *dst);
 376    void emit_fp_alu1(enum opcode opcode,
 377                      const struct prog_instruction *fpi,
 378                      fs_reg dst, fs_reg src);
 379    void emit_fp_alu2(enum opcode opcode,
 380                      const struct prog_instruction *fpi,
 381                      fs_reg dst, fs_reg src0, fs_reg src1);
 382    void emit_fp_scalar_write(const struct prog_instruction *fpi,
 383                              fs_reg dst, fs_reg src);
 384    void emit_fp_scalar_math(enum opcode opcode,
 385                             const struct prog_instruction *fpi,
 386                             fs_reg dst, fs_reg src);
 387
 388    void emit_fp_minmax(const struct prog_instruction *fpi,
 389                        fs_reg dst, fs_reg src0, fs_reg src1);
 390
 391    void emit_fp_sop(uint32_t conditional_mod,
 392                     const struct prog_instruction *fpi,
 393                     fs_reg dst, fs_reg src0, fs_reg src1, fs_reg one);
 394
 395    void emit_color_write(int target, int index, int first_color_mrf);
 396    void emit_fb_writes();
 397
 398    void emit_shader_time_begin();
 399    void emit_shader_time_end();
 400    void emit_shader_time_write(enum shader_time_shader_type type,
 401                                fs_reg value);
 402
 403    bool try_rewrite_rhs_to_dst(ir_assignment *ir,
 404                                fs_reg dst,
 405                                fs_reg src,
 406                                fs_inst *pre_rhs_inst,
 407                                fs_inst *last_rhs_inst);
 408    void emit_assignment_writes(fs_reg &l, fs_reg &r,
 409                                const glsl_type *type, bool predicated);
 410    void resolve_ud_negate(fs_reg *reg);
 411    void resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg);
 412
 413    fs_reg get_timestamp();
 414
 415    struct brw_reg interp_reg(int location, int channel);
 416    void setup_uniform_values(ir_variable *ir);
 417    void setup_builtin_uniform_values(ir_variable *ir);
 418    int implied_mrf_writes(fs_inst *inst);
 419
 420    void dump_instructions();
 421    void dump_instruction(fs_inst *inst);
 422
 423    const struct gl_fragment_program *fp;
 424    struct brw_wm_compile *c;
 425    unsigned int sanity_param_count;
 426
 427    int param_size[MAX_UNIFORMS * 4];
 428
 429    int *virtual_grf_sizes;
 430    int virtual_grf_count;
 431    int virtual_grf_array_size;
 432    int *virtual_grf_def;
 433    int *virtual_grf_use;
 434    bool live_intervals_valid;
 435
 436    /* This is the map from UNIFORM hw_reg + reg_offset as generated by
 437     * the visitor to the packed uniform number after
 438     * remove_dead_constants() that represents the actual uploaded
 439     * uniform index.
 440     */
 441    int *params_remap;
 442
 443    struct hash_table *variable_ht;
 444    fs_reg frag_depth;
 445    fs_reg outputs[BRW_MAX_DRAW_BUFFERS];
 446    unsigned output_components[BRW_MAX_DRAW_BUFFERS];
 447    fs_reg dual_src_output;
 448    int first_non_payload_grf;
 449    /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
 450    int max_grf;
 451    int urb_setup[FRAG_ATTRIB_MAX];
 452
 453    fs_reg *fp_temp_regs;
 454    fs_reg *fp_input_regs;
 455
 456    /** @{ debug annotation info */
 457    const char *current_annotation;
 458    const void *base_ir;
 459    /** @} */
 460
 461    bool failed;
 462    char *fail_msg;
 463
 464    /* Result of last visit() method. */
 465    fs_reg result;
 466
 467    fs_reg pixel_x;
 468    fs_reg pixel_y;
 469    fs_reg wpos_w;
 470    fs_reg pixel_w;
 471    fs_reg delta_x[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 472    fs_reg delta_y[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 473    fs_reg shader_start_time;
 474
 475    int grf_used;
 476
 477    const unsigned dispatch_width; /**< 8 or 16 */
 478
 479    int force_uncompressed_stack;
 480    int force_sechalf_stack;
 481 };
 482
 483 /**
 484  * The fragment shader code generator.
 485  *
 486  * Translates FS IR to actual i965 assembly code.
 487  */
 488 class fs_generator
 489 {
 490 public:
 491    fs_generator(struct brw_context *brw,
 492                 struct brw_wm_compile *c,
 493                 struct gl_shader_program *prog,
 494                 struct gl_fragment_program *fp,
 495                 bool dual_source_output);
 496    ~fs_generator();
 497
 498    const unsigned *generate_assembly(exec_list *simd8_instructions,
 499                                      exec_list *simd16_instructions,
 500                                      unsigned *assembly_size);
 501
 502 private:
 503    void generate_code(exec_list *instructions);
 504    void generate_fb_write(fs_inst *inst);
 505    void generate_pixel_xy(struct brw_reg dst, bool is_x);
 506    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 507                          struct brw_reg *src);
 508    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 509    void generate_math1_gen7(fs_inst *inst,
 510                             struct brw_reg dst,
 511                             struct brw_reg src);
 512    void generate_math2_gen7(fs_inst *inst,
 513                             struct brw_reg dst,
 514                             struct brw_reg src0,
 515                             struct brw_reg src1);
 516    void generate_math1_gen6(fs_inst *inst,
 517                             struct brw_reg dst,
 518                             struct brw_reg src);
 519    void generate_math2_gen6(fs_inst *inst,
 520                             struct brw_reg dst,
 521                             struct brw_reg src0,
 522                             struct brw_reg src1);
 523    void generate_math_gen4(fs_inst *inst,
 524                            struct brw_reg dst,
 525                            struct brw_reg src);
 526    void generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 527    void generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 528                      bool negate_value);
 529    void generate_spill(fs_inst *inst, struct brw_reg src);
 530    void generate_unspill(fs_inst *inst, struct brw_reg dst);
 531    void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 532                                             struct brw_reg index,
 533                                             struct brw_reg offset);
 534    void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
 535                                                  struct brw_reg dst,
 536                                                  struct brw_reg surf_index,
 537                                                  struct brw_reg offset);
 538    void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 539                                             struct brw_reg index);
 540    void generate_varying_pull_constant_load_gen7(fs_inst *inst,
 541                                                  struct brw_reg dst,
 542                                                  struct brw_reg index,
 543                                                  struct brw_reg offset);
 544    void generate_mov_dispatch_to_flags(fs_inst *inst);
 545    void generate_set_global_offset(fs_inst *inst,
 546                                    struct brw_reg dst,
 547                                    struct brw_reg src,
 548                                    struct brw_reg offset);
 549    void generate_discard_jump(fs_inst *inst);
 550
 551    void generate_pack_half_2x16_split(fs_inst *inst,
 552                                       struct brw_reg dst,
 553                                       struct brw_reg x,
 554                                       struct brw_reg y);
 555    void generate_unpack_half_2x16_split(fs_inst *inst,
 556                                         struct brw_reg dst,
 557                                         struct brw_reg src);
 558
 559    void patch_discard_jumps_to_fb_writes();
 560
 561    struct brw_context *brw;
 562    struct intel_context *intel;
 563    struct gl_context *ctx;
 564
 565    struct brw_compile *p;
 566    struct brw_wm_compile *c;
 567
 568    struct gl_shader_program *prog;
 569    struct gl_shader *shader;
 570    const struct gl_fragment_program *fp;
 571
 572    unsigned dispatch_width; /**< 8 or 16 */
 573
 574    exec_list discard_halt_patches;
 575    bool dual_source_output;
 576    void *mem_ctx;
 577 };
 578
 579 bool brw_do_channel_expressions(struct exec_list *instructions);
 580 bool brw_do_vector_splitting(struct exec_list *instructions);
 581 bool brw_fs_precompile(struct gl_context *ctx, struct gl_shader_program *prog);