src/mesa/drivers/dri/i965/brw_fs.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #pragma once
  29
  30 #include "brw_shader.h"
  31
  32 extern "C" {
  33
  34 #include <sys/types.h>
  35
  36 #include "main/macros.h"
  37 #include "main/shaderobj.h"
  38 #include "main/uniforms.h"
  39 #include "program/prog_parameter.h"
  40 #include "program/prog_print.h"
  41 #include "program/prog_optimize.h"
  42 #include "program/register_allocate.h"
  43 #include "program/sampler.h"
  44 #include "program/hash_table.h"
  45 #include "brw_context.h"
  46 #include "brw_eu.h"
  47 #include "brw_wm.h"
  48 #include "brw_shader.h"
  49 }
  50 #include "glsl/glsl_types.h"
  51 #include "glsl/ir.h"
  52
  53 class bblock_t;
  54 namespace {
  55    struct acp_entry;
  56 }
  57
  58 namespace brw {
  59    class fs_live_variables;
  60 }
  61
  62 class fs_reg {
  63 public:
  64    DECLARE_RALLOC_CXX_OPERATORS(fs_reg)
  65
  66    void init();
  67
  68    fs_reg();
  69    fs_reg(float f);
  70    fs_reg(int32_t i);
  71    fs_reg(uint32_t u);
  72    fs_reg(struct brw_reg fixed_hw_reg);
  73    fs_reg(enum register_file file, int reg);
  74    fs_reg(enum register_file file, int reg, uint32_t type);
  75    fs_reg(class fs_visitor *v, const struct glsl_type *type);
  76
  77    bool equals(const fs_reg &r) const;
  78    bool is_zero() const;
  79    bool is_one() const;
  80    bool is_valid_3src() const;
  81    fs_reg retype(uint32_t type);
  82
  83    /** Register file: GRF, MRF, IMM. */
  84    enum register_file file;
  85    /**
  86     * Register number.  For MRF, it's the hardware register.  For
  87     * GRF, it's a virtual register number until register allocation
  88     */
  89    int reg;
  90    /**
  91     * Offset from the start of the contiguous register block.
  92     *
  93     * For pre-register-allocation GRFs, this is in units of a float per pixel
  94     * (1 hardware register for SIMD8 mode, or 2 registers for SIMD16 mode).
  95     * For uniforms, this is in units of 1 float.
  96     */
  97    int reg_offset;
  98    /** Register type.  BRW_REGISTER_TYPE_* */
  99    int type;
 100    bool negate;
 101    bool abs;
 102    bool sechalf;
 103    struct brw_reg fixed_hw_reg;
 104    int smear; /* -1, or a channel of the reg to smear to all channels. */
 105
 106    /** Value for file == IMM */
 107    union {
 108       int32_t i;
 109       uint32_t u;
 110       float f;
 111    } imm;
 112
 113    fs_reg *reladdr;
 114 };
 115
 116 static const fs_reg reg_undef;
 117 static const fs_reg reg_null_f(retype(brw_null_reg(), BRW_REGISTER_TYPE_F));
 118 static const fs_reg reg_null_d(retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
 119 static const fs_reg reg_null_ud(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD));
 120
 121 class ip_record : public exec_node {
 122 public:
 123    DECLARE_RALLOC_CXX_OPERATORS(ip_record)
 124
 125    ip_record(int ip)
 126    {
 127       this->ip = ip;
 128    }
 129
 130    int ip;
 131 };
 132
 133 class fs_inst : public backend_instruction {
 134 public:
 135    DECLARE_RALLOC_CXX_OPERATORS(fs_inst)
 136
 137    void init();
 138
 139    fs_inst();
 140    fs_inst(enum opcode opcode);
 141    fs_inst(enum opcode opcode, fs_reg dst);
 142    fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0);
 143    fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
 144    fs_inst(enum opcode opcode, fs_reg dst,
 145            fs_reg src0, fs_reg src1,fs_reg src2);
 146
 147    bool equals(fs_inst *inst);
 148    bool overwrites_reg(const fs_reg &reg);
 149    bool is_send_from_grf();
 150    bool is_partial_write();
 151    int regs_read(fs_visitor *v, int arg);
 152
 153    fs_reg dst;
 154    fs_reg src[3];
 155    bool saturate;
 156    int conditional_mod; /**< BRW_CONDITIONAL_* */
 157
 158    /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional
 159     * mod and predication.
 160     */
 161    uint8_t flag_subreg;
 162
 163    int mlen; /**< SEND message length */
 164    int regs_written; /**< Number of vgrfs written by a SEND message, or 1 */
 165    int base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
 166    uint32_t texture_offset; /**< Texture offset bitfield */
 167    int sampler;
 168    int target; /**< MRT target. */
 169    bool eot;
 170    bool header_present;
 171    bool shadow_compare;
 172    bool force_uncompressed;
 173    bool force_sechalf;
 174    bool force_writemask_all;
 175    uint32_t offset; /* spill/unspill offset */
 176
 177    /** @{
 178     * Annotation for the generated IR.  One of the two can be set.
 179     */
 180    const void *ir;
 181    const char *annotation;
 182    /** @} */
 183 };
 184
 185 /**
 186  * The fragment shader front-end.
 187  *
 188  * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
 189  */
 190 class fs_visitor : public backend_visitor
 191 {
 192 public:
 193
 194    fs_visitor(struct brw_context *brw,
 195               struct brw_wm_compile *c,
 196               struct gl_shader_program *shader_prog,
 197               struct gl_fragment_program *fp,
 198               unsigned dispatch_width);
 199    ~fs_visitor();
 200
 201    fs_reg *variable_storage(ir_variable *var);
 202    int virtual_grf_alloc(int size);
 203    void import_uniforms(fs_visitor *v);
 204
 205    void visit(ir_variable *ir);
 206    void visit(ir_assignment *ir);
 207    void visit(ir_dereference_variable *ir);
 208    void visit(ir_dereference_record *ir);
 209    void visit(ir_dereference_array *ir);
 210    void visit(ir_expression *ir);
 211    void visit(ir_texture *ir);
 212    void visit(ir_if *ir);
 213    void visit(ir_constant *ir);
 214    void visit(ir_swizzle *ir);
 215    void visit(ir_return *ir);
 216    void visit(ir_loop *ir);
 217    void visit(ir_loop_jump *ir);
 218    void visit(ir_discard *ir);
 219    void visit(ir_call *ir);
 220    void visit(ir_function *ir);
 221    void visit(ir_function_signature *ir);
 222    void visit(ir_emit_vertex *);
 223    void visit(ir_end_primitive *);
 224
 225    uint32_t gather_channel(ir_texture *ir, int sampler);
 226    void swizzle_result(ir_texture *ir, fs_reg orig_val, int sampler);
 227
 228    bool can_do_source_mods(fs_inst *inst);
 229
 230    fs_inst *emit(fs_inst inst);
 231    fs_inst *emit(fs_inst *inst);
 232    void emit(exec_list list);
 233
 234    fs_inst *emit(enum opcode opcode);
 235    fs_inst *emit(enum opcode opcode, fs_reg dst);
 236    fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0);
 237    fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
 238    fs_inst *emit(enum opcode opcode, fs_reg dst,
 239                  fs_reg src0, fs_reg src1, fs_reg src2);
 240
 241    fs_inst *MOV(fs_reg dst, fs_reg src);
 242    fs_inst *NOT(fs_reg dst, fs_reg src);
 243    fs_inst *RNDD(fs_reg dst, fs_reg src);
 244    fs_inst *RNDE(fs_reg dst, fs_reg src);
 245    fs_inst *RNDZ(fs_reg dst, fs_reg src);
 246    fs_inst *FRC(fs_reg dst, fs_reg src);
 247    fs_inst *ADD(fs_reg dst, fs_reg src0, fs_reg src1);
 248    fs_inst *MUL(fs_reg dst, fs_reg src0, fs_reg src1);
 249    fs_inst *MACH(fs_reg dst, fs_reg src0, fs_reg src1);
 250    fs_inst *MAC(fs_reg dst, fs_reg src0, fs_reg src1);
 251    fs_inst *SHL(fs_reg dst, fs_reg src0, fs_reg src1);
 252    fs_inst *SHR(fs_reg dst, fs_reg src0, fs_reg src1);
 253    fs_inst *ASR(fs_reg dst, fs_reg src0, fs_reg src1);
 254    fs_inst *AND(fs_reg dst, fs_reg src0, fs_reg src1);
 255    fs_inst *OR(fs_reg dst, fs_reg src0, fs_reg src1);
 256    fs_inst *XOR(fs_reg dst, fs_reg src0, fs_reg src1);
 257    fs_inst *IF(uint32_t predicate);
 258    fs_inst *IF(fs_reg src0, fs_reg src1, uint32_t condition);
 259    fs_inst *CMP(fs_reg dst, fs_reg src0, fs_reg src1,
 260                 uint32_t condition);
 261    fs_inst *LRP(fs_reg dst, fs_reg a, fs_reg y, fs_reg x);
 262    fs_inst *DEP_RESOLVE_MOV(int grf);
 263    fs_inst *BFREV(fs_reg dst, fs_reg value);
 264    fs_inst *BFE(fs_reg dst, fs_reg bits, fs_reg offset, fs_reg value);
 265    fs_inst *BFI1(fs_reg dst, fs_reg bits, fs_reg offset);
 266    fs_inst *BFI2(fs_reg dst, fs_reg bfi1_dst, fs_reg insert, fs_reg base);
 267    fs_inst *FBH(fs_reg dst, fs_reg value);
 268    fs_inst *FBL(fs_reg dst, fs_reg value);
 269    fs_inst *CBIT(fs_reg dst, fs_reg value);
 270    fs_inst *MAD(fs_reg dst, fs_reg c, fs_reg b, fs_reg a);
 271    fs_inst *ADDC(fs_reg dst, fs_reg src0, fs_reg src1);
 272    fs_inst *SUBB(fs_reg dst, fs_reg src0, fs_reg src1);
 273
 274    int type_size(const struct glsl_type *type);
 275    fs_inst *get_instruction_generating_reg(fs_inst *start,
 276                                            fs_inst *end,
 277                                            fs_reg reg);
 278
 279    exec_list VARYING_PULL_CONSTANT_LOAD(fs_reg dst, fs_reg surf_index,
 280                                         fs_reg varying_offset,
 281                                         uint32_t const_offset);
 282
 283    bool run();
 284    void assign_binding_table_offsets();
 285    void setup_payload_gen4();
 286    void setup_payload_gen6();
 287    void assign_curb_setup();
 288    void calculate_urb_setup();
 289    void assign_urb_setup();
 290    bool assign_regs();
 291    void assign_regs_trivial();
 292    void get_used_mrfs(bool *mrf_used);
 293    void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
 294                                    int first_payload_node);
 295    void setup_mrf_hack_interference(struct ra_graph *g,
 296                                     int first_mrf_hack_node);
 297    int choose_spill_reg(struct ra_graph *g);
 298    void spill_reg(int spill_reg);
 299    void split_virtual_grfs();
 300    void compact_virtual_grfs();
 301    void move_uniform_array_access_to_pull_constants();
 302    void setup_pull_constants();
 303    void invalidate_live_intervals();
 304    void calculate_live_intervals();
 305    bool opt_algebraic();
 306    bool opt_cse();
 307    bool opt_cse_local(bblock_t *block, exec_list *aeb);
 308    bool opt_copy_propagate();
 309    bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
 310    bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
 311    bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
 312                                  exec_list *acp);
 313    bool register_coalesce();
 314    bool register_coalesce_2();
 315    bool compute_to_mrf();
 316    bool dead_code_eliminate();
 317    bool dead_code_eliminate_local();
 318    bool remove_dead_constants();
 319    bool remove_duplicate_mrf_writes();
 320    bool virtual_grf_interferes(int a, int b);
 321    void schedule_instructions(bool post_reg_alloc);
 322    void insert_gen4_send_dependency_workarounds();
 323    void insert_gen4_pre_send_dependency_workarounds(fs_inst *inst);
 324    void insert_gen4_post_send_dependency_workarounds(fs_inst *inst);
 325    void fail(const char *msg, ...);
 326    void lower_uniform_pull_constant_loads();
 327
 328    void push_force_uncompressed();
 329    void pop_force_uncompressed();
 330    void push_force_sechalf();
 331    void pop_force_sechalf();
 332
 333    void emit_dummy_fs();
 334    fs_reg *emit_fragcoord_interpolation(ir_variable *ir);
 335    fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
 336                          glsl_interp_qualifier interpolation_mode,
 337                          bool is_centroid);
 338    fs_reg *emit_frontfacing_interpolation(ir_variable *ir);
 339    fs_reg *emit_general_interpolation(ir_variable *ir);
 340    void emit_interpolation_setup_gen4();
 341    void emit_interpolation_setup_gen6();
 342    fs_reg rescale_texcoord(ir_texture *ir, fs_reg coordinate,
 343                            bool is_rect, int sampler, int texunit);
 344    fs_inst *emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 345                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2);
 346    fs_inst *emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 347                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
 348                               fs_reg sample_index);
 349    fs_inst *emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 350                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
 351                               fs_reg sample_index);
 352    fs_reg fix_math_operand(fs_reg src);
 353    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0);
 354    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0, fs_reg src1);
 355    void emit_lrp(fs_reg dst, fs_reg x, fs_reg y, fs_reg a);
 356    void emit_minmax(uint32_t conditionalmod, fs_reg dst,
 357                     fs_reg src0, fs_reg src1);
 358    bool try_emit_saturate(ir_expression *ir);
 359    bool try_emit_mad(ir_expression *ir, int mul_arg);
 360    void try_replace_with_sel();
 361    void emit_bool_to_cond_code(ir_rvalue *condition);
 362    void emit_if_gen6(ir_if *ir);
 363    void emit_unspill(fs_inst *inst, fs_reg reg, uint32_t spill_offset,
 364                      int count);
 365
 366    void emit_fragment_program_code();
 367    void setup_fp_regs();
 368    fs_reg get_fp_src_reg(const prog_src_register *src);
 369    fs_reg get_fp_dst_reg(const prog_dst_register *dst);
 370    void emit_fp_alu1(enum opcode opcode,
 371                      const struct prog_instruction *fpi,
 372                      fs_reg dst, fs_reg src);
 373    void emit_fp_alu2(enum opcode opcode,
 374                      const struct prog_instruction *fpi,
 375                      fs_reg dst, fs_reg src0, fs_reg src1);
 376    void emit_fp_scalar_write(const struct prog_instruction *fpi,
 377                              fs_reg dst, fs_reg src);
 378    void emit_fp_scalar_math(enum opcode opcode,
 379                             const struct prog_instruction *fpi,
 380                             fs_reg dst, fs_reg src);
 381
 382    void emit_fp_minmax(const struct prog_instruction *fpi,
 383                        fs_reg dst, fs_reg src0, fs_reg src1);
 384
 385    void emit_fp_sop(uint32_t conditional_mod,
 386                     const struct prog_instruction *fpi,
 387                     fs_reg dst, fs_reg src0, fs_reg src1, fs_reg one);
 388
 389    void emit_color_write(int target, int index, int first_color_mrf);
 390    void emit_fb_writes();
 391
 392    void emit_shader_time_begin();
 393    void emit_shader_time_end();
 394    void emit_shader_time_write(enum shader_time_shader_type type,
 395                                fs_reg value);
 396
 397    bool try_rewrite_rhs_to_dst(ir_assignment *ir,
 398                                fs_reg dst,
 399                                fs_reg src,
 400                                fs_inst *pre_rhs_inst,
 401                                fs_inst *last_rhs_inst);
 402    void emit_assignment_writes(fs_reg &l, fs_reg &r,
 403                                const glsl_type *type, bool predicated);
 404    void resolve_ud_negate(fs_reg *reg);
 405    void resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg);
 406
 407    fs_reg get_timestamp();
 408
 409    struct brw_reg interp_reg(int location, int channel);
 410    void setup_uniform_values(ir_variable *ir);
 411    void setup_builtin_uniform_values(ir_variable *ir);
 412    int implied_mrf_writes(fs_inst *inst);
 413
 414    void dump_instruction(backend_instruction *inst);
 415
 416    struct gl_fragment_program *fp;
 417    struct brw_wm_compile *c;
 418    unsigned int sanity_param_count;
 419
 420    int param_size[MAX_UNIFORMS * 4];
 421
 422    int *virtual_grf_sizes;
 423    int virtual_grf_count;
 424    int virtual_grf_array_size;
 425    int *virtual_grf_start;
 426    int *virtual_grf_end;
 427    brw::fs_live_variables *live_intervals;
 428
 429    /* This is the map from UNIFORM hw_reg + reg_offset as generated by
 430     * the visitor to the packed uniform number after
 431     * remove_dead_constants() that represents the actual uploaded
 432     * uniform index.
 433     */
 434    int *params_remap;
 435    int nr_params_remap;
 436
 437    struct hash_table *variable_ht;
 438    fs_reg frag_depth;
 439    fs_reg outputs[BRW_MAX_DRAW_BUFFERS];
 440    unsigned output_components[BRW_MAX_DRAW_BUFFERS];
 441    fs_reg dual_src_output;
 442    int first_non_payload_grf;
 443    /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
 444    int max_grf;
 445
 446    fs_reg *fp_temp_regs;
 447    fs_reg *fp_input_regs;
 448
 449    /** @{ debug annotation info */
 450    const char *current_annotation;
 451    const void *base_ir;
 452    /** @} */
 453
 454    bool failed;
 455    char *fail_msg;
 456
 457    /* Result of last visit() method. */
 458    fs_reg result;
 459
 460    fs_reg pixel_x;
 461    fs_reg pixel_y;
 462    fs_reg wpos_w;
 463    fs_reg pixel_w;
 464    fs_reg delta_x[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 465    fs_reg delta_y[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 466    fs_reg shader_start_time;
 467
 468    int grf_used;
 469
 470    const unsigned dispatch_width; /**< 8 or 16 */
 471
 472    int force_uncompressed_stack;
 473    int force_sechalf_stack;
 474 };
 475
 476 /**
 477  * The fragment shader code generator.
 478  *
 479  * Translates FS IR to actual i965 assembly code.
 480  */
 481 class fs_generator
 482 {
 483 public:
 484    fs_generator(struct brw_context *brw,
 485                 struct brw_wm_compile *c,
 486                 struct gl_shader_program *prog,
 487                 struct gl_fragment_program *fp,
 488                 bool dual_source_output);
 489    ~fs_generator();
 490
 491    const unsigned *generate_assembly(exec_list *simd8_instructions,
 492                                      exec_list *simd16_instructions,
 493                                      unsigned *assembly_size);
 494
 495 private:
 496    void generate_code(exec_list *instructions);
 497    void generate_fb_write(fs_inst *inst);
 498    void generate_pixel_xy(struct brw_reg dst, bool is_x);
 499    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 500                          struct brw_reg *src);
 501    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 502    void generate_math1_gen7(fs_inst *inst,
 503                             struct brw_reg dst,
 504                             struct brw_reg src);
 505    void generate_math2_gen7(fs_inst *inst,
 506                             struct brw_reg dst,
 507                             struct brw_reg src0,
 508                             struct brw_reg src1);
 509    void generate_math1_gen6(fs_inst *inst,
 510                             struct brw_reg dst,
 511                             struct brw_reg src);
 512    void generate_math2_gen6(fs_inst *inst,
 513                             struct brw_reg dst,
 514                             struct brw_reg src0,
 515                             struct brw_reg src1);
 516    void generate_math_gen4(fs_inst *inst,
 517                            struct brw_reg dst,
 518                            struct brw_reg src);
 519    void generate_math_g45(fs_inst *inst,
 520                           struct brw_reg dst,
 521                           struct brw_reg src);
 522    void generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 523    void generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 524                      bool negate_value);
 525    void generate_spill(fs_inst *inst, struct brw_reg src);
 526    void generate_unspill(fs_inst *inst, struct brw_reg dst);
 527    void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 528                                             struct brw_reg index,
 529                                             struct brw_reg offset);
 530    void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
 531                                                  struct brw_reg dst,
 532                                                  struct brw_reg surf_index,
 533                                                  struct brw_reg offset);
 534    void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 535                                             struct brw_reg index,
 536                                             struct brw_reg offset);
 537    void generate_varying_pull_constant_load_gen7(fs_inst *inst,
 538                                                  struct brw_reg dst,
 539                                                  struct brw_reg index,
 540                                                  struct brw_reg offset);
 541    void generate_mov_dispatch_to_flags(fs_inst *inst);
 542    void generate_set_simd4x2_offset(fs_inst *inst,
 543                                     struct brw_reg dst,
 544                                     struct brw_reg offset);
 545    void generate_discard_jump(fs_inst *inst);
 546
 547    void generate_pack_half_2x16_split(fs_inst *inst,
 548                                       struct brw_reg dst,
 549                                       struct brw_reg x,
 550                                       struct brw_reg y);
 551    void generate_unpack_half_2x16_split(fs_inst *inst,
 552                                         struct brw_reg dst,
 553                                         struct brw_reg src);
 554
 555    void generate_shader_time_add(fs_inst *inst,
 556                                  struct brw_reg payload,
 557                                  struct brw_reg offset,
 558                                  struct brw_reg value);
 559
 560    void generate_untyped_atomic(fs_inst *inst,
 561                                 struct brw_reg dst,
 562                                 struct brw_reg atomic_op,
 563                                 struct brw_reg surf_index);
 564
 565    void generate_untyped_surface_read(fs_inst *inst,
 566                                       struct brw_reg dst,
 567                                       struct brw_reg surf_index);
 568
 569    void mark_surface_used(unsigned surf_index);
 570
 571    void patch_discard_jumps_to_fb_writes();
 572
 573    struct brw_context *brw;
 574    struct gl_context *ctx;
 575
 576    struct brw_compile *p;
 577    struct brw_wm_compile *c;
 578
 579    struct gl_shader_program *prog;
 580    struct gl_shader *shader;
 581    const struct gl_fragment_program *fp;
 582
 583    unsigned dispatch_width; /**< 8 or 16 */
 584
 585    exec_list discard_halt_patches;
 586    bool dual_source_output;
 587    void *mem_ctx;
 588 };
 589
 590 bool brw_do_channel_expressions(struct exec_list *instructions);
 591 bool brw_do_vector_splitting(struct exec_list *instructions);
 592 bool brw_fs_precompile(struct gl_context *ctx, struct gl_shader_program *prog);