src/mesa/drivers/dri/i965/brw_fs.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #pragma once
  29
  30 #include "brw_shader.h"
  31 #include "brw_ir_fs.h"
  32 #include "brw_fs_builder.h"
  33
  34 extern "C" {
  35
  36 #include <sys/types.h>
  37
  38 #include "main/macros.h"
  39 #include "main/shaderobj.h"
  40 #include "main/uniforms.h"
  41 #include "program/prog_parameter.h"
  42 #include "program/prog_print.h"
  43 #include "program/prog_optimize.h"
  44 #include "util/register_allocate.h"
  45 #include "program/hash_table.h"
  46 #include "brw_context.h"
  47 #include "brw_eu.h"
  48 #include "brw_wm.h"
  49 #include "intel_asm_annotation.h"
  50 }
  51 #include "glsl/glsl_types.h"
  52 #include "glsl/ir.h"
  53 #include "glsl/nir/nir.h"
  54 #include "program/sampler.h"
  55
  56 struct bblock_t;
  57 namespace {
  58    struct acp_entry;
  59 }
  60
  61 namespace brw {
  62    class fs_live_variables;
  63 }
  64
  65 /**
  66  * The fragment shader front-end.
  67  *
  68  * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
  69  */
  70 class fs_visitor : public backend_shader
  71 {
  72 public:
  73    const fs_reg reg_null_f;
  74    const fs_reg reg_null_d;
  75    const fs_reg reg_null_ud;
  76
  77    fs_visitor(struct brw_context *brw,
  78               void *mem_ctx,
  79               gl_shader_stage stage,
  80               const void *key,
  81               struct brw_stage_prog_data *prog_data,
  82               struct gl_shader_program *shader_prog,
  83               struct gl_program *prog,
  84               unsigned dispatch_width);
  85
  86    ~fs_visitor();
  87
  88    fs_reg vgrf(const glsl_type *const type);
  89    fs_reg vgrf(int num_components);
  90    void import_uniforms(fs_visitor *v);
  91    void setup_uniform_clipplane_values();
  92    void compute_clip_distance();
  93
  94    uint32_t gather_channel(int orig_chan, uint32_t sampler);
  95    void swizzle_result(ir_texture_opcode op, int dest_components,
  96                        fs_reg orig_val, uint32_t sampler);
  97
  98    fs_inst *emit(fs_inst *inst);
  99    void emit(exec_list list);
 100
 101    fs_inst *emit(enum opcode opcode);
 102    fs_inst *emit(enum opcode opcode, const fs_reg &dst);
 103    fs_inst *emit(enum opcode opcode, const fs_reg &dst, const fs_reg &src0);
 104    fs_inst *emit(enum opcode opcode, const fs_reg &dst, const fs_reg &src0,
 105                  const fs_reg &src1);
 106    fs_inst *emit(enum opcode opcode, const fs_reg &dst,
 107                  const fs_reg &src0, const fs_reg &src1, const fs_reg &src2);
 108    fs_inst *emit(enum opcode opcode, const fs_reg &dst,
 109                  fs_reg src[], int sources);
 110
 111    fs_inst *MOV(const fs_reg &dst, const fs_reg &src);
 112    fs_inst *NOT(const fs_reg &dst, const fs_reg &src);
 113    fs_inst *RNDD(const fs_reg &dst, const fs_reg &src);
 114    fs_inst *RNDE(const fs_reg &dst, const fs_reg &src);
 115    fs_inst *RNDZ(const fs_reg &dst, const fs_reg &src);
 116    fs_inst *FRC(const fs_reg &dst, const fs_reg &src);
 117    fs_inst *ADD(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 118    fs_inst *MUL(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 119    fs_inst *MACH(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 120    fs_inst *MAC(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 121    fs_inst *SHL(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 122    fs_inst *SHR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 123    fs_inst *ASR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 124    fs_inst *AND(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 125    fs_inst *OR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 126    fs_inst *XOR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 127    fs_inst *IF(enum brw_predicate predicate);
 128    fs_inst *IF(const fs_reg &src0, const fs_reg &src1,
 129                enum brw_conditional_mod condition);
 130    fs_inst *CMP(fs_reg dst, fs_reg src0, fs_reg src1,
 131                 enum brw_conditional_mod condition);
 132    fs_inst *LRP(const fs_reg &dst, const fs_reg &a, const fs_reg &y,
 133                 const fs_reg &x);
 134    fs_inst *BFREV(const fs_reg &dst, const fs_reg &value);
 135    fs_inst *BFE(const fs_reg &dst, const fs_reg &bits, const fs_reg &offset,
 136                 const fs_reg &value);
 137    fs_inst *BFI1(const fs_reg &dst, const fs_reg &bits, const fs_reg &offset);
 138    fs_inst *BFI2(const fs_reg &dst, const fs_reg &bfi1_dst,
 139                  const fs_reg &insert, const fs_reg &base);
 140    fs_inst *FBH(const fs_reg &dst, const fs_reg &value);
 141    fs_inst *FBL(const fs_reg &dst, const fs_reg &value);
 142    fs_inst *CBIT(const fs_reg &dst, const fs_reg &value);
 143    fs_inst *MAD(const fs_reg &dst, const fs_reg &c, const fs_reg &b,
 144                 const fs_reg &a);
 145    fs_inst *ADDC(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 146    fs_inst *SUBB(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 147    fs_inst *SEL(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 148
 149    int type_size(const struct glsl_type *type);
 150    fs_inst *get_instruction_generating_reg(fs_inst *start,
 151                                            fs_inst *end,
 152                                            const fs_reg &reg);
 153
 154    fs_inst *LOAD_PAYLOAD(const fs_reg &dst, fs_reg *src, int sources,
 155                          int header_size);
 156
 157    void VARYING_PULL_CONSTANT_LOAD(const brw::fs_builder &bld,
 158                                    const fs_reg &dst,
 159                                    const fs_reg &surf_index,
 160                                    const fs_reg &varying_offset,
 161                                    uint32_t const_offset);
 162    void DEP_RESOLVE_MOV(const brw::fs_builder &bld, int grf);
 163
 164    bool run_fs();
 165    bool run_vs();
 166    bool run_cs();
 167    void optimize();
 168    void allocate_registers();
 169    void assign_binding_table_offsets();
 170    void setup_payload_gen4();
 171    void setup_payload_gen6();
 172    void setup_vs_payload();
 173    void setup_cs_payload();
 174    void fixup_3src_null_dest();
 175    void assign_curb_setup();
 176    void calculate_urb_setup();
 177    void assign_urb_setup();
 178    void assign_vs_urb_setup();
 179    bool assign_regs(bool allow_spilling);
 180    void assign_regs_trivial();
 181    void get_used_mrfs(bool *mrf_used);
 182    void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
 183                                    int first_payload_node);
 184    void setup_mrf_hack_interference(struct ra_graph *g,
 185                                     int first_mrf_hack_node);
 186    int choose_spill_reg(struct ra_graph *g);
 187    void spill_reg(int spill_reg);
 188    void split_virtual_grfs();
 189    bool compact_virtual_grfs();
 190    void move_uniform_array_access_to_pull_constants();
 191    void assign_constant_locations();
 192    void demote_pull_constants();
 193    void invalidate_live_intervals();
 194    void calculate_live_intervals();
 195    void calculate_register_pressure();
 196    bool opt_algebraic();
 197    bool opt_redundant_discard_jumps();
 198    bool opt_cse();
 199    bool opt_cse_local(bblock_t *block);
 200    bool opt_copy_propagate();
 201    bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
 202    bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
 203    bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
 204                                  exec_list *acp);
 205    bool opt_register_renaming();
 206    bool register_coalesce();
 207    bool compute_to_mrf();
 208    bool eliminate_find_live_channel();
 209    bool dead_code_eliminate();
 210    bool remove_duplicate_mrf_writes();
 211
 212    bool opt_sampler_eot();
 213    bool virtual_grf_interferes(int a, int b);
 214    void schedule_instructions(instruction_scheduler_mode mode);
 215    void insert_gen4_send_dependency_workarounds();
 216    void insert_gen4_pre_send_dependency_workarounds(bblock_t *block,
 217                                                     fs_inst *inst);
 218    void insert_gen4_post_send_dependency_workarounds(bblock_t *block,
 219                                                      fs_inst *inst);
 220    void vfail(const char *msg, va_list args);
 221    void fail(const char *msg, ...);
 222    void no16(const char *msg, ...);
 223    void lower_uniform_pull_constant_loads();
 224    bool lower_load_payload();
 225    bool lower_integer_multiplication();
 226    bool opt_combine_constants();
 227
 228    void emit_dummy_fs();
 229    void emit_repclear_shader();
 230    fs_reg *emit_fragcoord_interpolation(bool pixel_center_integer,
 231                                         bool origin_upper_left);
 232    fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
 233                          glsl_interp_qualifier interpolation_mode,
 234                          bool is_centroid, bool is_sample);
 235    fs_reg *emit_frontfacing_interpolation();
 236    fs_reg *emit_samplepos_setup();
 237    fs_reg *emit_sampleid_setup();
 238    void emit_general_interpolation(fs_reg attr, const char *name,
 239                                    const glsl_type *type,
 240                                    glsl_interp_qualifier interpolation_mode,
 241                                    int location, bool mod_centroid,
 242                                    bool mod_sample);
 243    fs_reg *emit_vs_system_value(int location);
 244    void emit_interpolation_setup_gen4();
 245    void emit_interpolation_setup_gen6();
 246    void compute_sample_position(fs_reg dst, fs_reg int_sample_pos);
 247    fs_reg rescale_texcoord(fs_reg coordinate, int coord_components,
 248                            bool is_rect, uint32_t sampler, int texunit);
 249    fs_inst *emit_texture_gen4(ir_texture_opcode op, fs_reg dst,
 250                               fs_reg coordinate, int coord_components,
 251                               fs_reg shadow_comp,
 252                               fs_reg lod, fs_reg lod2, int grad_components,
 253                               uint32_t sampler);
 254    fs_inst *emit_texture_gen4_simd16(ir_texture_opcode op, fs_reg dst,
 255                                      fs_reg coordinate, int vector_elements,
 256                                      fs_reg shadow_c, fs_reg lod,
 257                                      uint32_t sampler);
 258    fs_inst *emit_texture_gen5(ir_texture_opcode op, fs_reg dst,
 259                               fs_reg coordinate, int coord_components,
 260                               fs_reg shadow_comp,
 261                               fs_reg lod, fs_reg lod2, int grad_components,
 262                               fs_reg sample_index, uint32_t sampler,
 263                               bool has_offset);
 264    fs_inst *emit_texture_gen7(ir_texture_opcode op, fs_reg dst,
 265                               fs_reg coordinate, int coord_components,
 266                               fs_reg shadow_comp,
 267                               fs_reg lod, fs_reg lod2, int grad_components,
 268                               fs_reg sample_index, fs_reg mcs, fs_reg sampler,
 269                               fs_reg offset_value);
 270    void emit_texture(ir_texture_opcode op,
 271                      const glsl_type *dest_type,
 272                      fs_reg coordinate, int components,
 273                      fs_reg shadow_c,
 274                      fs_reg lod, fs_reg dpdy, int grad_components,
 275                      fs_reg sample_index,
 276                      fs_reg offset,
 277                      fs_reg mcs,
 278                      int gather_component,
 279                      bool is_cube_array,
 280                      bool is_rect,
 281                      uint32_t sampler,
 282                      fs_reg sampler_reg,
 283                      int texunit);
 284    fs_reg emit_mcs_fetch(fs_reg coordinate, int components, fs_reg sampler);
 285    void emit_gen6_gather_wa(uint8_t wa, fs_reg dst);
 286    void resolve_source_modifiers(fs_reg *src);
 287    fs_reg fix_math_operand(fs_reg src);
 288    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0);
 289    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0, fs_reg src1);
 290    fs_inst *emit_lrp(const fs_reg &dst, const fs_reg &x, const fs_reg &y,
 291                      const fs_reg &a);
 292    void emit_discard_jump();
 293    /** Copy any live channel from \p src to the first channel of \p dst. */
 294    void emit_uniformize(const fs_reg &dst, const fs_reg &src);
 295    bool try_replace_with_sel();
 296    bool opt_peephole_sel();
 297    bool opt_peephole_predicated_break();
 298    bool opt_saturate_propagation();
 299    bool opt_cmod_propagation();
 300    bool opt_zero_samples();
 301    void emit_unspill(bblock_t *block, fs_inst *inst, fs_reg reg,
 302                      uint32_t spill_offset, int count);
 303    void emit_spill(bblock_t *block, fs_inst *inst, fs_reg reg,
 304                    uint32_t spill_offset, int count);
 305
 306    void emit_nir_code();
 307    void nir_setup_inputs(nir_shader *shader);
 308    void nir_setup_outputs(nir_shader *shader);
 309    void nir_setup_uniforms(nir_shader *shader);
 310    void nir_setup_uniform(nir_variable *var);
 311    void nir_setup_builtin_uniform(nir_variable *var);
 312    void nir_emit_system_values(nir_shader *shader);
 313    void nir_emit_impl(nir_function_impl *impl);
 314    void nir_emit_cf_list(exec_list *list);
 315    void nir_emit_if(nir_if *if_stmt);
 316    void nir_emit_loop(nir_loop *loop);
 317    void nir_emit_block(nir_block *block);
 318    void nir_emit_instr(nir_instr *instr);
 319    void nir_emit_alu(const brw::fs_builder &bld, nir_alu_instr *instr);
 320    void nir_emit_intrinsic(const brw::fs_builder &bld,
 321                            nir_intrinsic_instr *instr);
 322    void nir_emit_texture(const brw::fs_builder &bld,
 323                          nir_tex_instr *instr);
 324    void nir_emit_jump(const brw::fs_builder &bld,
 325                       nir_jump_instr *instr);
 326    fs_reg get_nir_src(nir_src src);
 327    fs_reg get_nir_dest(nir_dest dest);
 328    void emit_percomp(const brw::fs_builder &bld, const fs_inst &inst,
 329                      unsigned wr_mask);
 330
 331    bool optimize_frontfacing_ternary(nir_alu_instr *instr,
 332                                      const fs_reg &result);
 333
 334    void setup_color_payload(fs_reg *dst, fs_reg color, unsigned components,
 335                             unsigned exec_size, bool use_2nd_half);
 336    void emit_alpha_test();
 337    fs_inst *emit_single_fb_write(const brw::fs_builder &bld,
 338                                  fs_reg color1, fs_reg color2,
 339                                  fs_reg src0_alpha, unsigned components,
 340                                  unsigned exec_size, bool use_2nd_half = false);
 341    void emit_fb_writes();
 342    void emit_urb_writes();
 343    void emit_cs_terminate();
 344
 345    void emit_shader_time_begin();
 346    void emit_shader_time_end();
 347    void SHADER_TIME_ADD(const brw::fs_builder &bld,
 348                         enum shader_time_shader_type type, fs_reg value);
 349
 350    void emit_untyped_atomic(unsigned atomic_op, unsigned surf_index,
 351                             fs_reg dst, fs_reg offset, fs_reg src0,
 352                             fs_reg src1);
 353
 354    void emit_untyped_surface_read(unsigned surf_index, fs_reg dst,
 355                                   fs_reg offset);
 356
 357    void resolve_ud_negate(fs_reg *reg);
 358
 359    fs_reg get_timestamp(const brw::fs_builder &bld);
 360
 361    struct brw_reg interp_reg(int location, int channel);
 362    int implied_mrf_writes(fs_inst *inst);
 363
 364    virtual void dump_instructions();
 365    virtual void dump_instructions(const char *name);
 366    void dump_instruction(backend_instruction *inst);
 367    void dump_instruction(backend_instruction *inst, FILE *file);
 368
 369    const void *const key;
 370    const struct brw_sampler_prog_key_data *key_tex;
 371
 372    struct brw_stage_prog_data *prog_data;
 373    unsigned int sanity_param_count;
 374
 375    int *param_size;
 376
 377    int *virtual_grf_start;
 378    int *virtual_grf_end;
 379    brw::fs_live_variables *live_intervals;
 380
 381    int *regs_live_at_ip;
 382
 383    /** Number of uniform variable components visited. */
 384    unsigned uniforms;
 385
 386    /** Total number of direct uniforms we can get from NIR */
 387    unsigned num_direct_uniforms;
 388
 389    /** Byte-offset for the next available spot in the scratch space buffer. */
 390    unsigned last_scratch;
 391
 392    /**
 393     * Array mapping UNIFORM register numbers to the pull parameter index,
 394     * or -1 if this uniform register isn't being uploaded as a pull constant.
 395     */
 396    int *pull_constant_loc;
 397
 398    /**
 399     * Array mapping UNIFORM register numbers to the push parameter index,
 400     * or -1 if this uniform register isn't being uploaded as a push constant.
 401     */
 402    int *push_constant_loc;
 403
 404    fs_reg frag_depth;
 405    fs_reg sample_mask;
 406    fs_reg outputs[VARYING_SLOT_MAX];
 407    unsigned output_components[VARYING_SLOT_MAX];
 408    fs_reg dual_src_output;
 409    bool do_dual_src;
 410    int first_non_payload_grf;
 411    /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
 412    unsigned max_grf;
 413
 414    fs_reg *nir_locals;
 415    fs_reg *nir_globals;
 416    fs_reg nir_inputs;
 417    fs_reg nir_outputs;
 418    fs_reg *nir_system_values;
 419
 420    /** @{ debug annotation info */
 421    const char *current_annotation;
 422    const void *base_ir;
 423    /** @} */
 424
 425    bool failed;
 426    char *fail_msg;
 427    bool simd16_unsupported;
 428    char *no16_msg;
 429
 430    /* Result of last visit() method. Still used by emit_texture() */
 431    fs_reg result;
 432
 433    /** Register numbers for thread payload fields. */
 434    struct {
 435       uint8_t source_depth_reg;
 436       uint8_t source_w_reg;
 437       uint8_t aa_dest_stencil_reg;
 438       uint8_t dest_depth_reg;
 439       uint8_t sample_pos_reg;
 440       uint8_t sample_mask_in_reg;
 441       uint8_t barycentric_coord_reg[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 442
 443       /** The number of thread payload registers the hardware will supply. */
 444       uint8_t num_regs;
 445    } payload;
 446
 447    bool source_depth_to_render_target;
 448    bool runtime_check_aads_emit;
 449
 450    fs_reg pixel_x;
 451    fs_reg pixel_y;
 452    fs_reg wpos_w;
 453    fs_reg pixel_w;
 454    fs_reg delta_xy[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 455    fs_reg shader_start_time;
 456    fs_reg userplane[MAX_CLIP_PLANES];
 457
 458    unsigned grf_used;
 459    bool spilled_any_registers;
 460
 461    const unsigned dispatch_width; /**< 8 or 16 */
 462
 463    unsigned promoted_constants;
 464    brw::fs_builder bld;
 465 };
 466
 467 /**
 468  * The fragment shader code generator.
 469  *
 470  * Translates FS IR to actual i965 assembly code.
 471  */
 472 class fs_generator
 473 {
 474 public:
 475    fs_generator(struct brw_context *brw,
 476                 void *mem_ctx,
 477                 const void *key,
 478                 struct brw_stage_prog_data *prog_data,
 479                 struct gl_program *fp,
 480                 unsigned promoted_constants,
 481                 bool runtime_check_aads_emit,
 482                 const char *stage_abbrev);
 483    ~fs_generator();
 484
 485    void enable_debug(const char *shader_name);
 486    int generate_code(const cfg_t *cfg, int dispatch_width);
 487    const unsigned *get_assembly(unsigned int *assembly_size);
 488
 489 private:
 490    void fire_fb_write(fs_inst *inst,
 491                       struct brw_reg payload,
 492                       struct brw_reg implied_header,
 493                       GLuint nr);
 494    void generate_fb_write(fs_inst *inst, struct brw_reg payload);
 495    void generate_urb_write(fs_inst *inst, struct brw_reg payload);
 496    void generate_cs_terminate(fs_inst *inst, struct brw_reg payload);
 497    void generate_blorp_fb_write(fs_inst *inst);
 498    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 499                          struct brw_reg *src);
 500    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 501                      struct brw_reg sampler_index);
 502    void generate_math_gen6(fs_inst *inst,
 503                            struct brw_reg dst,
 504                            struct brw_reg src0,
 505                            struct brw_reg src1);
 506    void generate_math_gen4(fs_inst *inst,
 507                            struct brw_reg dst,
 508                            struct brw_reg src);
 509    void generate_math_g45(fs_inst *inst,
 510                           struct brw_reg dst,
 511                           struct brw_reg src);
 512    void generate_ddx(enum opcode op, struct brw_reg dst, struct brw_reg src);
 513    void generate_ddy(enum opcode op, struct brw_reg dst, struct brw_reg src,
 514                      bool negate_value);
 515    void generate_scratch_write(fs_inst *inst, struct brw_reg src);
 516    void generate_scratch_read(fs_inst *inst, struct brw_reg dst);
 517    void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst);
 518    void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 519                                             struct brw_reg index,
 520                                             struct brw_reg offset);
 521    void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
 522                                                  struct brw_reg dst,
 523                                                  struct brw_reg surf_index,
 524                                                  struct brw_reg offset);
 525    void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 526                                             struct brw_reg index,
 527                                             struct brw_reg offset);
 528    void generate_varying_pull_constant_load_gen7(fs_inst *inst,
 529                                                  struct brw_reg dst,
 530                                                  struct brw_reg index,
 531                                                  struct brw_reg offset);
 532    void generate_mov_dispatch_to_flags(fs_inst *inst);
 533
 534    void generate_pixel_interpolator_query(fs_inst *inst,
 535                                           struct brw_reg dst,
 536                                           struct brw_reg src,
 537                                           struct brw_reg msg_data,
 538                                           unsigned msg_type);
 539
 540    void generate_set_omask(fs_inst *inst,
 541                            struct brw_reg dst,
 542                            struct brw_reg sample_mask);
 543
 544    void generate_set_sample_id(fs_inst *inst,
 545                                struct brw_reg dst,
 546                                struct brw_reg src0,
 547                                struct brw_reg src1);
 548
 549    void generate_set_simd4x2_offset(fs_inst *inst,
 550                                     struct brw_reg dst,
 551                                     struct brw_reg offset);
 552    void generate_discard_jump(fs_inst *inst);
 553
 554    void generate_pack_half_2x16_split(fs_inst *inst,
 555                                       struct brw_reg dst,
 556                                       struct brw_reg x,
 557                                       struct brw_reg y);
 558    void generate_unpack_half_2x16_split(fs_inst *inst,
 559                                         struct brw_reg dst,
 560                                         struct brw_reg src);
 561
 562    void generate_shader_time_add(fs_inst *inst,
 563                                  struct brw_reg payload,
 564                                  struct brw_reg offset,
 565                                  struct brw_reg value);
 566
 567    bool patch_discard_jumps_to_fb_writes();
 568
 569    struct brw_context *brw;
 570    const struct brw_device_info *devinfo;
 571
 572    struct brw_codegen *p;
 573    const void * const key;
 574    struct brw_stage_prog_data * const prog_data;
 575
 576    const struct gl_program *prog;
 577
 578    unsigned dispatch_width; /**< 8 or 16 */
 579
 580    exec_list discard_halt_patches;
 581    unsigned promoted_constants;
 582    bool runtime_check_aads_emit;
 583    bool debug_flag;
 584    const char *shader_name;
 585    const char *stage_abbrev;
 586    void *mem_ctx;
 587 };
 588
 589 bool brw_do_channel_expressions(struct exec_list *instructions);
 590 bool brw_do_vector_splitting(struct exec_list *instructions);
 591 void brw_setup_tex_for_precompile(struct brw_context *brw,
 592                                   struct brw_sampler_prog_key_data *tex,
 593                                   struct gl_program *prog);