src/mesa/drivers/dri/i965/brw_fs.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #pragma once
  29
  30 #include "brw_shader.h"
  31 #include "brw_ir_fs.h"
  32
  33 extern "C" {
  34
  35 #include <sys/types.h>
  36
  37 #include "main/macros.h"
  38 #include "main/shaderobj.h"
  39 #include "main/uniforms.h"
  40 #include "program/prog_parameter.h"
  41 #include "program/prog_print.h"
  42 #include "program/prog_optimize.h"
  43 #include "util/register_allocate.h"
  44 #include "program/hash_table.h"
  45 #include "brw_context.h"
  46 #include "brw_eu.h"
  47 #include "brw_wm.h"
  48 #include "intel_asm_annotation.h"
  49 }
  50 #include "glsl/glsl_types.h"
  51 #include "glsl/ir.h"
  52 #include "glsl/nir/nir.h"
  53 #include "program/sampler.h"
  54
  55 #define MAX_SAMPLER_MESSAGE_SIZE 11
  56 #define MAX_VGRF_SIZE 16
  57
  58 struct bblock_t;
  59 namespace {
  60    struct acp_entry;
  61 }
  62
  63 namespace brw {
  64    class fs_live_variables;
  65 }
  66
  67 /**
  68  * The fragment shader front-end.
  69  *
  70  * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
  71  */
  72 class fs_visitor : public backend_visitor
  73 {
  74 public:
  75    const fs_reg reg_null_f;
  76    const fs_reg reg_null_d;
  77    const fs_reg reg_null_ud;
  78
  79    fs_visitor(struct brw_context *brw,
  80               void *mem_ctx,
  81               const struct brw_wm_prog_key *key,
  82               struct brw_wm_prog_data *prog_data,
  83               struct gl_shader_program *shader_prog,
  84               struct gl_fragment_program *fp,
  85               unsigned dispatch_width);
  86
  87    fs_visitor(struct brw_context *brw,
  88               void *mem_ctx,
  89               const struct brw_vs_prog_key *key,
  90               struct brw_vs_prog_data *prog_data,
  91               struct gl_shader_program *shader_prog,
  92               struct gl_vertex_program *cp,
  93               unsigned dispatch_width);
  94
  95    ~fs_visitor();
  96    void init();
  97
  98    fs_reg *variable_storage(ir_variable *var);
  99    fs_reg vgrf(const glsl_type *const type);
 100    fs_reg vgrf(int num_components);
 101    void import_uniforms(fs_visitor *v);
 102    void setup_uniform_clipplane_values();
 103    void compute_clip_distance();
 104
 105    void visit(ir_variable *ir);
 106    void visit(ir_assignment *ir);
 107    void visit(ir_dereference_variable *ir);
 108    void visit(ir_dereference_record *ir);
 109    void visit(ir_dereference_array *ir);
 110    void visit(ir_expression *ir);
 111    void visit(ir_texture *ir);
 112    void visit(ir_if *ir);
 113    void visit(ir_constant *ir);
 114    void visit(ir_swizzle *ir);
 115    void visit(ir_return *ir);
 116    void visit(ir_loop *ir);
 117    void visit(ir_loop_jump *ir);
 118    void visit(ir_discard *ir);
 119    void visit(ir_call *ir);
 120    void visit(ir_function *ir);
 121    void visit(ir_function_signature *ir);
 122    void visit(ir_emit_vertex *);
 123    void visit(ir_end_primitive *);
 124
 125    uint32_t gather_channel(int orig_chan, uint32_t sampler);
 126    void swizzle_result(ir_texture_opcode op, int dest_components,
 127                        fs_reg orig_val, uint32_t sampler);
 128
 129    fs_inst *emit(fs_inst *inst);
 130    void emit(exec_list list);
 131
 132    fs_inst *emit(enum opcode opcode);
 133    fs_inst *emit(enum opcode opcode, const fs_reg &dst);
 134    fs_inst *emit(enum opcode opcode, const fs_reg &dst, const fs_reg &src0);
 135    fs_inst *emit(enum opcode opcode, const fs_reg &dst, const fs_reg &src0,
 136                  const fs_reg &src1);
 137    fs_inst *emit(enum opcode opcode, const fs_reg &dst,
 138                  const fs_reg &src0, const fs_reg &src1, const fs_reg &src2);
 139    fs_inst *emit(enum opcode opcode, const fs_reg &dst,
 140                  fs_reg src[], int sources);
 141
 142    fs_inst *MOV(const fs_reg &dst, const fs_reg &src);
 143    fs_inst *NOT(const fs_reg &dst, const fs_reg &src);
 144    fs_inst *RNDD(const fs_reg &dst, const fs_reg &src);
 145    fs_inst *RNDE(const fs_reg &dst, const fs_reg &src);
 146    fs_inst *RNDZ(const fs_reg &dst, const fs_reg &src);
 147    fs_inst *FRC(const fs_reg &dst, const fs_reg &src);
 148    fs_inst *ADD(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 149    fs_inst *MUL(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 150    fs_inst *MACH(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 151    fs_inst *MAC(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 152    fs_inst *SHL(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 153    fs_inst *SHR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 154    fs_inst *ASR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 155    fs_inst *AND(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 156    fs_inst *OR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 157    fs_inst *XOR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 158    fs_inst *IF(enum brw_predicate predicate);
 159    fs_inst *IF(const fs_reg &src0, const fs_reg &src1,
 160                enum brw_conditional_mod condition);
 161    fs_inst *CMP(fs_reg dst, fs_reg src0, fs_reg src1,
 162                 enum brw_conditional_mod condition);
 163    fs_inst *LRP(const fs_reg &dst, const fs_reg &a, const fs_reg &y,
 164                 const fs_reg &x);
 165    fs_inst *DEP_RESOLVE_MOV(int grf);
 166    fs_inst *BFREV(const fs_reg &dst, const fs_reg &value);
 167    fs_inst *BFE(const fs_reg &dst, const fs_reg &bits, const fs_reg &offset,
 168                 const fs_reg &value);
 169    fs_inst *BFI1(const fs_reg &dst, const fs_reg &bits, const fs_reg &offset);
 170    fs_inst *BFI2(const fs_reg &dst, const fs_reg &bfi1_dst,
 171                  const fs_reg &insert, const fs_reg &base);
 172    fs_inst *FBH(const fs_reg &dst, const fs_reg &value);
 173    fs_inst *FBL(const fs_reg &dst, const fs_reg &value);
 174    fs_inst *CBIT(const fs_reg &dst, const fs_reg &value);
 175    fs_inst *MAD(const fs_reg &dst, const fs_reg &c, const fs_reg &b,
 176                 const fs_reg &a);
 177    fs_inst *ADDC(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 178    fs_inst *SUBB(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 179    fs_inst *SEL(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 180
 181    int type_size(const struct glsl_type *type);
 182    fs_inst *get_instruction_generating_reg(fs_inst *start,
 183                                            fs_inst *end,
 184                                            const fs_reg &reg);
 185
 186    fs_inst *LOAD_PAYLOAD(const fs_reg &dst, fs_reg *src, int sources);
 187
 188    exec_list VARYING_PULL_CONSTANT_LOAD(const fs_reg &dst,
 189                                         const fs_reg &surf_index,
 190                                         const fs_reg &varying_offset,
 191                                         uint32_t const_offset);
 192
 193    bool run_fs();
 194    bool run_vs();
 195    void optimize();
 196    void allocate_registers();
 197    void assign_binding_table_offsets();
 198    void setup_payload_gen4();
 199    void setup_payload_gen6();
 200    void setup_vs_payload();
 201    void fixup_3src_null_dest();
 202    void assign_curb_setup();
 203    void calculate_urb_setup();
 204    void assign_urb_setup();
 205    void assign_vs_urb_setup();
 206    bool assign_regs(bool allow_spilling);
 207    void assign_regs_trivial();
 208    void get_used_mrfs(bool *mrf_used);
 209    void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
 210                                    int first_payload_node);
 211    void setup_mrf_hack_interference(struct ra_graph *g,
 212                                     int first_mrf_hack_node);
 213    int choose_spill_reg(struct ra_graph *g);
 214    void spill_reg(int spill_reg);
 215    void split_virtual_grfs();
 216    bool compact_virtual_grfs();
 217    void move_uniform_array_access_to_pull_constants();
 218    void assign_constant_locations();
 219    void demote_pull_constants();
 220    void invalidate_live_intervals();
 221    void calculate_live_intervals();
 222    void calculate_register_pressure();
 223    bool opt_algebraic();
 224    bool opt_cse();
 225    bool opt_cse_local(bblock_t *block);
 226    bool opt_copy_propagate();
 227    bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
 228    bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
 229    bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
 230                                  exec_list *acp);
 231    bool opt_register_renaming();
 232    bool register_coalesce();
 233    bool compute_to_mrf();
 234    bool dead_code_eliminate();
 235    bool remove_duplicate_mrf_writes();
 236    bool virtual_grf_interferes(int a, int b);
 237    void schedule_instructions(instruction_scheduler_mode mode);
 238    void insert_gen4_send_dependency_workarounds();
 239    void insert_gen4_pre_send_dependency_workarounds(bblock_t *block,
 240                                                     fs_inst *inst);
 241    void insert_gen4_post_send_dependency_workarounds(bblock_t *block,
 242                                                      fs_inst *inst);
 243    void vfail(const char *msg, va_list args);
 244    void fail(const char *msg, ...);
 245    void no16(const char *msg, ...);
 246    void lower_uniform_pull_constant_loads();
 247    bool lower_load_payload();
 248
 249    void emit_dummy_fs();
 250    void emit_repclear_shader();
 251    fs_reg *emit_fragcoord_interpolation(bool pixel_center_integer,
 252                                         bool origin_upper_left);
 253    fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
 254                          glsl_interp_qualifier interpolation_mode,
 255                          bool is_centroid, bool is_sample);
 256    fs_reg *emit_frontfacing_interpolation();
 257    fs_reg *emit_samplepos_setup();
 258    fs_reg *emit_sampleid_setup();
 259    void emit_general_interpolation(fs_reg attr, const char *name,
 260                                    const glsl_type *type,
 261                                    glsl_interp_qualifier interpolation_mode,
 262                                    int location, bool mod_centroid,
 263                                    bool mod_sample);
 264    fs_reg *emit_vs_system_value(enum brw_reg_type type, int location);
 265    void emit_interpolation_setup_gen4();
 266    void emit_interpolation_setup_gen6();
 267    void compute_sample_position(fs_reg dst, fs_reg int_sample_pos);
 268    fs_reg rescale_texcoord(fs_reg coordinate, int coord_components,
 269                            bool is_rect, uint32_t sampler, int texunit);
 270    fs_inst *emit_texture_gen4(ir_texture_opcode op, fs_reg dst,
 271                               fs_reg coordinate, int coord_components,
 272                               fs_reg shadow_comp,
 273                               fs_reg lod, fs_reg lod2, int grad_components,
 274                               uint32_t sampler);
 275    fs_inst *emit_texture_gen5(ir_texture_opcode op, fs_reg dst,
 276                               fs_reg coordinate, int coord_components,
 277                               fs_reg shadow_comp,
 278                               fs_reg lod, fs_reg lod2, int grad_components,
 279                               fs_reg sample_index, uint32_t sampler,
 280                               bool has_offset);
 281    fs_inst *emit_texture_gen7(ir_texture_opcode op, fs_reg dst,
 282                               fs_reg coordinate, int coord_components,
 283                               fs_reg shadow_comp,
 284                               fs_reg lod, fs_reg lod2, int grad_components,
 285                               fs_reg sample_index, fs_reg mcs, fs_reg sampler,
 286                               fs_reg offset_value);
 287    void emit_texture(ir_texture_opcode op,
 288                      const glsl_type *dest_type,
 289                      fs_reg coordinate, int components,
 290                      fs_reg shadow_c,
 291                      fs_reg lod, fs_reg dpdy, int grad_components,
 292                      fs_reg sample_index,
 293                      fs_reg offset, unsigned offset_components,
 294                      fs_reg mcs,
 295                      int gather_component,
 296                      bool is_cube_array,
 297                      bool is_rect,
 298                      uint32_t sampler,
 299                      fs_reg sampler_reg,
 300                      int texunit);
 301    fs_reg emit_mcs_fetch(fs_reg coordinate, int components, fs_reg sampler);
 302    void emit_gen6_gather_wa(uint8_t wa, fs_reg dst);
 303    fs_reg fix_math_operand(fs_reg src);
 304    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0);
 305    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0, fs_reg src1);
 306    void emit_lrp(const fs_reg &dst, const fs_reg &x, const fs_reg &y,
 307                  const fs_reg &a);
 308    void emit_minmax(enum brw_conditional_mod conditionalmod, const fs_reg &dst,
 309                     const fs_reg &src0, const fs_reg &src1);
 310    bool try_emit_saturate(ir_expression *ir);
 311    bool try_emit_line(ir_expression *ir);
 312    bool try_emit_mad(ir_expression *ir);
 313    bool try_replace_with_sel();
 314    bool opt_peephole_sel();
 315    bool opt_peephole_predicated_break();
 316    bool opt_saturate_propagation();
 317    bool opt_cmod_propagation();
 318    void emit_bool_to_cond_code(ir_rvalue *condition);
 319    void emit_if_gen6(ir_if *ir);
 320    void emit_unspill(bblock_t *block, fs_inst *inst, fs_reg reg,
 321                      uint32_t spill_offset, int count);
 322    void emit_spill(bblock_t *block, fs_inst *inst, fs_reg reg,
 323                    uint32_t spill_offset, int count);
 324
 325    void emit_fragment_program_code();
 326    void setup_fp_regs();
 327    fs_reg get_fp_src_reg(const prog_src_register *src);
 328    fs_reg get_fp_dst_reg(const prog_dst_register *dst);
 329    void emit_fp_alu1(enum opcode opcode,
 330                      const struct prog_instruction *fpi,
 331                      fs_reg dst, fs_reg src);
 332    void emit_fp_alu2(enum opcode opcode,
 333                      const struct prog_instruction *fpi,
 334                      fs_reg dst, fs_reg src0, fs_reg src1);
 335    void emit_fp_scalar_write(const struct prog_instruction *fpi,
 336                              fs_reg dst, fs_reg src);
 337    void emit_fp_scalar_math(enum opcode opcode,
 338                             const struct prog_instruction *fpi,
 339                             fs_reg dst, fs_reg src);
 340
 341    void emit_fp_minmax(const struct prog_instruction *fpi,
 342                        fs_reg dst, fs_reg src0, fs_reg src1);
 343
 344    void emit_fp_sop(enum brw_conditional_mod conditional_mod,
 345                     const struct prog_instruction *fpi,
 346                     fs_reg dst, fs_reg src0, fs_reg src1, fs_reg one);
 347
 348    void emit_nir_code();
 349    void nir_setup_inputs(nir_shader *shader);
 350    void nir_setup_outputs(nir_shader *shader);
 351    void nir_setup_uniforms(nir_shader *shader);
 352    void nir_setup_uniform(nir_variable *var);
 353    void nir_setup_builtin_uniform(nir_variable *var);
 354    void nir_emit_system_values(nir_shader *shader);
 355    void nir_emit_impl(nir_function_impl *impl);
 356    void nir_emit_cf_list(exec_list *list);
 357    void nir_emit_if(nir_if *if_stmt);
 358    void nir_emit_loop(nir_loop *loop);
 359    void nir_emit_block(nir_block *block);
 360    void nir_emit_instr(nir_instr *instr);
 361    void nir_emit_alu(nir_alu_instr *instr);
 362    void nir_emit_intrinsic(nir_intrinsic_instr *instr);
 363    void nir_emit_texture(nir_tex_instr *instr);
 364    void nir_emit_jump(nir_jump_instr *instr);
 365    fs_reg get_nir_src(nir_src src);
 366    fs_reg get_nir_dest(nir_dest dest);
 367    void emit_percomp(fs_inst *inst, unsigned wr_mask);
 368
 369    int setup_color_payload(fs_reg *dst, fs_reg color, unsigned components);
 370    void emit_alpha_test();
 371    fs_inst *emit_single_fb_write(fs_reg color1, fs_reg color2,
 372                                  fs_reg src0_alpha, unsigned components);
 373    void emit_fb_writes();
 374    void emit_urb_writes();
 375
 376    void emit_shader_time_begin();
 377    void emit_shader_time_end();
 378    void emit_shader_time_write(enum shader_time_shader_type type,
 379                                fs_reg value);
 380
 381    void emit_untyped_atomic(unsigned atomic_op, unsigned surf_index,
 382                             fs_reg dst, fs_reg offset, fs_reg src0,
 383                             fs_reg src1);
 384
 385    void emit_untyped_surface_read(unsigned surf_index, fs_reg dst,
 386                                   fs_reg offset);
 387
 388    void emit_interpolate_expression(ir_expression *ir);
 389
 390    bool try_rewrite_rhs_to_dst(ir_assignment *ir,
 391                                fs_reg dst,
 392                                fs_reg src,
 393                                fs_inst *pre_rhs_inst,
 394                                fs_inst *last_rhs_inst);
 395    void emit_assignment_writes(fs_reg &l, fs_reg &r,
 396                                const glsl_type *type, bool predicated);
 397    void resolve_ud_negate(fs_reg *reg);
 398    void resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg);
 399
 400    fs_reg get_timestamp();
 401
 402    struct brw_reg interp_reg(int location, int channel);
 403    void setup_uniform_values(ir_variable *ir);
 404    void setup_builtin_uniform_values(ir_variable *ir);
 405    int implied_mrf_writes(fs_inst *inst);
 406
 407    virtual void dump_instructions();
 408    virtual void dump_instructions(const char *name);
 409    void dump_instruction(backend_instruction *inst);
 410    void dump_instruction(backend_instruction *inst, FILE *file);
 411
 412    void visit_atomic_counter_intrinsic(ir_call *ir);
 413
 414    const void *const key;
 415    struct brw_stage_prog_data *prog_data;
 416    unsigned int sanity_param_count;
 417
 418    int *param_size;
 419
 420    int *virtual_grf_start;
 421    int *virtual_grf_end;
 422    brw::fs_live_variables *live_intervals;
 423
 424    int *regs_live_at_ip;
 425
 426    /** Number of uniform variable components visited. */
 427    unsigned uniforms;
 428
 429    /** Byte-offset for the next available spot in the scratch space buffer. */
 430    unsigned last_scratch;
 431
 432    /**
 433     * Array mapping UNIFORM register numbers to the pull parameter index,
 434     * or -1 if this uniform register isn't being uploaded as a pull constant.
 435     */
 436    int *pull_constant_loc;
 437
 438    /**
 439     * Array mapping UNIFORM register numbers to the push parameter index,
 440     * or -1 if this uniform register isn't being uploaded as a push constant.
 441     */
 442    int *push_constant_loc;
 443
 444    struct hash_table *variable_ht;
 445    fs_reg frag_depth;
 446    fs_reg sample_mask;
 447    fs_reg outputs[VARYING_SLOT_MAX];
 448    unsigned output_components[VARYING_SLOT_MAX];
 449    fs_reg dual_src_output;
 450    bool do_dual_src;
 451    int first_non_payload_grf;
 452    /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
 453    unsigned max_grf;
 454
 455    fs_reg *fp_temp_regs;
 456    fs_reg *fp_input_regs;
 457
 458    fs_reg *nir_locals;
 459    fs_reg *nir_globals;
 460    fs_reg nir_inputs;
 461    fs_reg nir_outputs;
 462    fs_reg nir_uniforms;
 463    fs_reg *nir_system_values;
 464
 465    /** @{ debug annotation info */
 466    const char *current_annotation;
 467    const void *base_ir;
 468    /** @} */
 469
 470    bool failed;
 471    char *fail_msg;
 472    bool simd16_unsupported;
 473    char *no16_msg;
 474
 475    /* Result of last visit() method. */
 476    fs_reg result;
 477
 478    /** Register numbers for thread payload fields. */
 479    struct {
 480       uint8_t source_depth_reg;
 481       uint8_t source_w_reg;
 482       uint8_t aa_dest_stencil_reg;
 483       uint8_t dest_depth_reg;
 484       uint8_t sample_pos_reg;
 485       uint8_t sample_mask_in_reg;
 486       uint8_t barycentric_coord_reg[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 487
 488       /** The number of thread payload registers the hardware will supply. */
 489       uint8_t num_regs;
 490    } payload;
 491
 492    bool source_depth_to_render_target;
 493    bool runtime_check_aads_emit;
 494
 495    fs_reg pixel_x;
 496    fs_reg pixel_y;
 497    fs_reg wpos_w;
 498    fs_reg pixel_w;
 499    fs_reg delta_x[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 500    fs_reg delta_y[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 501    fs_reg shader_start_time;
 502    fs_reg userplane[MAX_CLIP_PLANES];
 503
 504    unsigned grf_used;
 505    bool spilled_any_registers;
 506
 507    const unsigned dispatch_width; /**< 8 or 16 */
 508 };
 509
 510 /**
 511  * The fragment shader code generator.
 512  *
 513  * Translates FS IR to actual i965 assembly code.
 514  */
 515 class fs_generator
 516 {
 517 public:
 518    fs_generator(struct brw_context *brw,
 519                 void *mem_ctx,
 520                 const void *key,
 521                 struct brw_stage_prog_data *prog_data,
 522                 struct gl_program *fp,
 523                 bool runtime_check_aads_emit,
 524                 const char *stage_abbrev);
 525    ~fs_generator();
 526
 527    void enable_debug(const char *shader_name);
 528    int generate_code(const cfg_t *cfg, int dispatch_width);
 529    const unsigned *get_assembly(unsigned int *assembly_size);
 530
 531 private:
 532    void fire_fb_write(fs_inst *inst,
 533                       struct brw_reg payload,
 534                       struct brw_reg implied_header,
 535                       GLuint nr);
 536    void generate_fb_write(fs_inst *inst, struct brw_reg payload);
 537    void generate_urb_write(fs_inst *inst, struct brw_reg payload);
 538    void generate_blorp_fb_write(fs_inst *inst);
 539    void generate_pixel_xy(struct brw_reg dst, bool is_x);
 540    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 541                          struct brw_reg *src);
 542    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 543                      struct brw_reg sampler_index);
 544    void generate_math_gen6(fs_inst *inst,
 545                            struct brw_reg dst,
 546                            struct brw_reg src0,
 547                            struct brw_reg src1);
 548    void generate_math_gen4(fs_inst *inst,
 549                            struct brw_reg dst,
 550                            struct brw_reg src);
 551    void generate_math_g45(fs_inst *inst,
 552                           struct brw_reg dst,
 553                           struct brw_reg src);
 554    void generate_ddx(enum opcode op, struct brw_reg dst, struct brw_reg src);
 555    void generate_ddy(enum opcode op, struct brw_reg dst, struct brw_reg src,
 556                      bool negate_value);
 557    void generate_scratch_write(fs_inst *inst, struct brw_reg src);
 558    void generate_scratch_read(fs_inst *inst, struct brw_reg dst);
 559    void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst);
 560    void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 561                                             struct brw_reg index,
 562                                             struct brw_reg offset);
 563    void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
 564                                                  struct brw_reg dst,
 565                                                  struct brw_reg surf_index,
 566                                                  struct brw_reg offset);
 567    void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 568                                             struct brw_reg index,
 569                                             struct brw_reg offset);
 570    void generate_varying_pull_constant_load_gen7(fs_inst *inst,
 571                                                  struct brw_reg dst,
 572                                                  struct brw_reg index,
 573                                                  struct brw_reg offset);
 574    void generate_mov_dispatch_to_flags(fs_inst *inst);
 575
 576    void generate_pixel_interpolator_query(fs_inst *inst,
 577                                           struct brw_reg dst,
 578                                           struct brw_reg src,
 579                                           struct brw_reg msg_data,
 580                                           unsigned msg_type);
 581
 582    void generate_set_omask(fs_inst *inst,
 583                            struct brw_reg dst,
 584                            struct brw_reg sample_mask);
 585
 586    void generate_set_sample_id(fs_inst *inst,
 587                                struct brw_reg dst,
 588                                struct brw_reg src0,
 589                                struct brw_reg src1);
 590
 591    void generate_set_simd4x2_offset(fs_inst *inst,
 592                                     struct brw_reg dst,
 593                                     struct brw_reg offset);
 594    void generate_discard_jump(fs_inst *inst);
 595
 596    void generate_pack_half_2x16_split(fs_inst *inst,
 597                                       struct brw_reg dst,
 598                                       struct brw_reg x,
 599                                       struct brw_reg y);
 600    void generate_unpack_half_2x16_split(fs_inst *inst,
 601                                         struct brw_reg dst,
 602                                         struct brw_reg src);
 603
 604    void generate_shader_time_add(fs_inst *inst,
 605                                  struct brw_reg payload,
 606                                  struct brw_reg offset,
 607                                  struct brw_reg value);
 608
 609    void generate_untyped_atomic(fs_inst *inst,
 610                                 struct brw_reg dst,
 611                                 struct brw_reg payload,
 612                                 struct brw_reg atomic_op,
 613                                 struct brw_reg surf_index);
 614
 615    void generate_untyped_surface_read(fs_inst *inst,
 616                                       struct brw_reg dst,
 617                                       struct brw_reg payload,
 618                                       struct brw_reg surf_index);
 619
 620    bool patch_discard_jumps_to_fb_writes();
 621
 622    struct brw_context *brw;
 623    struct gl_context *ctx;
 624
 625    struct brw_compile *p;
 626    const void * const key;
 627    struct brw_stage_prog_data * const prog_data;
 628
 629    const struct gl_program *prog;
 630
 631    unsigned dispatch_width; /**< 8 or 16 */
 632
 633    exec_list discard_halt_patches;
 634    bool runtime_check_aads_emit;
 635    bool debug_flag;
 636    const char *shader_name;
 637    const char *stage_abbrev;
 638    void *mem_ctx;
 639 };
 640
 641 bool brw_do_channel_expressions(struct exec_list *instructions);
 642 bool brw_do_vector_splitting(struct exec_list *instructions);