src/mesa/drivers/dri/i965/brw_fs.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #pragma once
  29
  30 #include "brw_shader.h"
  31
  32 extern "C" {
  33
  34 #include <sys/types.h>
  35
  36 #include "main/macros.h"
  37 #include "main/shaderobj.h"
  38 #include "main/uniforms.h"
  39 #include "program/prog_parameter.h"
  40 #include "program/prog_print.h"
  41 #include "program/prog_optimize.h"
  42 #include "program/register_allocate.h"
  43 #include "program/sampler.h"
  44 #include "program/hash_table.h"
  45 #include "brw_context.h"
  46 #include "brw_eu.h"
  47 #include "brw_wm.h"
  48 #include "brw_shader.h"
  49 #include "intel_asm_annotation.h"
  50 }
  51 #include "gen8_generator.h"
  52 #include "glsl/glsl_types.h"
  53 #include "glsl/ir.h"
  54
  55 #define MAX_SAMPLER_MESSAGE_SIZE 11
  56
  57 struct bblock_t;
  58 namespace {
  59    struct acp_entry;
  60 }
  61
  62 namespace brw {
  63    class fs_live_variables;
  64 }
  65
  66 class fs_reg : public backend_reg {
  67 public:
  68    DECLARE_RALLOC_CXX_OPERATORS(fs_reg)
  69
  70    void init();
  71
  72    fs_reg();
  73    fs_reg(float f);
  74    fs_reg(int32_t i);
  75    fs_reg(uint32_t u);
  76    fs_reg(struct brw_reg fixed_hw_reg);
  77    fs_reg(enum register_file file, int reg);
  78    fs_reg(enum register_file file, int reg, enum brw_reg_type type);
  79    fs_reg(class fs_visitor *v, const struct glsl_type *type);
  80
  81    bool equals(const fs_reg &r) const;
  82    bool is_valid_3src() const;
  83    bool is_contiguous() const;
  84
  85    fs_reg &apply_stride(unsigned stride);
  86    /** Smear a channel of the reg to all channels. */
  87    fs_reg &set_smear(unsigned subreg);
  88
  89    /**
  90     * Offset in bytes from the start of the register.  Values up to a
  91     * backend_reg::reg_offset unit are valid.
  92     */
  93    int subreg_offset;
  94
  95    fs_reg *reladdr;
  96
  97    /** Register region horizontal stride */
  98    uint8_t stride;
  99 };
 100
 101 static inline fs_reg
 102 retype(fs_reg reg, enum brw_reg_type type)
 103 {
 104    reg.fixed_hw_reg.type = reg.type = type;
 105    return reg;
 106 }
 107
 108 static inline fs_reg
 109 offset(fs_reg reg, unsigned delta)
 110 {
 111    assert(delta == 0 || (reg.file != HW_REG && reg.file != IMM));
 112    reg.reg_offset += delta;
 113    return reg;
 114 }
 115
 116 static inline fs_reg
 117 byte_offset(fs_reg reg, unsigned delta)
 118 {
 119    assert(delta == 0 || (reg.file != HW_REG && reg.file != IMM));
 120    reg.subreg_offset += delta;
 121    return reg;
 122 }
 123
 124 /**
 125  * Get either of the 8-component halves of a 16-component register.
 126  *
 127  * Note: this also works if \c reg represents a SIMD16 pair of registers.
 128  */
 129 static inline fs_reg
 130 half(const fs_reg &reg, unsigned idx)
 131 {
 132    assert(idx < 2);
 133    assert(idx == 0 || (reg.file != HW_REG && reg.file != IMM));
 134    return byte_offset(reg, 8 * idx * reg.stride * type_sz(reg.type));
 135 }
 136
 137 static const fs_reg reg_undef;
 138 static const fs_reg reg_null_f(retype(brw_null_reg(), BRW_REGISTER_TYPE_F));
 139 static const fs_reg reg_null_d(retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
 140 static const fs_reg reg_null_ud(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD));
 141
 142 class ip_record : public exec_node {
 143 public:
 144    DECLARE_RALLOC_CXX_OPERATORS(ip_record)
 145
 146    ip_record(int ip)
 147    {
 148       this->ip = ip;
 149    }
 150
 151    int ip;
 152 };
 153
 154 class fs_inst : public backend_instruction {
 155    fs_inst &operator=(const fs_inst &);
 156
 157 public:
 158    DECLARE_RALLOC_CXX_OPERATORS(fs_inst)
 159
 160    void init(enum opcode opcode, const fs_reg &dst, fs_reg *src, int sources);
 161
 162    fs_inst(enum opcode opcode = BRW_OPCODE_NOP, const fs_reg &dst = reg_undef);
 163    fs_inst(enum opcode opcode, const fs_reg &dst, const fs_reg &src0);
 164    fs_inst(enum opcode opcode, const fs_reg &dst, const fs_reg &src0,
 165            const fs_reg &src1);
 166    fs_inst(enum opcode opcode, const fs_reg &dst, const fs_reg &src0,
 167            const fs_reg &src1, const fs_reg &src2);
 168    fs_inst(enum opcode opcode, const fs_reg &dst, fs_reg src[], int sources);
 169    fs_inst(const fs_inst &that);
 170
 171    void resize_sources(uint8_t num_sources);
 172
 173    bool equals(fs_inst *inst) const;
 174    bool overwrites_reg(const fs_reg &reg) const;
 175    bool is_send_from_grf() const;
 176    bool is_partial_write() const;
 177    int regs_read(fs_visitor *v, int arg) const;
 178    bool can_do_source_mods(struct brw_context *brw);
 179
 180    bool reads_flag() const;
 181    bool writes_flag() const;
 182
 183    fs_reg dst;
 184    fs_reg *src;
 185
 186    uint8_t sources; /**< Number of fs_reg sources. */
 187
 188    /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional
 189     * mod and predication.
 190     */
 191    uint8_t flag_subreg;
 192
 193    uint8_t regs_written; /**< Number of vgrfs written by a SEND message, or 1 */
 194    bool eot:1;
 195    bool header_present:1;
 196    bool shadow_compare:1;
 197    bool force_uncompressed:1;
 198    bool force_sechalf:1;
 199    bool pi_noperspective:1;   /**< Pixel interpolator noperspective flag */
 200 };
 201
 202 /**
 203  * The fragment shader front-end.
 204  *
 205  * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
 206  */
 207 class fs_visitor : public backend_visitor
 208 {
 209 public:
 210
 211    fs_visitor(struct brw_context *brw,
 212               void *mem_ctx,
 213               const struct brw_wm_prog_key *key,
 214               struct brw_wm_prog_data *prog_data,
 215               struct gl_shader_program *shader_prog,
 216               struct gl_fragment_program *fp,
 217               unsigned dispatch_width);
 218    ~fs_visitor();
 219
 220    fs_reg *variable_storage(ir_variable *var);
 221    int virtual_grf_alloc(int size);
 222    void import_uniforms(fs_visitor *v);
 223
 224    void visit(ir_variable *ir);
 225    void visit(ir_assignment *ir);
 226    void visit(ir_dereference_variable *ir);
 227    void visit(ir_dereference_record *ir);
 228    void visit(ir_dereference_array *ir);
 229    void visit(ir_expression *ir);
 230    void visit(ir_texture *ir);
 231    void visit(ir_if *ir);
 232    void visit(ir_constant *ir);
 233    void visit(ir_swizzle *ir);
 234    void visit(ir_return *ir);
 235    void visit(ir_loop *ir);
 236    void visit(ir_loop_jump *ir);
 237    void visit(ir_discard *ir);
 238    void visit(ir_call *ir);
 239    void visit(ir_function *ir);
 240    void visit(ir_function_signature *ir);
 241    void visit(ir_emit_vertex *);
 242    void visit(ir_end_primitive *);
 243
 244    uint32_t gather_channel(ir_texture *ir, uint32_t sampler);
 245    void swizzle_result(ir_texture *ir, fs_reg orig_val, uint32_t sampler);
 246
 247    fs_inst *emit(fs_inst *inst);
 248    void emit(exec_list list);
 249
 250    fs_inst *emit(enum opcode opcode);
 251    fs_inst *emit(enum opcode opcode, const fs_reg &dst);
 252    fs_inst *emit(enum opcode opcode, const fs_reg &dst, const fs_reg &src0);
 253    fs_inst *emit(enum opcode opcode, const fs_reg &dst, const fs_reg &src0,
 254                  const fs_reg &src1);
 255    fs_inst *emit(enum opcode opcode, const fs_reg &dst,
 256                  const fs_reg &src0, const fs_reg &src1, const fs_reg &src2);
 257    fs_inst *emit(enum opcode opcode, const fs_reg &dst,
 258                  fs_reg src[], int sources);
 259
 260    fs_inst *MOV(const fs_reg &dst, const fs_reg &src);
 261    fs_inst *NOT(const fs_reg &dst, const fs_reg &src);
 262    fs_inst *RNDD(const fs_reg &dst, const fs_reg &src);
 263    fs_inst *RNDE(const fs_reg &dst, const fs_reg &src);
 264    fs_inst *RNDZ(const fs_reg &dst, const fs_reg &src);
 265    fs_inst *FRC(const fs_reg &dst, const fs_reg &src);
 266    fs_inst *ADD(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 267    fs_inst *MUL(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 268    fs_inst *MACH(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 269    fs_inst *MAC(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 270    fs_inst *SHL(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 271    fs_inst *SHR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 272    fs_inst *ASR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 273    fs_inst *AND(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 274    fs_inst *OR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 275    fs_inst *XOR(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 276    fs_inst *IF(enum brw_predicate predicate);
 277    fs_inst *IF(const fs_reg &src0, const fs_reg &src1,
 278                enum brw_conditional_mod condition);
 279    fs_inst *CMP(fs_reg dst, fs_reg src0, fs_reg src1,
 280                 enum brw_conditional_mod condition);
 281    fs_inst *LRP(const fs_reg &dst, const fs_reg &a, const fs_reg &y,
 282                 const fs_reg &x);
 283    fs_inst *DEP_RESOLVE_MOV(int grf);
 284    fs_inst *BFREV(const fs_reg &dst, const fs_reg &value);
 285    fs_inst *BFE(const fs_reg &dst, const fs_reg &bits, const fs_reg &offset,
 286                 const fs_reg &value);
 287    fs_inst *BFI1(const fs_reg &dst, const fs_reg &bits, const fs_reg &offset);
 288    fs_inst *BFI2(const fs_reg &dst, const fs_reg &bfi1_dst,
 289                  const fs_reg &insert, const fs_reg &base);
 290    fs_inst *FBH(const fs_reg &dst, const fs_reg &value);
 291    fs_inst *FBL(const fs_reg &dst, const fs_reg &value);
 292    fs_inst *CBIT(const fs_reg &dst, const fs_reg &value);
 293    fs_inst *MAD(const fs_reg &dst, const fs_reg &c, const fs_reg &b,
 294                 const fs_reg &a);
 295    fs_inst *ADDC(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 296    fs_inst *SUBB(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 297    fs_inst *SEL(const fs_reg &dst, const fs_reg &src0, const fs_reg &src1);
 298
 299    int type_size(const struct glsl_type *type);
 300    fs_inst *get_instruction_generating_reg(fs_inst *start,
 301                                            fs_inst *end,
 302                                            const fs_reg &reg);
 303
 304    fs_inst *LOAD_PAYLOAD(const fs_reg &dst, fs_reg *src, int sources);
 305
 306    exec_list VARYING_PULL_CONSTANT_LOAD(const fs_reg &dst,
 307                                         const fs_reg &surf_index,
 308                                         const fs_reg &varying_offset,
 309                                         uint32_t const_offset);
 310
 311    bool run();
 312    void assign_binding_table_offsets();
 313    void setup_payload_gen4();
 314    void setup_payload_gen6();
 315    void assign_curb_setup();
 316    void calculate_urb_setup();
 317    void assign_urb_setup();
 318    bool assign_regs(bool allow_spilling);
 319    void assign_regs_trivial();
 320    void get_used_mrfs(bool *mrf_used);
 321    void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
 322                                    int first_payload_node);
 323    void setup_mrf_hack_interference(struct ra_graph *g,
 324                                     int first_mrf_hack_node);
 325    int choose_spill_reg(struct ra_graph *g);
 326    void spill_reg(int spill_reg);
 327    void split_virtual_grfs();
 328    void compact_virtual_grfs();
 329    void move_uniform_array_access_to_pull_constants();
 330    void assign_constant_locations();
 331    void demote_pull_constants();
 332    void invalidate_live_intervals();
 333    void calculate_live_intervals();
 334    void calculate_register_pressure();
 335    bool opt_algebraic();
 336    bool opt_cse();
 337    bool opt_cse_local(bblock_t *block);
 338    bool opt_copy_propagate();
 339    bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
 340    bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
 341                                  exec_list *acp);
 342    void opt_drop_redundant_mov_to_flags();
 343    bool register_coalesce();
 344    bool compute_to_mrf();
 345    bool dead_code_eliminate();
 346    bool remove_duplicate_mrf_writes();
 347    bool virtual_grf_interferes(int a, int b);
 348    void schedule_instructions(instruction_scheduler_mode mode);
 349    void insert_gen4_send_dependency_workarounds();
 350    void insert_gen4_pre_send_dependency_workarounds(fs_inst *inst);
 351    void insert_gen4_post_send_dependency_workarounds(fs_inst *inst);
 352    void vfail(const char *msg, va_list args);
 353    void fail(const char *msg, ...);
 354    void no16(const char *msg, ...);
 355    void lower_uniform_pull_constant_loads();
 356    bool lower_load_payload();
 357
 358    void push_force_uncompressed();
 359    void pop_force_uncompressed();
 360
 361    void emit_dummy_fs();
 362    fs_reg *emit_fragcoord_interpolation(ir_variable *ir);
 363    fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
 364                          glsl_interp_qualifier interpolation_mode,
 365                          bool is_centroid, bool is_sample);
 366    fs_reg *emit_frontfacing_interpolation(ir_variable *ir);
 367    fs_reg *emit_samplepos_setup(ir_variable *ir);
 368    fs_reg *emit_sampleid_setup(ir_variable *ir);
 369    fs_reg *emit_general_interpolation(ir_variable *ir);
 370    void emit_interpolation_setup_gen4();
 371    void emit_interpolation_setup_gen6();
 372    void compute_sample_position(fs_reg dst, fs_reg int_sample_pos);
 373    fs_reg rescale_texcoord(ir_texture *ir, fs_reg coordinate,
 374                            bool is_rect, uint32_t sampler, int texunit);
 375    fs_inst *emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 376                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
 377                               uint32_t sampler);
 378    fs_inst *emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 379                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
 380                               fs_reg sample_index, uint32_t sampler);
 381    fs_inst *emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 382                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
 383                               fs_reg sample_index, fs_reg mcs, uint32_t sampler);
 384    fs_reg emit_mcs_fetch(ir_texture *ir, fs_reg coordinate, uint32_t sampler);
 385    void emit_gen6_gather_wa(uint8_t wa, fs_reg dst);
 386    fs_reg fix_math_operand(fs_reg src);
 387    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0);
 388    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0, fs_reg src1);
 389    void emit_lrp(const fs_reg &dst, const fs_reg &x, const fs_reg &y,
 390                  const fs_reg &a);
 391    void emit_minmax(enum brw_conditional_mod conditionalmod, const fs_reg &dst,
 392                     const fs_reg &src0, const fs_reg &src1);
 393    bool try_emit_saturate(ir_expression *ir);
 394    bool try_emit_mad(ir_expression *ir);
 395    void try_replace_with_sel();
 396    bool opt_peephole_sel();
 397    bool opt_peephole_predicated_break();
 398    bool opt_saturate_propagation();
 399    void emit_bool_to_cond_code(ir_rvalue *condition);
 400    void emit_if_gen6(ir_if *ir);
 401    void emit_unspill(fs_inst *inst, fs_reg reg, uint32_t spill_offset,
 402                      int count);
 403
 404    void emit_fragment_program_code();
 405    void setup_fp_regs();
 406    fs_reg get_fp_src_reg(const prog_src_register *src);
 407    fs_reg get_fp_dst_reg(const prog_dst_register *dst);
 408    void emit_fp_alu1(enum opcode opcode,
 409                      const struct prog_instruction *fpi,
 410                      fs_reg dst, fs_reg src);
 411    void emit_fp_alu2(enum opcode opcode,
 412                      const struct prog_instruction *fpi,
 413                      fs_reg dst, fs_reg src0, fs_reg src1);
 414    void emit_fp_scalar_write(const struct prog_instruction *fpi,
 415                              fs_reg dst, fs_reg src);
 416    void emit_fp_scalar_math(enum opcode opcode,
 417                             const struct prog_instruction *fpi,
 418                             fs_reg dst, fs_reg src);
 419
 420    void emit_fp_minmax(const struct prog_instruction *fpi,
 421                        fs_reg dst, fs_reg src0, fs_reg src1);
 422
 423    void emit_fp_sop(enum brw_conditional_mod conditional_mod,
 424                     const struct prog_instruction *fpi,
 425                     fs_reg dst, fs_reg src0, fs_reg src1, fs_reg one);
 426
 427    void emit_color_write(int target, int index, int first_color_mrf);
 428    void emit_alpha_test();
 429    void emit_fb_writes();
 430
 431    void emit_shader_time_begin();
 432    void emit_shader_time_end();
 433    void emit_shader_time_write(enum shader_time_shader_type type,
 434                                fs_reg value);
 435
 436    void emit_untyped_atomic(unsigned atomic_op, unsigned surf_index,
 437                             fs_reg dst, fs_reg offset, fs_reg src0,
 438                             fs_reg src1);
 439
 440    void emit_untyped_surface_read(unsigned surf_index, fs_reg dst,
 441                                   fs_reg offset);
 442
 443    void emit_interpolate_expression(ir_expression *ir);
 444
 445    bool try_rewrite_rhs_to_dst(ir_assignment *ir,
 446                                fs_reg dst,
 447                                fs_reg src,
 448                                fs_inst *pre_rhs_inst,
 449                                fs_inst *last_rhs_inst);
 450    void emit_assignment_writes(fs_reg &l, fs_reg &r,
 451                                const glsl_type *type, bool predicated);
 452    void resolve_ud_negate(fs_reg *reg);
 453    void resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg);
 454
 455    fs_reg get_timestamp();
 456
 457    struct brw_reg interp_reg(int location, int channel);
 458    void setup_uniform_values(ir_variable *ir);
 459    void setup_builtin_uniform_values(ir_variable *ir);
 460    int implied_mrf_writes(fs_inst *inst);
 461
 462    virtual void dump_instructions();
 463    virtual void dump_instructions(const char *name);
 464    void dump_instruction(backend_instruction *inst);
 465    void dump_instruction(backend_instruction *inst, FILE *file);
 466
 467    void visit_atomic_counter_intrinsic(ir_call *ir);
 468
 469    struct gl_fragment_program *fp;
 470    const struct brw_wm_prog_key *const key;
 471    struct brw_wm_prog_data *prog_data;
 472    unsigned int sanity_param_count;
 473
 474    int *param_size;
 475
 476    int *virtual_grf_sizes;
 477    int virtual_grf_count;
 478    int virtual_grf_array_size;
 479    int *virtual_grf_start;
 480    int *virtual_grf_end;
 481    brw::fs_live_variables *live_intervals;
 482
 483    int *regs_live_at_ip;
 484
 485    /** Number of uniform variable components visited. */
 486    unsigned uniforms;
 487
 488    /** Byte-offset for the next available spot in the scratch space buffer. */
 489    unsigned last_scratch;
 490
 491    /**
 492     * Array mapping UNIFORM register numbers to the pull parameter index,
 493     * or -1 if this uniform register isn't being uploaded as a pull constant.
 494     */
 495    int *pull_constant_loc;
 496
 497    /**
 498     * Array mapping UNIFORM register numbers to the push parameter index,
 499     * or -1 if this uniform register isn't being uploaded as a push constant.
 500     */
 501    int *push_constant_loc;
 502
 503    struct hash_table *variable_ht;
 504    fs_reg frag_depth;
 505    fs_reg sample_mask;
 506    fs_reg outputs[BRW_MAX_DRAW_BUFFERS];
 507    unsigned output_components[BRW_MAX_DRAW_BUFFERS];
 508    fs_reg dual_src_output;
 509    bool do_dual_src;
 510    int first_non_payload_grf;
 511    /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
 512    int max_grf;
 513
 514    fs_reg *fp_temp_regs;
 515    fs_reg *fp_input_regs;
 516
 517    /** @{ debug annotation info */
 518    const char *current_annotation;
 519    const void *base_ir;
 520    /** @} */
 521
 522    bool failed;
 523    char *fail_msg;
 524    bool simd16_unsupported;
 525    char *no16_msg;
 526
 527    /* Result of last visit() method. */
 528    fs_reg result;
 529
 530    /** Register numbers for thread payload fields. */
 531    struct {
 532       uint8_t source_depth_reg;
 533       uint8_t source_w_reg;
 534       uint8_t aa_dest_stencil_reg;
 535       uint8_t dest_depth_reg;
 536       uint8_t sample_pos_reg;
 537       uint8_t sample_mask_in_reg;
 538       uint8_t barycentric_coord_reg[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 539
 540       /** The number of thread payload registers the hardware will supply. */
 541       uint8_t num_regs;
 542    } payload;
 543
 544    bool source_depth_to_render_target;
 545    bool runtime_check_aads_emit;
 546
 547    fs_reg pixel_x;
 548    fs_reg pixel_y;
 549    fs_reg wpos_w;
 550    fs_reg pixel_w;
 551    fs_reg delta_x[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 552    fs_reg delta_y[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 553    fs_reg shader_start_time;
 554
 555    int grf_used;
 556    bool spilled_any_registers;
 557
 558    const unsigned dispatch_width; /**< 8 or 16 */
 559
 560    int force_uncompressed_stack;
 561 };
 562
 563 /**
 564  * The fragment shader code generator.
 565  *
 566  * Translates FS IR to actual i965 assembly code.
 567  */
 568 class fs_generator
 569 {
 570 public:
 571    fs_generator(struct brw_context *brw,
 572                 void *mem_ctx,
 573                 const struct brw_wm_prog_key *key,
 574                 struct brw_wm_prog_data *prog_data,
 575                 struct gl_shader_program *prog,
 576                 struct gl_fragment_program *fp,
 577                 bool dual_source_output,
 578                 bool runtime_check_aads_emit,
 579                 bool debug_flag);
 580    ~fs_generator();
 581
 582    const unsigned *generate_assembly(exec_list *simd8_instructions,
 583                                      exec_list *simd16_instructions,
 584                                      unsigned *assembly_size);
 585
 586 private:
 587    void generate_code(exec_list *instructions);
 588    void fire_fb_write(fs_inst *inst,
 589                       GLuint base_reg,
 590                       struct brw_reg implied_header,
 591                       GLuint nr);
 592    void generate_fb_write(fs_inst *inst);
 593    void generate_blorp_fb_write(fs_inst *inst);
 594    void generate_pixel_xy(struct brw_reg dst, bool is_x);
 595    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 596                          struct brw_reg *src);
 597    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 598                      struct brw_reg sampler_index);
 599    void generate_math_gen6(fs_inst *inst,
 600                            struct brw_reg dst,
 601                            struct brw_reg src0,
 602                            struct brw_reg src1);
 603    void generate_math_gen4(fs_inst *inst,
 604                            struct brw_reg dst,
 605                            struct brw_reg src);
 606    void generate_math_g45(fs_inst *inst,
 607                           struct brw_reg dst,
 608                           struct brw_reg src);
 609    void generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 610    void generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 611                      bool negate_value);
 612    void generate_scratch_write(fs_inst *inst, struct brw_reg src);
 613    void generate_scratch_read(fs_inst *inst, struct brw_reg dst);
 614    void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst);
 615    void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 616                                             struct brw_reg index,
 617                                             struct brw_reg offset);
 618    void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
 619                                                  struct brw_reg dst,
 620                                                  struct brw_reg surf_index,
 621                                                  struct brw_reg offset);
 622    void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 623                                             struct brw_reg index,
 624                                             struct brw_reg offset);
 625    void generate_varying_pull_constant_load_gen7(fs_inst *inst,
 626                                                  struct brw_reg dst,
 627                                                  struct brw_reg index,
 628                                                  struct brw_reg offset);
 629    void generate_mov_dispatch_to_flags(fs_inst *inst);
 630
 631    void generate_pixel_interpolator_query(fs_inst *inst,
 632                                           struct brw_reg dst,
 633                                           struct brw_reg src,
 634                                           struct brw_reg msg_data,
 635                                           unsigned msg_type);
 636
 637    void generate_set_omask(fs_inst *inst,
 638                            struct brw_reg dst,
 639                            struct brw_reg sample_mask);
 640
 641    void generate_set_sample_id(fs_inst *inst,
 642                                struct brw_reg dst,
 643                                struct brw_reg src0,
 644                                struct brw_reg src1);
 645
 646    void generate_set_simd4x2_offset(fs_inst *inst,
 647                                     struct brw_reg dst,
 648                                     struct brw_reg offset);
 649    void generate_discard_jump(fs_inst *inst);
 650
 651    void generate_pack_half_2x16_split(fs_inst *inst,
 652                                       struct brw_reg dst,
 653                                       struct brw_reg x,
 654                                       struct brw_reg y);
 655    void generate_unpack_half_2x16_split(fs_inst *inst,
 656                                         struct brw_reg dst,
 657                                         struct brw_reg src);
 658
 659    void generate_shader_time_add(fs_inst *inst,
 660                                  struct brw_reg payload,
 661                                  struct brw_reg offset,
 662                                  struct brw_reg value);
 663
 664    void generate_untyped_atomic(fs_inst *inst,
 665                                 struct brw_reg dst,
 666                                 struct brw_reg atomic_op,
 667                                 struct brw_reg surf_index);
 668
 669    void generate_untyped_surface_read(fs_inst *inst,
 670                                       struct brw_reg dst,
 671                                       struct brw_reg surf_index);
 672
 673    bool patch_discard_jumps_to_fb_writes();
 674
 675    struct brw_context *brw;
 676    struct gl_context *ctx;
 677
 678    struct brw_compile *p;
 679    const struct brw_wm_prog_key *const key;
 680    struct brw_wm_prog_data *prog_data;
 681
 682    struct gl_shader_program *prog;
 683    const struct gl_fragment_program *fp;
 684
 685    unsigned dispatch_width; /**< 8 or 16 */
 686
 687    exec_list discard_halt_patches;
 688    bool dual_source_output;
 689    bool runtime_check_aads_emit;
 690    const bool debug_flag;
 691    void *mem_ctx;
 692 };
 693
 694 /**
 695  * The fragment shader code generator.
 696  *
 697  * Translates FS IR to actual i965 assembly code.
 698  */
 699 class gen8_fs_generator : public gen8_generator
 700 {
 701 public:
 702    gen8_fs_generator(struct brw_context *brw,
 703                      void *mem_ctx,
 704                      const struct brw_wm_prog_key *key,
 705                      struct brw_wm_prog_data *prog_data,
 706                      struct gl_shader_program *prog,
 707                      struct gl_fragment_program *fp,
 708                      bool dual_source_output);
 709    ~gen8_fs_generator();
 710
 711    const unsigned *generate_assembly(exec_list *simd8_instructions,
 712                                      exec_list *simd16_instructions,
 713                                      unsigned *assembly_size);
 714
 715 private:
 716    void generate_code(exec_list *instructions);
 717    void generate_fb_write(fs_inst *inst);
 718    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 719                          struct brw_reg *src);
 720    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 721                      struct brw_reg sampler_index);
 722    void generate_math1(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 723    void generate_math2(fs_inst *inst, struct brw_reg dst,
 724                        struct brw_reg src0, struct brw_reg src1);
 725    void generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 726    void generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 727                      bool negate_value);
 728    void generate_scratch_write(fs_inst *inst, struct brw_reg src);
 729    void generate_scratch_read(fs_inst *inst, struct brw_reg dst);
 730    void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst);
 731    void generate_uniform_pull_constant_load(fs_inst *inst,
 732                                             struct brw_reg dst,
 733                                             struct brw_reg index,
 734                                             struct brw_reg offset);
 735    void generate_varying_pull_constant_load(fs_inst *inst,
 736                                             struct brw_reg dst,
 737                                             struct brw_reg index,
 738                                             struct brw_reg offset);
 739    void generate_mov_dispatch_to_flags(fs_inst *ir);
 740    void generate_set_omask(fs_inst *ir,
 741                            struct brw_reg dst,
 742                            struct brw_reg sample_mask);
 743    void generate_set_sample_id(fs_inst *ir,
 744                                struct brw_reg dst,
 745                                struct brw_reg src0,
 746                                struct brw_reg src1);
 747    void generate_set_simd4x2_offset(fs_inst *ir,
 748                                     struct brw_reg dst,
 749                                     struct brw_reg offset);
 750    void generate_pack_half_2x16_split(fs_inst *inst,
 751                                       struct brw_reg dst,
 752                                       struct brw_reg x,
 753                                       struct brw_reg y);
 754    void generate_unpack_half_2x16_split(fs_inst *inst,
 755                                         struct brw_reg dst,
 756                                         struct brw_reg src);
 757    void generate_untyped_atomic(fs_inst *inst,
 758                                 struct brw_reg dst,
 759                                 struct brw_reg atomic_op,
 760                                 struct brw_reg surf_index);
 761
 762    void generate_untyped_surface_read(fs_inst *inst,
 763                                       struct brw_reg dst,
 764                                       struct brw_reg surf_index);
 765    void generate_discard_jump(fs_inst *ir);
 766
 767    bool patch_discard_jumps_to_fb_writes();
 768
 769    const struct brw_wm_prog_key *const key;
 770    struct brw_wm_prog_data *prog_data;
 771    const struct gl_fragment_program *fp;
 772
 773    unsigned dispatch_width; /** 8 or 16 */
 774
 775    bool dual_source_output;
 776
 777    exec_list discard_halt_patches;
 778 };
 779
 780 bool brw_do_channel_expressions(struct exec_list *instructions);
 781 bool brw_do_vector_splitting(struct exec_list *instructions);
 782 bool brw_fs_precompile(struct gl_context *ctx, struct gl_shader_program *prog);
 783
 784 struct brw_reg brw_reg_from_fs_reg(fs_reg *reg);