src/mesa/drivers/dri/i965/brw_fs.h

   1 /*
   2  * Copyright © 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #pragma once
  29
  30 #include "brw_shader.h"
  31
  32 extern "C" {
  33
  34 #include <sys/types.h>
  35
  36 #include "main/macros.h"
  37 #include "main/shaderobj.h"
  38 #include "main/uniforms.h"
  39 #include "program/prog_parameter.h"
  40 #include "program/prog_print.h"
  41 #include "program/prog_optimize.h"
  42 #include "program/register_allocate.h"
  43 #include "program/sampler.h"
  44 #include "program/hash_table.h"
  45 #include "brw_context.h"
  46 #include "brw_eu.h"
  47 #include "brw_wm.h"
  48 #include "brw_shader.h"
  49 }
  50 #include "glsl/glsl_types.h"
  51 #include "glsl/ir.h"
  52
  53 class bblock_t;
  54 namespace {
  55    struct acp_entry;
  56 }
  57
  58 enum register_file {
  59    BAD_FILE,
  60    ARF,
  61    GRF,
  62    MRF,
  63    IMM,
  64    FIXED_HW_REG, /* a struct brw_reg */
  65    UNIFORM, /* prog_data->params[reg] */
  66 };
  67
  68 class fs_reg {
  69 public:
  70    /* Callers of this ralloc-based new need not call delete. It's
  71     * easier to just ralloc_free 'ctx' (or any of its ancestors). */
  72    static void* operator new(size_t size, void *ctx)
  73    {
  74       void *node;
  75
  76       node = ralloc_size(ctx, size);
  77       assert(node != NULL);
  78
  79       return node;
  80    }
  81
  82    void init();
  83
  84    fs_reg();
  85    fs_reg(float f);
  86    fs_reg(int32_t i);
  87    fs_reg(uint32_t u);
  88    fs_reg(struct brw_reg fixed_hw_reg);
  89    fs_reg(enum register_file file, int reg);
  90    fs_reg(enum register_file file, int reg, uint32_t type);
  91    fs_reg(class fs_visitor *v, const struct glsl_type *type);
  92
  93    bool equals(const fs_reg &r) const;
  94    bool is_zero() const;
  95    bool is_one() const;
  96
  97    /** Register file: ARF, GRF, MRF, IMM. */
  98    enum register_file file;
  99    /**
 100     * Register number.  For ARF/MRF, it's the hardware register.  For
 101     * GRF, it's a virtual register number until register allocation
 102     */
 103    int reg;
 104    /**
 105     * For virtual registers, this is a hardware register offset from
 106     * the start of the register block (for example, a constant index
 107     * in an array access).
 108     */
 109    int reg_offset;
 110    /** Register type.  BRW_REGISTER_TYPE_* */
 111    int type;
 112    bool negate;
 113    bool abs;
 114    bool sechalf;
 115    struct brw_reg fixed_hw_reg;
 116    int smear; /* -1, or a channel of the reg to smear to all channels. */
 117
 118    /** Value for file == IMM */
 119    union {
 120       int32_t i;
 121       uint32_t u;
 122       float f;
 123    } imm;
 124
 125    fs_reg *reladdr;
 126 };
 127
 128 static const fs_reg reg_undef;
 129 static const fs_reg reg_null_f(ARF, BRW_ARF_NULL, BRW_REGISTER_TYPE_F);
 130 static const fs_reg reg_null_d(ARF, BRW_ARF_NULL, BRW_REGISTER_TYPE_D);
 131
 132 class ip_record : public exec_node {
 133 public:
 134    static void* operator new(size_t size, void *ctx)
 135    {
 136       void *node;
 137
 138       node = rzalloc_size(ctx, size);
 139       assert(node != NULL);
 140
 141       return node;
 142    }
 143
 144    ip_record(int ip)
 145    {
 146       this->ip = ip;
 147    }
 148
 149    int ip;
 150 };
 151
 152 class fs_inst : public backend_instruction {
 153 public:
 154    /* Callers of this ralloc-based new need not call delete. It's
 155     * easier to just ralloc_free 'ctx' (or any of its ancestors). */
 156    static void* operator new(size_t size, void *ctx)
 157    {
 158       void *node;
 159
 160       node = rzalloc_size(ctx, size);
 161       assert(node != NULL);
 162
 163       return node;
 164    }
 165
 166    void init();
 167
 168    fs_inst();
 169    fs_inst(enum opcode opcode);
 170    fs_inst(enum opcode opcode, fs_reg dst);
 171    fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0);
 172    fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
 173    fs_inst(enum opcode opcode, fs_reg dst,
 174            fs_reg src0, fs_reg src1,fs_reg src2);
 175
 176    bool equals(fs_inst *inst);
 177    bool overwrites_reg(const fs_reg &reg);
 178    bool is_tex();
 179    bool is_math();
 180    bool is_control_flow();
 181    bool is_send_from_grf();
 182    bool is_partial_write();
 183
 184    fs_reg dst;
 185    fs_reg src[3];
 186    bool saturate;
 187    int conditional_mod; /**< BRW_CONDITIONAL_* */
 188
 189    /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional
 190     * mod and predication.
 191     */
 192    uint8_t flag_subreg;
 193
 194    int mlen; /**< SEND message length */
 195    int regs_written; /**< Number of vgrfs written by a SEND message, or 1 */
 196    int base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
 197    uint32_t texture_offset; /**< Texture offset bitfield */
 198    int sampler;
 199    int target; /**< MRT target. */
 200    bool eot;
 201    bool header_present;
 202    bool shadow_compare;
 203    bool force_uncompressed;
 204    bool force_sechalf;
 205    bool force_writemask_all;
 206    uint32_t offset; /* spill/unspill offset */
 207
 208    /** @{
 209     * Annotation for the generated IR.  One of the two can be set.
 210     */
 211    const void *ir;
 212    const char *annotation;
 213    /** @} */
 214 };
 215
 216 /**
 217  * The fragment shader front-end.
 218  *
 219  * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
 220  */
 221 class fs_visitor : public backend_visitor
 222 {
 223 public:
 224
 225    fs_visitor(struct brw_context *brw,
 226               struct brw_wm_compile *c,
 227               struct gl_shader_program *shader_prog,
 228               struct gl_fragment_program *fp,
 229               unsigned dispatch_width);
 230    ~fs_visitor();
 231
 232    fs_reg *variable_storage(ir_variable *var);
 233    int virtual_grf_alloc(int size);
 234    void import_uniforms(fs_visitor *v);
 235
 236    void visit(ir_variable *ir);
 237    void visit(ir_assignment *ir);
 238    void visit(ir_dereference_variable *ir);
 239    void visit(ir_dereference_record *ir);
 240    void visit(ir_dereference_array *ir);
 241    void visit(ir_expression *ir);
 242    void visit(ir_texture *ir);
 243    void visit(ir_if *ir);
 244    void visit(ir_constant *ir);
 245    void visit(ir_swizzle *ir);
 246    void visit(ir_return *ir);
 247    void visit(ir_loop *ir);
 248    void visit(ir_loop_jump *ir);
 249    void visit(ir_discard *ir);
 250    void visit(ir_call *ir);
 251    void visit(ir_function *ir);
 252    void visit(ir_function_signature *ir);
 253
 254    void swizzle_result(ir_texture *ir, fs_reg orig_val, int sampler);
 255
 256    bool can_do_source_mods(fs_inst *inst);
 257
 258    fs_inst *emit(fs_inst inst);
 259    fs_inst *emit(fs_inst *inst);
 260    void emit(exec_list list);
 261
 262    fs_inst *emit(enum opcode opcode);
 263    fs_inst *emit(enum opcode opcode, fs_reg dst);
 264    fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0);
 265    fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
 266    fs_inst *emit(enum opcode opcode, fs_reg dst,
 267                  fs_reg src0, fs_reg src1, fs_reg src2);
 268
 269    fs_inst *MOV(fs_reg dst, fs_reg src);
 270    fs_inst *NOT(fs_reg dst, fs_reg src);
 271    fs_inst *RNDD(fs_reg dst, fs_reg src);
 272    fs_inst *RNDE(fs_reg dst, fs_reg src);
 273    fs_inst *RNDZ(fs_reg dst, fs_reg src);
 274    fs_inst *FRC(fs_reg dst, fs_reg src);
 275    fs_inst *ADD(fs_reg dst, fs_reg src0, fs_reg src1);
 276    fs_inst *MUL(fs_reg dst, fs_reg src0, fs_reg src1);
 277    fs_inst *MACH(fs_reg dst, fs_reg src0, fs_reg src1);
 278    fs_inst *MAC(fs_reg dst, fs_reg src0, fs_reg src1);
 279    fs_inst *SHL(fs_reg dst, fs_reg src0, fs_reg src1);
 280    fs_inst *SHR(fs_reg dst, fs_reg src0, fs_reg src1);
 281    fs_inst *ASR(fs_reg dst, fs_reg src0, fs_reg src1);
 282    fs_inst *AND(fs_reg dst, fs_reg src0, fs_reg src1);
 283    fs_inst *OR(fs_reg dst, fs_reg src0, fs_reg src1);
 284    fs_inst *XOR(fs_reg dst, fs_reg src0, fs_reg src1);
 285    fs_inst *IF(uint32_t predicate);
 286    fs_inst *IF(fs_reg src0, fs_reg src1, uint32_t condition);
 287    fs_inst *CMP(fs_reg dst, fs_reg src0, fs_reg src1,
 288                 uint32_t condition);
 289    fs_inst *LRP(fs_reg dst, fs_reg a, fs_reg y, fs_reg x);
 290    fs_inst *DEP_RESOLVE_MOV(int grf);
 291
 292    int type_size(const struct glsl_type *type);
 293    fs_inst *get_instruction_generating_reg(fs_inst *start,
 294                                            fs_inst *end,
 295                                            fs_reg reg);
 296
 297    exec_list VARYING_PULL_CONSTANT_LOAD(fs_reg dst, fs_reg surf_index,
 298                                         fs_reg varying_offset,
 299                                         uint32_t const_offset);
 300
 301    bool run();
 302    void setup_payload_gen4();
 303    void setup_payload_gen6();
 304    void assign_curb_setup();
 305    void calculate_urb_setup();
 306    void assign_urb_setup();
 307    bool assign_regs();
 308    void assign_regs_trivial();
 309    void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
 310                                    int first_payload_node);
 311    void setup_mrf_hack_interference(struct ra_graph *g,
 312                                     int first_mrf_hack_node);
 313    int choose_spill_reg(struct ra_graph *g);
 314    void spill_reg(int spill_reg);
 315    void split_virtual_grfs();
 316    void compact_virtual_grfs();
 317    void move_uniform_array_access_to_pull_constants();
 318    void setup_pull_constants();
 319    void calculate_live_intervals();
 320    bool opt_algebraic();
 321    bool opt_cse();
 322    bool opt_cse_local(bblock_t *block, exec_list *aeb);
 323    bool opt_copy_propagate();
 324    bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
 325    bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
 326    bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
 327                                  exec_list *acp);
 328    bool register_coalesce();
 329    bool register_coalesce_2();
 330    bool compute_to_mrf();
 331    bool dead_code_eliminate();
 332    bool dead_code_eliminate_local();
 333    bool remove_dead_constants();
 334    bool remove_duplicate_mrf_writes();
 335    bool virtual_grf_interferes(int a, int b);
 336    void schedule_instructions(bool post_reg_alloc);
 337    void insert_gen4_send_dependency_workarounds();
 338    void insert_gen4_pre_send_dependency_workarounds(fs_inst *inst);
 339    void insert_gen4_post_send_dependency_workarounds(fs_inst *inst);
 340    void fail(const char *msg, ...);
 341    void lower_uniform_pull_constant_loads();
 342
 343    void push_force_uncompressed();
 344    void pop_force_uncompressed();
 345    void push_force_sechalf();
 346    void pop_force_sechalf();
 347
 348    void emit_dummy_fs();
 349    fs_reg *emit_fragcoord_interpolation(ir_variable *ir);
 350    fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
 351                          glsl_interp_qualifier interpolation_mode,
 352                          bool is_centroid);
 353    fs_reg *emit_frontfacing_interpolation(ir_variable *ir);
 354    fs_reg *emit_general_interpolation(ir_variable *ir);
 355    void emit_interpolation_setup_gen4();
 356    void emit_interpolation_setup_gen6();
 357    fs_reg rescale_texcoord(ir_texture *ir, fs_reg coordinate,
 358                            bool is_rect, int sampler, int texunit);
 359    fs_inst *emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 360                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2);
 361    fs_inst *emit_texture_gen5(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 362                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
 363                               fs_reg sample_index);
 364    fs_inst *emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate,
 365                               fs_reg shadow_comp, fs_reg lod, fs_reg lod2,
 366                               fs_reg sample_index);
 367    fs_reg fix_math_operand(fs_reg src);
 368    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0);
 369    fs_inst *emit_math(enum opcode op, fs_reg dst, fs_reg src0, fs_reg src1);
 370    void emit_lrp(fs_reg dst, fs_reg x, fs_reg y, fs_reg a);
 371    void emit_minmax(uint32_t conditionalmod, fs_reg dst,
 372                     fs_reg src0, fs_reg src1);
 373    bool try_emit_saturate(ir_expression *ir);
 374    bool try_emit_mad(ir_expression *ir, int mul_arg);
 375    void emit_bool_to_cond_code(ir_rvalue *condition);
 376    void emit_if_gen6(ir_if *ir);
 377    void emit_unspill(fs_inst *inst, fs_reg reg, uint32_t spill_offset);
 378
 379    void emit_fragment_program_code();
 380    void setup_fp_regs();
 381    fs_reg get_fp_src_reg(const prog_src_register *src);
 382    fs_reg get_fp_dst_reg(const prog_dst_register *dst);
 383    void emit_fp_alu1(enum opcode opcode,
 384                      const struct prog_instruction *fpi,
 385                      fs_reg dst, fs_reg src);
 386    void emit_fp_alu2(enum opcode opcode,
 387                      const struct prog_instruction *fpi,
 388                      fs_reg dst, fs_reg src0, fs_reg src1);
 389    void emit_fp_scalar_write(const struct prog_instruction *fpi,
 390                              fs_reg dst, fs_reg src);
 391    void emit_fp_scalar_math(enum opcode opcode,
 392                             const struct prog_instruction *fpi,
 393                             fs_reg dst, fs_reg src);
 394
 395    void emit_fp_minmax(const struct prog_instruction *fpi,
 396                        fs_reg dst, fs_reg src0, fs_reg src1);
 397
 398    void emit_fp_sop(uint32_t conditional_mod,
 399                     const struct prog_instruction *fpi,
 400                     fs_reg dst, fs_reg src0, fs_reg src1, fs_reg one);
 401
 402    void emit_color_write(int target, int index, int first_color_mrf);
 403    void emit_fb_writes();
 404
 405    void emit_shader_time_begin();
 406    void emit_shader_time_end();
 407    void emit_shader_time_write(enum shader_time_shader_type type,
 408                                fs_reg value);
 409
 410    bool try_rewrite_rhs_to_dst(ir_assignment *ir,
 411                                fs_reg dst,
 412                                fs_reg src,
 413                                fs_inst *pre_rhs_inst,
 414                                fs_inst *last_rhs_inst);
 415    void emit_assignment_writes(fs_reg &l, fs_reg &r,
 416                                const glsl_type *type, bool predicated);
 417    void resolve_ud_negate(fs_reg *reg);
 418    void resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg);
 419
 420    fs_reg get_timestamp();
 421
 422    struct brw_reg interp_reg(int location, int channel);
 423    void setup_uniform_values(ir_variable *ir);
 424    void setup_builtin_uniform_values(ir_variable *ir);
 425    int implied_mrf_writes(fs_inst *inst);
 426
 427    void dump_instructions();
 428    void dump_instruction(fs_inst *inst);
 429
 430    struct gl_fragment_program *fp;
 431    struct brw_wm_compile *c;
 432    unsigned int sanity_param_count;
 433
 434    int param_size[MAX_UNIFORMS * 4];
 435
 436    int *virtual_grf_sizes;
 437    int virtual_grf_count;
 438    int virtual_grf_array_size;
 439    int *virtual_grf_def;
 440    int *virtual_grf_use;
 441    bool live_intervals_valid;
 442
 443    /* This is the map from UNIFORM hw_reg + reg_offset as generated by
 444     * the visitor to the packed uniform number after
 445     * remove_dead_constants() that represents the actual uploaded
 446     * uniform index.
 447     */
 448    int *params_remap;
 449
 450    struct hash_table *variable_ht;
 451    fs_reg frag_depth;
 452    fs_reg outputs[BRW_MAX_DRAW_BUFFERS];
 453    unsigned output_components[BRW_MAX_DRAW_BUFFERS];
 454    fs_reg dual_src_output;
 455    int first_non_payload_grf;
 456    /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
 457    int max_grf;
 458    int urb_setup[VARYING_SLOT_MAX];
 459
 460    fs_reg *fp_temp_regs;
 461    fs_reg *fp_input_regs;
 462
 463    /** @{ debug annotation info */
 464    const char *current_annotation;
 465    const void *base_ir;
 466    /** @} */
 467
 468    bool failed;
 469    char *fail_msg;
 470
 471    /* Result of last visit() method. */
 472    fs_reg result;
 473
 474    fs_reg pixel_x;
 475    fs_reg pixel_y;
 476    fs_reg wpos_w;
 477    fs_reg pixel_w;
 478    fs_reg delta_x[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 479    fs_reg delta_y[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
 480    fs_reg shader_start_time;
 481
 482    int grf_used;
 483
 484    const unsigned dispatch_width; /**< 8 or 16 */
 485
 486    int force_uncompressed_stack;
 487    int force_sechalf_stack;
 488 };
 489
 490 /**
 491  * The fragment shader code generator.
 492  *
 493  * Translates FS IR to actual i965 assembly code.
 494  */
 495 class fs_generator
 496 {
 497 public:
 498    fs_generator(struct brw_context *brw,
 499                 struct brw_wm_compile *c,
 500                 struct gl_shader_program *prog,
 501                 struct gl_fragment_program *fp,
 502                 bool dual_source_output);
 503    ~fs_generator();
 504
 505    const unsigned *generate_assembly(exec_list *simd8_instructions,
 506                                      exec_list *simd16_instructions,
 507                                      unsigned *assembly_size);
 508
 509 private:
 510    void generate_code(exec_list *instructions);
 511    void generate_fb_write(fs_inst *inst);
 512    void generate_pixel_xy(struct brw_reg dst, bool is_x);
 513    void generate_linterp(fs_inst *inst, struct brw_reg dst,
 514                          struct brw_reg *src);
 515    void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 516    void generate_math1_gen7(fs_inst *inst,
 517                             struct brw_reg dst,
 518                             struct brw_reg src);
 519    void generate_math2_gen7(fs_inst *inst,
 520                             struct brw_reg dst,
 521                             struct brw_reg src0,
 522                             struct brw_reg src1);
 523    void generate_math1_gen6(fs_inst *inst,
 524                             struct brw_reg dst,
 525                             struct brw_reg src);
 526    void generate_math2_gen6(fs_inst *inst,
 527                             struct brw_reg dst,
 528                             struct brw_reg src0,
 529                             struct brw_reg src1);
 530    void generate_math_gen4(fs_inst *inst,
 531                            struct brw_reg dst,
 532                            struct brw_reg src);
 533    void generate_ddx(fs_inst *inst, struct brw_reg dst, struct brw_reg src);
 534    void generate_ddy(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
 535                      bool negate_value);
 536    void generate_spill(fs_inst *inst, struct brw_reg src);
 537    void generate_unspill(fs_inst *inst, struct brw_reg dst);
 538    void generate_uniform_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 539                                             struct brw_reg index,
 540                                             struct brw_reg offset);
 541    void generate_uniform_pull_constant_load_gen7(fs_inst *inst,
 542                                                  struct brw_reg dst,
 543                                                  struct brw_reg surf_index,
 544                                                  struct brw_reg offset);
 545    void generate_varying_pull_constant_load(fs_inst *inst, struct brw_reg dst,
 546                                             struct brw_reg index,
 547                                             struct brw_reg offset);
 548    void generate_varying_pull_constant_load_gen7(fs_inst *inst,
 549                                                  struct brw_reg dst,
 550                                                  struct brw_reg index,
 551                                                  struct brw_reg offset);
 552    void generate_mov_dispatch_to_flags(fs_inst *inst);
 553    void generate_set_simd4x2_offset(fs_inst *inst,
 554                                     struct brw_reg dst,
 555                                     struct brw_reg offset);
 556    void generate_discard_jump(fs_inst *inst);
 557
 558    void generate_pack_half_2x16_split(fs_inst *inst,
 559                                       struct brw_reg dst,
 560                                       struct brw_reg x,
 561                                       struct brw_reg y);
 562    void generate_unpack_half_2x16_split(fs_inst *inst,
 563                                         struct brw_reg dst,
 564                                         struct brw_reg src);
 565
 566    void generate_shader_time_add(fs_inst *inst,
 567                                  struct brw_reg payload,
 568                                  struct brw_reg offset,
 569                                  struct brw_reg value);
 570
 571    void patch_discard_jumps_to_fb_writes();
 572
 573    struct brw_context *brw;
 574    struct intel_context *intel;
 575    struct gl_context *ctx;
 576
 577    struct brw_compile *p;
 578    struct brw_wm_compile *c;
 579
 580    struct gl_shader_program *prog;
 581    struct gl_shader *shader;
 582    const struct gl_fragment_program *fp;
 583
 584    unsigned dispatch_width; /**< 8 or 16 */
 585
 586    exec_list discard_halt_patches;
 587    bool dual_source_output;
 588    void *mem_ctx;
 589 };
 590
 591 bool brw_do_channel_expressions(struct exec_list *instructions);
 592 bool brw_do_vector_splitting(struct exec_list *instructions);
 593 bool brw_fs_precompile(struct gl_context *ctx, struct gl_shader_program *prog);