2 * Copyright © 2010 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
30 #include "brw_shader.h"
34 #include <sys/types.h>
36 #include "main/macros.h"
37 #include "main/shaderobj.h"
38 #include "main/uniforms.h"
39 #include "program/prog_parameter.h"
40 #include "program/prog_print.h"
41 #include "program/prog_optimize.h"
42 #include "program/register_allocate.h"
43 #include "program/sampler.h"
44 #include "program/hash_table.h"
45 #include "brw_context.h"
49 #include "glsl/glsl_types.h"
60 FIXED_HW_REG
, /* a struct brw_reg */
61 UNIFORM
, /* prog_data->params[reg] */
66 /* Callers of this ralloc-based new need not call delete. It's
67 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
68 static void* operator new(size_t size
, void *ctx
)
72 node
= ralloc_size(ctx
, size
);
80 memset(this, 0, sizeof(*this));
84 /** Generic unset register constructor. */
88 this->file
= BAD_FILE
;
91 /** Immediate value constructor. */
96 this->type
= BRW_REGISTER_TYPE_F
;
100 /** Immediate value constructor. */
105 this->type
= BRW_REGISTER_TYPE_D
;
109 /** Immediate value constructor. */
114 this->type
= BRW_REGISTER_TYPE_UD
;
118 /** Fixed brw_reg Immediate value constructor. */
119 fs_reg(struct brw_reg fixed_hw_reg
)
122 this->file
= FIXED_HW_REG
;
123 this->fixed_hw_reg
= fixed_hw_reg
;
124 this->type
= fixed_hw_reg
.type
;
127 fs_reg(enum register_file file
, int reg
);
128 fs_reg(enum register_file file
, int reg
, uint32_t type
);
129 fs_reg(class fs_visitor
*v
, const struct glsl_type
*type
);
131 bool equals(const fs_reg
&r
) const
133 return (file
== r
.file
&&
135 reg_offset
== r
.reg_offset
&&
137 negate
== r
.negate
&&
139 memcmp(&fixed_hw_reg
, &r
.fixed_hw_reg
,
140 sizeof(fixed_hw_reg
)) == 0 &&
145 /** Register file: ARF, GRF, MRF, IMM. */
146 enum register_file file
;
148 * Register number. For ARF/MRF, it's the hardware register. For
149 * GRF, it's a virtual register number until register allocation
153 * For virtual registers, this is a hardware register offset from
154 * the start of the register block (for example, a constant index
155 * in an array access).
158 /** Register type. BRW_REGISTER_TYPE_* */
163 struct brw_reg fixed_hw_reg
;
164 int smear
; /* -1, or a channel of the reg to smear to all channels. */
166 /** Value for file == IMM */
174 static const fs_reg reg_undef
;
175 static const fs_reg
reg_null_f(ARF
, BRW_ARF_NULL
, BRW_REGISTER_TYPE_F
);
176 static const fs_reg
reg_null_d(ARF
, BRW_ARF_NULL
, BRW_REGISTER_TYPE_D
);
178 class fs_inst
: public exec_node
{
180 /* Callers of this ralloc-based new need not call delete. It's
181 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
182 static void* operator new(size_t size
, void *ctx
)
186 node
= rzalloc_size(ctx
, size
);
187 assert(node
!= NULL
);
194 memset(this, 0, sizeof(*this));
195 this->opcode
= BRW_OPCODE_NOP
;
196 this->conditional_mod
= BRW_CONDITIONAL_NONE
;
198 this->dst
= reg_undef
;
199 this->src
[0] = reg_undef
;
200 this->src
[1] = reg_undef
;
201 this->src
[2] = reg_undef
;
209 fs_inst(enum opcode opcode
)
212 this->opcode
= opcode
;
215 fs_inst(enum opcode opcode
, fs_reg dst
)
218 this->opcode
= opcode
;
222 assert(dst
.reg_offset
>= 0);
225 fs_inst(enum opcode opcode
, fs_reg dst
, fs_reg src0
)
228 this->opcode
= opcode
;
233 assert(dst
.reg_offset
>= 0);
234 if (src
[0].file
== GRF
)
235 assert(src
[0].reg_offset
>= 0);
238 fs_inst(enum opcode opcode
, fs_reg dst
, fs_reg src0
, fs_reg src1
)
241 this->opcode
= opcode
;
247 assert(dst
.reg_offset
>= 0);
248 if (src
[0].file
== GRF
)
249 assert(src
[0].reg_offset
>= 0);
250 if (src
[1].file
== GRF
)
251 assert(src
[1].reg_offset
>= 0);
254 fs_inst(enum opcode opcode
, fs_reg dst
, fs_reg src0
, fs_reg src1
, fs_reg src2
)
257 this->opcode
= opcode
;
264 assert(dst
.reg_offset
>= 0);
265 if (src
[0].file
== GRF
)
266 assert(src
[0].reg_offset
>= 0);
267 if (src
[1].file
== GRF
)
268 assert(src
[1].reg_offset
>= 0);
269 if (src
[2].file
== GRF
)
270 assert(src
[2].reg_offset
>= 0);
273 bool equals(fs_inst
*inst
)
275 return (opcode
== inst
->opcode
&&
276 dst
.equals(inst
->dst
) &&
277 src
[0].equals(inst
->src
[0]) &&
278 src
[1].equals(inst
->src
[1]) &&
279 src
[2].equals(inst
->src
[2]) &&
280 saturate
== inst
->saturate
&&
281 predicated
== inst
->predicated
&&
282 conditional_mod
== inst
->conditional_mod
&&
283 mlen
== inst
->mlen
&&
284 base_mrf
== inst
->base_mrf
&&
285 sampler
== inst
->sampler
&&
286 target
== inst
->target
&&
288 header_present
== inst
->header_present
&&
289 shadow_compare
== inst
->shadow_compare
&&
290 offset
== inst
->offset
);
298 /* The SINCOS and INT_DIV_QUOTIENT_AND_REMAINDER math functions return 2,
299 * but we don't currently use them...nor do we have an opcode for them.
307 return (opcode
== SHADER_OPCODE_TEX
||
308 opcode
== FS_OPCODE_TXB
||
309 opcode
== SHADER_OPCODE_TXD
||
310 opcode
== SHADER_OPCODE_TXF
||
311 opcode
== SHADER_OPCODE_TXL
||
312 opcode
== SHADER_OPCODE_TXS
);
317 return (opcode
== SHADER_OPCODE_RCP
||
318 opcode
== SHADER_OPCODE_RSQ
||
319 opcode
== SHADER_OPCODE_SQRT
||
320 opcode
== SHADER_OPCODE_EXP2
||
321 opcode
== SHADER_OPCODE_LOG2
||
322 opcode
== SHADER_OPCODE_SIN
||
323 opcode
== SHADER_OPCODE_COS
||
324 opcode
== SHADER_OPCODE_INT_QUOTIENT
||
325 opcode
== SHADER_OPCODE_INT_REMAINDER
||
326 opcode
== SHADER_OPCODE_POW
);
329 enum opcode opcode
; /* BRW_OPCODE_* or FS_OPCODE_* */
334 bool predicate_inverse
;
335 int conditional_mod
; /**< BRW_CONDITIONAL_* */
337 int mlen
; /**< SEND message length */
338 int base_mrf
; /**< First MRF in the SEND message, if mlen is nonzero. */
340 int target
; /**< MRT target. */
344 bool force_uncompressed
;
346 uint32_t offset
; /* spill/unspill offset */
349 * Annotation for the generated IR. One of the two can be set.
352 const char *annotation
;
356 class fs_visitor
: public ir_visitor
360 fs_visitor(struct brw_wm_compile
*c
, struct gl_shader_program
*prog
,
361 struct brw_shader
*shader
)
366 this->fp
= (struct gl_fragment_program
*)
367 prog
->_LinkedShaders
[MESA_SHADER_FRAGMENT
]->Program
;
369 this->intel
= &brw
->intel
;
370 this->ctx
= &intel
->ctx
;
371 this->mem_ctx
= ralloc_context(NULL
);
372 this->shader
= shader
;
373 this->failed
= false;
374 this->variable_ht
= hash_table_ctor(0,
375 hash_table_pointer_hash
,
376 hash_table_pointer_compare
);
378 /* There's a question that appears to be left open in the spec:
379 * How do implicit dst conversions interact with the CMP
380 * instruction or conditional mods? On gen6, the instruction:
382 * CMP null<d> src0<f> src1<f>
384 * will do src1 - src0 and compare that result as if it was an
385 * integer. On gen4, it will do src1 - src0 as float, convert
386 * the result to int, and compare as int. In between, it
387 * appears that it does src1 - src0 and does the compare in the
388 * execution type so dst type doesn't matter.
390 if (this->intel
->gen
> 4)
391 this->reg_null_cmp
= reg_null_d
;
393 this->reg_null_cmp
= reg_null_f
;
395 this->frag_depth
= NULL
;
396 memset(this->outputs
, 0, sizeof(this->outputs
));
397 this->first_non_payload_grf
= 0;
398 this->max_grf
= intel
->gen
>= 7 ? GEN7_MRF_HACK_START
: BRW_MAX_GRF
;
400 this->current_annotation
= NULL
;
401 this->base_ir
= NULL
;
403 this->virtual_grf_sizes
= NULL
;
404 this->virtual_grf_next
= 0;
405 this->virtual_grf_array_size
= 0;
406 this->virtual_grf_def
= NULL
;
407 this->virtual_grf_use
= NULL
;
408 this->live_intervals_valid
= false;
410 this->kill_emitted
= false;
411 this->force_uncompressed_stack
= 0;
412 this->force_sechalf_stack
= 0;
417 ralloc_free(this->mem_ctx
);
418 hash_table_dtor(this->variable_ht
);
421 fs_reg
*variable_storage(ir_variable
*var
);
422 int virtual_grf_alloc(int size
);
423 void import_uniforms(fs_visitor
*v
);
425 void visit(ir_variable
*ir
);
426 void visit(ir_assignment
*ir
);
427 void visit(ir_dereference_variable
*ir
);
428 void visit(ir_dereference_record
*ir
);
429 void visit(ir_dereference_array
*ir
);
430 void visit(ir_expression
*ir
);
431 void visit(ir_texture
*ir
);
432 void visit(ir_if
*ir
);
433 void visit(ir_constant
*ir
);
434 void visit(ir_swizzle
*ir
);
435 void visit(ir_return
*ir
);
436 void visit(ir_loop
*ir
);
437 void visit(ir_loop_jump
*ir
);
438 void visit(ir_discard
*ir
);
439 void visit(ir_call
*ir
);
440 void visit(ir_function
*ir
);
441 void visit(ir_function_signature
*ir
);
443 void swizzle_result(ir_texture
*ir
, fs_reg orig_val
, int sampler
);
445 fs_inst
*emit(fs_inst inst
);
447 fs_inst
*emit(enum opcode opcode
)
449 return emit(fs_inst(opcode
));
452 fs_inst
*emit(enum opcode opcode
, fs_reg dst
)
454 return emit(fs_inst(opcode
, dst
));
457 fs_inst
*emit(enum opcode opcode
, fs_reg dst
, fs_reg src0
)
459 return emit(fs_inst(opcode
, dst
, src0
));
462 fs_inst
*emit(enum opcode opcode
, fs_reg dst
, fs_reg src0
, fs_reg src1
)
464 return emit(fs_inst(opcode
, dst
, src0
, src1
));
467 fs_inst
*emit(enum opcode opcode
, fs_reg dst
,
468 fs_reg src0
, fs_reg src1
, fs_reg src2
)
470 return emit(fs_inst(opcode
, dst
, src0
, src1
, src2
));
473 int type_size(const struct glsl_type
*type
);
474 fs_inst
*get_instruction_generating_reg(fs_inst
*start
,
479 void setup_paramvalues_refs();
480 void assign_curb_setup();
481 void calculate_urb_setup();
482 void assign_urb_setup();
484 void assign_regs_trivial();
485 int choose_spill_reg(struct ra_graph
*g
);
486 void spill_reg(int spill_reg
);
487 void split_virtual_grfs();
488 void setup_pull_constants();
489 void calculate_live_intervals();
490 bool propagate_constants();
491 bool opt_algebraic();
493 bool opt_cse_local(fs_bblock
*block
, exec_list
*aeb
);
494 bool opt_copy_propagate();
495 bool opt_copy_propagate_local(void *mem_ctx
, fs_bblock
*block
,
497 bool register_coalesce();
498 bool register_coalesce_2();
499 bool compute_to_mrf();
500 bool dead_code_eliminate();
501 bool remove_dead_constants();
502 bool remove_duplicate_mrf_writes();
503 bool virtual_grf_interferes(int a
, int b
);
504 void schedule_instructions();
505 void fail(const char *msg
, ...);
507 void push_force_uncompressed();
508 void pop_force_uncompressed();
509 void push_force_sechalf();
510 void pop_force_sechalf();
512 void generate_code();
513 void generate_fb_write(fs_inst
*inst
);
514 void generate_pixel_xy(struct brw_reg dst
, bool is_x
);
515 void generate_linterp(fs_inst
*inst
, struct brw_reg dst
,
516 struct brw_reg
*src
);
517 void generate_tex(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg src
);
518 void generate_math1_gen7(fs_inst
*inst
,
521 void generate_math2_gen7(fs_inst
*inst
,
524 struct brw_reg src1
);
525 void generate_math1_gen6(fs_inst
*inst
,
528 void generate_math2_gen6(fs_inst
*inst
,
531 struct brw_reg src1
);
532 void generate_math_gen4(fs_inst
*inst
,
535 void generate_discard(fs_inst
*inst
);
536 void generate_ddx(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg src
);
537 void generate_ddy(fs_inst
*inst
, struct brw_reg dst
, struct brw_reg src
);
538 void generate_spill(fs_inst
*inst
, struct brw_reg src
);
539 void generate_unspill(fs_inst
*inst
, struct brw_reg dst
);
540 void generate_pull_constant_load(fs_inst
*inst
, struct brw_reg dst
);
542 void emit_dummy_fs();
543 fs_reg
*emit_fragcoord_interpolation(ir_variable
*ir
);
544 fs_reg
*emit_frontfacing_interpolation(ir_variable
*ir
);
545 fs_reg
*emit_general_interpolation(ir_variable
*ir
);
546 void emit_interpolation_setup_gen4();
547 void emit_interpolation_setup_gen6();
548 fs_inst
*emit_texture_gen4(ir_texture
*ir
, fs_reg dst
, fs_reg coordinate
,
550 fs_inst
*emit_texture_gen5(ir_texture
*ir
, fs_reg dst
, fs_reg coordinate
,
552 fs_inst
*emit_texture_gen7(ir_texture
*ir
, fs_reg dst
, fs_reg coordinate
,
554 fs_inst
*emit_math(enum opcode op
, fs_reg dst
, fs_reg src0
);
555 fs_inst
*emit_math(enum opcode op
, fs_reg dst
, fs_reg src0
, fs_reg src1
);
556 bool try_emit_saturate(ir_expression
*ir
);
557 bool try_emit_mad(ir_expression
*ir
, int mul_arg
);
558 void emit_bool_to_cond_code(ir_rvalue
*condition
);
559 void emit_if_gen6(ir_if
*ir
);
560 void emit_unspill(fs_inst
*inst
, fs_reg reg
, uint32_t spill_offset
);
562 void emit_color_write(int target
, int index
, int first_color_mrf
);
563 void emit_fb_writes();
564 bool try_rewrite_rhs_to_dst(ir_assignment
*ir
,
567 fs_inst
*pre_rhs_inst
,
568 fs_inst
*last_rhs_inst
);
569 void emit_assignment_writes(fs_reg
&l
, fs_reg
&r
,
570 const glsl_type
*type
, bool predicated
);
571 void resolve_ud_negate(fs_reg
*reg
);
572 void resolve_bool_comparison(ir_rvalue
*rvalue
, fs_reg
*reg
);
574 struct brw_reg
interp_reg(int location
, int channel
);
575 int setup_uniform_values(int loc
, const glsl_type
*type
);
576 void setup_builtin_uniform_values(ir_variable
*ir
);
577 int implied_mrf_writes(fs_inst
*inst
);
579 struct brw_context
*brw
;
580 const struct gl_fragment_program
*fp
;
581 struct intel_context
*intel
;
582 struct gl_context
*ctx
;
583 struct brw_wm_compile
*c
;
584 struct brw_compile
*p
;
585 struct brw_shader
*shader
;
586 struct gl_shader_program
*prog
;
588 exec_list instructions
;
590 /* Delayed setup of c->prog_data.params[] due to realloc of
591 * ParamValues[] during compile.
593 int param_index
[MAX_UNIFORMS
* 4];
594 int param_offset
[MAX_UNIFORMS
* 4];
596 int *virtual_grf_sizes
;
597 int virtual_grf_next
;
598 int virtual_grf_array_size
;
599 int *virtual_grf_def
;
600 int *virtual_grf_use
;
601 bool live_intervals_valid
;
603 /* This is the map from UNIFORM hw_reg + reg_offset as generated by
604 * the visitor to the packed uniform number after
605 * remove_dead_constants() that represents the actual uploaded
610 struct hash_table
*variable_ht
;
611 ir_variable
*frag_depth
;
612 fs_reg outputs
[BRW_MAX_DRAW_BUFFERS
];
613 int first_non_payload_grf
;
615 int urb_setup
[FRAG_ATTRIB_MAX
];
618 /** @{ debug annotation info */
619 const char *current_annotation
;
620 ir_instruction
*base_ir
;
626 /* Result of last visit() method. */
633 fs_reg delta_x
[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT
];
634 fs_reg delta_y
[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT
];
639 int force_uncompressed_stack
;
640 int force_sechalf_stack
;
642 class fs_bblock
*bblock
;
645 bool brw_do_channel_expressions(struct exec_list
*instructions
);
646 bool brw_do_vector_splitting(struct exec_list
*instructions
);
647 bool brw_fs_precompile(struct gl_context
*ctx
, struct gl_shader_program
*prog
);