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25 * \file brw_wm_channel_expressions.cpp
27 * Breaks vector operations down into operations on each component.
29 * The 965 fragment shader receives 8 or 16 pixels at a time, so each
30 * channel of a vector is laid out as 1 or 2 8-float registers. Each
31 * ALU operation operates on one of those channel registers. As a
32 * result, there is no value to the 965 fragment shader in tracking
33 * "vector" expressions in the sense of GLSL fragment shaders, when
34 * doing a channel at a time may help in constant folding, algebraic
35 * simplification, and reducing the liveness of channel registers.
37 * The exception to the desire to break everything down to floats is
38 * texturing. The texture sampler returns a writemasked masked
39 * 4/8-register sequence containing the texture values. We don't want
40 * to dispatch to the sampler separately for each channel we need, so
41 * we do retain the vector types in that case.
45 #include "main/core.h"
49 #include "glsl/ir_expression_flattening.h"
50 #include "glsl/glsl_types.h"
52 class ir_channel_expressions_visitor
: public ir_hierarchical_visitor
{
54 ir_channel_expressions_visitor()
56 this->progress
= false;
60 ir_visitor_status
visit_leave(ir_assignment
*);
62 ir_rvalue
*get_element(ir_variable
*var
, unsigned int element
);
63 void assign(ir_assignment
*ir
, int elem
, ir_rvalue
*val
);
70 channel_expressions_predicate(ir_instruction
*ir
)
72 ir_expression
*expr
= ir
->as_expression();
78 switch (expr
->operation
) {
79 /* these opcodes need to act on the whole vector,
80 * just like texturing.
82 case ir_unop_interpolate_at_centroid
:
83 case ir_binop_interpolate_at_offset
:
84 case ir_binop_interpolate_at_sample
:
90 for (i
= 0; i
< expr
->get_num_operands(); i
++) {
91 if (expr
->operands
[i
]->type
->is_vector())
99 brw_do_channel_expressions(exec_list
*instructions
)
101 ir_channel_expressions_visitor v
;
103 /* Pull out any matrix expression to a separate assignment to a
104 * temp. This will make our handling of the breakdown to
105 * operations on the matrix's vector components much easier.
107 do_expression_flattening(instructions
, channel_expressions_predicate
);
109 visit_list_elements(&v
, instructions
);
115 ir_channel_expressions_visitor::get_element(ir_variable
*var
, unsigned int elem
)
117 ir_dereference
*deref
;
119 if (var
->type
->is_scalar())
120 return new(mem_ctx
) ir_dereference_variable(var
);
122 assert(elem
< var
->type
->components());
123 deref
= new(mem_ctx
) ir_dereference_variable(var
);
124 return new(mem_ctx
) ir_swizzle(deref
, elem
, 0, 0, 0, 1);
128 ir_channel_expressions_visitor::assign(ir_assignment
*ir
, int elem
, ir_rvalue
*val
)
130 ir_dereference
*lhs
= ir
->lhs
->clone(mem_ctx
, NULL
);
131 ir_assignment
*assign
;
133 /* This assign-of-expression should have been generated by the
134 * expression flattening visitor (since we never short circit to
135 * not flatten, even for plain assignments of variables), so the
136 * writemask is always full.
138 assert(ir
->write_mask
== (1 << ir
->lhs
->type
->components()) - 1);
140 assign
= new(mem_ctx
) ir_assignment(lhs
, val
, NULL
, (1 << elem
));
141 ir
->insert_before(assign
);
145 ir_channel_expressions_visitor::visit_leave(ir_assignment
*ir
)
147 ir_expression
*expr
= ir
->rhs
->as_expression();
148 bool found_vector
= false;
149 unsigned int i
, vector_elements
= 1;
150 ir_variable
*op_var
[3];
153 return visit_continue
;
156 this->mem_ctx
= ralloc_parent(ir
);
158 for (i
= 0; i
< expr
->get_num_operands(); i
++) {
159 if (expr
->operands
[i
]->type
->is_vector()) {
161 vector_elements
= expr
->operands
[i
]->type
->vector_elements
;
166 return visit_continue
;
168 switch (expr
->operation
) {
169 case ir_unop_interpolate_at_centroid
:
170 case ir_binop_interpolate_at_offset
:
171 case ir_binop_interpolate_at_sample
:
172 return visit_continue
;
178 /* Store the expression operands in temps so we can use them
181 for (i
= 0; i
< expr
->get_num_operands(); i
++) {
182 ir_assignment
*assign
;
183 ir_dereference
*deref
;
185 assert(!expr
->operands
[i
]->type
->is_matrix());
187 op_var
[i
] = new(mem_ctx
) ir_variable(expr
->operands
[i
]->type
,
188 "channel_expressions",
190 ir
->insert_before(op_var
[i
]);
192 deref
= new(mem_ctx
) ir_dereference_variable(op_var
[i
]);
193 assign
= new(mem_ctx
) ir_assignment(deref
,
196 ir
->insert_before(assign
);
199 const glsl_type
*element_type
= glsl_type::get_instance(ir
->lhs
->type
->base_type
,
202 /* OK, time to break down this vector operation. */
203 switch (expr
->operation
) {
204 case ir_unop_bit_not
:
205 case ir_unop_logic_not
:
216 case ir_unop_bitcast_i2f
:
217 case ir_unop_bitcast_f2i
:
218 case ir_unop_bitcast_f2u
:
219 case ir_unop_bitcast_u2f
:
234 case ir_unop_round_even
:
237 case ir_unop_sin_reduced
:
238 case ir_unop_cos_reduced
:
240 case ir_unop_dFdx_coarse
:
241 case ir_unop_dFdx_fine
:
243 case ir_unop_dFdy_coarse
:
244 case ir_unop_dFdy_fine
:
245 case ir_unop_bitfield_reverse
:
246 case ir_unop_bit_count
:
247 case ir_unop_find_msb
:
248 case ir_unop_find_lsb
:
249 case ir_unop_saturate
:
250 for (i
= 0; i
< vector_elements
; i
++) {
251 ir_rvalue
*op0
= get_element(op_var
[0], i
);
253 assign(ir
, i
, new(mem_ctx
) ir_expression(expr
->operation
,
263 case ir_binop_imul_high
:
266 case ir_binop_borrow
:
271 case ir_binop_lshift
:
272 case ir_binop_rshift
:
273 case ir_binop_bit_and
:
274 case ir_binop_bit_xor
:
275 case ir_binop_bit_or
:
277 case ir_binop_greater
:
278 case ir_binop_lequal
:
279 case ir_binop_gequal
:
281 case ir_binop_nequal
:
282 for (i
= 0; i
< vector_elements
; i
++) {
283 ir_rvalue
*op0
= get_element(op_var
[0], i
);
284 ir_rvalue
*op1
= get_element(op_var
[1], i
);
286 assign(ir
, i
, new(mem_ctx
) ir_expression(expr
->operation
,
295 temp
= new(mem_ctx
) ir_expression(ir_binop_logic_or
,
297 get_element(op_var
[0], 0),
298 get_element(op_var
[0], 1));
300 for (i
= 2; i
< vector_elements
; i
++) {
301 temp
= new(mem_ctx
) ir_expression(ir_binop_logic_or
,
303 get_element(op_var
[0], i
),
311 ir_expression
*last
= NULL
;
312 for (i
= 0; i
< vector_elements
; i
++) {
313 ir_rvalue
*op0
= get_element(op_var
[0], i
);
314 ir_rvalue
*op1
= get_element(op_var
[1], i
);
317 temp
= new(mem_ctx
) ir_expression(ir_binop_mul
,
322 last
= new(mem_ctx
) ir_expression(ir_binop_add
,
334 case ir_binop_logic_and
:
335 case ir_binop_logic_xor
:
336 case ir_binop_logic_or
:
338 fprintf(stderr
, "\n");
339 unreachable("not reached: expression operates on scalars only");
340 case ir_binop_all_equal
:
341 case ir_binop_any_nequal
: {
342 ir_expression
*last
= NULL
;
343 for (i
= 0; i
< vector_elements
; i
++) {
344 ir_rvalue
*op0
= get_element(op_var
[0], i
);
345 ir_rvalue
*op1
= get_element(op_var
[1], i
);
347 ir_expression_operation join
;
349 if (expr
->operation
== ir_binop_all_equal
)
350 join
= ir_binop_logic_and
;
352 join
= ir_binop_logic_or
;
354 temp
= new(mem_ctx
) ir_expression(expr
->operation
,
359 last
= new(mem_ctx
) ir_expression(join
,
371 unreachable("noise should have been broken down to function call");
374 /* Does not need to be scalarized, since its result will be identical
377 ir_rvalue
*op0
= get_element(op_var
[0], 0);
378 ir_rvalue
*op1
= get_element(op_var
[1], 0);
380 assign(ir
, 0, new(mem_ctx
) ir_expression(expr
->operation
,
387 case ir_binop_ubo_load
:
388 unreachable("not yet supported");
393 case ir_triop_bitfield_extract
:
394 for (i
= 0; i
< vector_elements
; i
++) {
395 ir_rvalue
*op0
= get_element(op_var
[0], i
);
396 ir_rvalue
*op1
= get_element(op_var
[1], i
);
397 ir_rvalue
*op2
= get_element(op_var
[2], i
);
399 assign(ir
, i
, new(mem_ctx
) ir_expression(expr
->operation
,
408 /* Only a single BFM is needed for multiple BFIs. */
409 ir_rvalue
*op0
= get_element(op_var
[0], 0);
411 for (i
= 0; i
< vector_elements
; i
++) {
412 ir_rvalue
*op1
= get_element(op_var
[1], i
);
413 ir_rvalue
*op2
= get_element(op_var
[2], i
);
415 assign(ir
, i
, new(mem_ctx
) ir_expression(expr
->operation
,
417 op0
->clone(mem_ctx
, NULL
),
424 case ir_unop_pack_snorm_2x16
:
425 case ir_unop_pack_snorm_4x8
:
426 case ir_unop_pack_unorm_2x16
:
427 case ir_unop_pack_unorm_4x8
:
428 case ir_unop_pack_half_2x16
:
429 case ir_unop_unpack_snorm_2x16
:
430 case ir_unop_unpack_snorm_4x8
:
431 case ir_unop_unpack_unorm_2x16
:
432 case ir_unop_unpack_unorm_4x8
:
433 case ir_unop_unpack_half_2x16
:
435 case ir_binop_vector_extract
:
436 case ir_triop_vector_insert
:
437 case ir_quadop_bitfield_insert
:
438 case ir_quadop_vector
:
439 unreachable("should have been lowered");
441 case ir_unop_unpack_half_2x16_split_x
:
442 case ir_unop_unpack_half_2x16_split_y
:
443 case ir_binop_pack_half_2x16_split
:
444 case ir_unop_interpolate_at_centroid
:
445 case ir_binop_interpolate_at_offset
:
446 case ir_binop_interpolate_at_sample
:
447 unreachable("not reached: expression operates on scalars only");
451 this->progress
= true;
453 return visit_continue
;