i965: Move pre-draw resolve buffers to dd::UpdateState
[mesa.git] / src / mesa / drivers / dri / i965 / brw_fs_channel_expressions.cpp
1 /*
2 * Copyright © 2010 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24 /**
25 * \file brw_wm_channel_expressions.cpp
26 *
27 * Breaks vector operations down into operations on each component.
28 *
29 * The 965 fragment shader receives 8 or 16 pixels at a time, so each
30 * channel of a vector is laid out as 1 or 2 8-float registers. Each
31 * ALU operation operates on one of those channel registers. As a
32 * result, there is no value to the 965 fragment shader in tracking
33 * "vector" expressions in the sense of GLSL fragment shaders, when
34 * doing a channel at a time may help in constant folding, algebraic
35 * simplification, and reducing the liveness of channel registers.
36 *
37 * The exception to the desire to break everything down to floats is
38 * texturing. The texture sampler returns a writemasked masked
39 * 4/8-register sequence containing the texture values. We don't want
40 * to dispatch to the sampler separately for each channel we need, so
41 * we do retain the vector types in that case.
42 */
43
44 extern "C" {
45 #include "main/core.h"
46 #include "brw_wm.h"
47 }
48 #include "glsl/ir.h"
49 #include "glsl/ir_expression_flattening.h"
50 #include "glsl/glsl_types.h"
51
52 class ir_channel_expressions_visitor : public ir_hierarchical_visitor {
53 public:
54 ir_channel_expressions_visitor()
55 {
56 this->progress = false;
57 this->mem_ctx = NULL;
58 }
59
60 ir_visitor_status visit_leave(ir_assignment *);
61
62 ir_rvalue *get_element(ir_variable *var, unsigned int element);
63 void assign(ir_assignment *ir, int elem, ir_rvalue *val);
64
65 bool progress;
66 void *mem_ctx;
67 };
68
69 static bool
70 channel_expressions_predicate(ir_instruction *ir)
71 {
72 ir_expression *expr = ir->as_expression();
73 unsigned int i;
74
75 if (!expr)
76 return false;
77
78 switch (expr->operation) {
79 /* these opcodes need to act on the whole vector,
80 * just like texturing.
81 */
82 case ir_unop_interpolate_at_centroid:
83 case ir_binop_interpolate_at_offset:
84 case ir_binop_interpolate_at_sample:
85 return false;
86 default:
87 break;
88 }
89
90 for (i = 0; i < expr->get_num_operands(); i++) {
91 if (expr->operands[i]->type->is_vector())
92 return true;
93 }
94
95 return false;
96 }
97
98 bool
99 brw_do_channel_expressions(exec_list *instructions)
100 {
101 ir_channel_expressions_visitor v;
102
103 /* Pull out any matrix expression to a separate assignment to a
104 * temp. This will make our handling of the breakdown to
105 * operations on the matrix's vector components much easier.
106 */
107 do_expression_flattening(instructions, channel_expressions_predicate);
108
109 visit_list_elements(&v, instructions);
110
111 return v.progress;
112 }
113
114 ir_rvalue *
115 ir_channel_expressions_visitor::get_element(ir_variable *var, unsigned int elem)
116 {
117 ir_dereference *deref;
118
119 if (var->type->is_scalar())
120 return new(mem_ctx) ir_dereference_variable(var);
121
122 assert(elem < var->type->components());
123 deref = new(mem_ctx) ir_dereference_variable(var);
124 return new(mem_ctx) ir_swizzle(deref, elem, 0, 0, 0, 1);
125 }
126
127 void
128 ir_channel_expressions_visitor::assign(ir_assignment *ir, int elem, ir_rvalue *val)
129 {
130 ir_dereference *lhs = ir->lhs->clone(mem_ctx, NULL);
131 ir_assignment *assign;
132
133 /* This assign-of-expression should have been generated by the
134 * expression flattening visitor (since we never short circit to
135 * not flatten, even for plain assignments of variables), so the
136 * writemask is always full.
137 */
138 assert(ir->write_mask == (1 << ir->lhs->type->components()) - 1);
139
140 assign = new(mem_ctx) ir_assignment(lhs, val, NULL, (1 << elem));
141 ir->insert_before(assign);
142 }
143
144 ir_visitor_status
145 ir_channel_expressions_visitor::visit_leave(ir_assignment *ir)
146 {
147 ir_expression *expr = ir->rhs->as_expression();
148 bool found_vector = false;
149 unsigned int i, vector_elements = 1;
150 ir_variable *op_var[3];
151
152 if (!expr)
153 return visit_continue;
154
155 if (!this->mem_ctx)
156 this->mem_ctx = ralloc_parent(ir);
157
158 for (i = 0; i < expr->get_num_operands(); i++) {
159 if (expr->operands[i]->type->is_vector()) {
160 found_vector = true;
161 vector_elements = expr->operands[i]->type->vector_elements;
162 break;
163 }
164 }
165 if (!found_vector)
166 return visit_continue;
167
168 switch (expr->operation) {
169 case ir_unop_interpolate_at_centroid:
170 case ir_binop_interpolate_at_offset:
171 case ir_binop_interpolate_at_sample:
172 return visit_continue;
173
174 default:
175 break;
176 }
177
178 /* Store the expression operands in temps so we can use them
179 * multiple times.
180 */
181 for (i = 0; i < expr->get_num_operands(); i++) {
182 ir_assignment *assign;
183 ir_dereference *deref;
184
185 assert(!expr->operands[i]->type->is_matrix());
186
187 op_var[i] = new(mem_ctx) ir_variable(expr->operands[i]->type,
188 "channel_expressions",
189 ir_var_temporary);
190 ir->insert_before(op_var[i]);
191
192 deref = new(mem_ctx) ir_dereference_variable(op_var[i]);
193 assign = new(mem_ctx) ir_assignment(deref,
194 expr->operands[i],
195 NULL);
196 ir->insert_before(assign);
197 }
198
199 const glsl_type *element_type = glsl_type::get_instance(ir->lhs->type->base_type,
200 1, 1);
201
202 /* OK, time to break down this vector operation. */
203 switch (expr->operation) {
204 case ir_unop_bit_not:
205 case ir_unop_logic_not:
206 case ir_unop_neg:
207 case ir_unop_abs:
208 case ir_unop_sign:
209 case ir_unop_rcp:
210 case ir_unop_rsq:
211 case ir_unop_sqrt:
212 case ir_unop_exp:
213 case ir_unop_log:
214 case ir_unop_exp2:
215 case ir_unop_log2:
216 case ir_unop_bitcast_i2f:
217 case ir_unop_bitcast_f2i:
218 case ir_unop_bitcast_f2u:
219 case ir_unop_bitcast_u2f:
220 case ir_unop_i2u:
221 case ir_unop_u2i:
222 case ir_unop_f2i:
223 case ir_unop_f2u:
224 case ir_unop_i2f:
225 case ir_unop_f2b:
226 case ir_unop_b2f:
227 case ir_unop_i2b:
228 case ir_unop_b2i:
229 case ir_unop_u2f:
230 case ir_unop_trunc:
231 case ir_unop_ceil:
232 case ir_unop_floor:
233 case ir_unop_fract:
234 case ir_unop_round_even:
235 case ir_unop_sin:
236 case ir_unop_cos:
237 case ir_unop_sin_reduced:
238 case ir_unop_cos_reduced:
239 case ir_unop_dFdx:
240 case ir_unop_dFdx_coarse:
241 case ir_unop_dFdx_fine:
242 case ir_unop_dFdy:
243 case ir_unop_dFdy_coarse:
244 case ir_unop_dFdy_fine:
245 case ir_unop_bitfield_reverse:
246 case ir_unop_bit_count:
247 case ir_unop_find_msb:
248 case ir_unop_find_lsb:
249 for (i = 0; i < vector_elements; i++) {
250 ir_rvalue *op0 = get_element(op_var[0], i);
251
252 assign(ir, i, new(mem_ctx) ir_expression(expr->operation,
253 element_type,
254 op0,
255 NULL));
256 }
257 break;
258
259 case ir_binop_add:
260 case ir_binop_sub:
261 case ir_binop_mul:
262 case ir_binop_imul_high:
263 case ir_binop_div:
264 case ir_binop_carry:
265 case ir_binop_borrow:
266 case ir_binop_mod:
267 case ir_binop_min:
268 case ir_binop_max:
269 case ir_binop_pow:
270 case ir_binop_lshift:
271 case ir_binop_rshift:
272 case ir_binop_bit_and:
273 case ir_binop_bit_xor:
274 case ir_binop_bit_or:
275 case ir_binop_less:
276 case ir_binop_greater:
277 case ir_binop_lequal:
278 case ir_binop_gequal:
279 case ir_binop_equal:
280 case ir_binop_nequal:
281 for (i = 0; i < vector_elements; i++) {
282 ir_rvalue *op0 = get_element(op_var[0], i);
283 ir_rvalue *op1 = get_element(op_var[1], i);
284
285 assign(ir, i, new(mem_ctx) ir_expression(expr->operation,
286 element_type,
287 op0,
288 op1));
289 }
290 break;
291
292 case ir_unop_any: {
293 ir_expression *temp;
294 temp = new(mem_ctx) ir_expression(ir_binop_logic_or,
295 element_type,
296 get_element(op_var[0], 0),
297 get_element(op_var[0], 1));
298
299 for (i = 2; i < vector_elements; i++) {
300 temp = new(mem_ctx) ir_expression(ir_binop_logic_or,
301 element_type,
302 get_element(op_var[0], i),
303 temp);
304 }
305 assign(ir, 0, temp);
306 break;
307 }
308
309 case ir_binop_dot: {
310 ir_expression *last = NULL;
311 for (i = 0; i < vector_elements; i++) {
312 ir_rvalue *op0 = get_element(op_var[0], i);
313 ir_rvalue *op1 = get_element(op_var[1], i);
314 ir_expression *temp;
315
316 temp = new(mem_ctx) ir_expression(ir_binop_mul,
317 element_type,
318 op0,
319 op1);
320 if (last) {
321 last = new(mem_ctx) ir_expression(ir_binop_add,
322 element_type,
323 temp,
324 last);
325 } else {
326 last = temp;
327 }
328 }
329 assign(ir, 0, last);
330 break;
331 }
332
333 case ir_binop_logic_and:
334 case ir_binop_logic_xor:
335 case ir_binop_logic_or:
336 ir->fprint(stderr);
337 fprintf(stderr, "\n");
338 unreachable("not reached: expression operates on scalars only");
339 case ir_binop_all_equal:
340 case ir_binop_any_nequal: {
341 ir_expression *last = NULL;
342 for (i = 0; i < vector_elements; i++) {
343 ir_rvalue *op0 = get_element(op_var[0], i);
344 ir_rvalue *op1 = get_element(op_var[1], i);
345 ir_expression *temp;
346 ir_expression_operation join;
347
348 if (expr->operation == ir_binop_all_equal)
349 join = ir_binop_logic_and;
350 else
351 join = ir_binop_logic_or;
352
353 temp = new(mem_ctx) ir_expression(expr->operation,
354 element_type,
355 op0,
356 op1);
357 if (last) {
358 last = new(mem_ctx) ir_expression(join,
359 element_type,
360 temp,
361 last);
362 } else {
363 last = temp;
364 }
365 }
366 assign(ir, 0, last);
367 break;
368 }
369 case ir_unop_noise:
370 unreachable("noise should have been broken down to function call");
371
372 case ir_binop_bfm: {
373 /* Does not need to be scalarized, since its result will be identical
374 * for all channels.
375 */
376 ir_rvalue *op0 = get_element(op_var[0], 0);
377 ir_rvalue *op1 = get_element(op_var[1], 0);
378
379 assign(ir, 0, new(mem_ctx) ir_expression(expr->operation,
380 element_type,
381 op0,
382 op1));
383 break;
384 }
385
386 case ir_binop_ubo_load:
387 unreachable("not yet supported");
388
389 case ir_triop_fma:
390 case ir_triop_lrp:
391 case ir_triop_csel:
392 case ir_triop_bitfield_extract:
393 for (i = 0; i < vector_elements; i++) {
394 ir_rvalue *op0 = get_element(op_var[0], i);
395 ir_rvalue *op1 = get_element(op_var[1], i);
396 ir_rvalue *op2 = get_element(op_var[2], i);
397
398 assign(ir, i, new(mem_ctx) ir_expression(expr->operation,
399 element_type,
400 op0,
401 op1,
402 op2));
403 }
404 break;
405
406 case ir_triop_bfi: {
407 /* Only a single BFM is needed for multiple BFIs. */
408 ir_rvalue *op0 = get_element(op_var[0], 0);
409
410 for (i = 0; i < vector_elements; i++) {
411 ir_rvalue *op1 = get_element(op_var[1], i);
412 ir_rvalue *op2 = get_element(op_var[2], i);
413
414 assign(ir, i, new(mem_ctx) ir_expression(expr->operation,
415 element_type,
416 op0->clone(mem_ctx, NULL),
417 op1,
418 op2));
419 }
420 break;
421 }
422
423 case ir_unop_pack_snorm_2x16:
424 case ir_unop_pack_snorm_4x8:
425 case ir_unop_pack_unorm_2x16:
426 case ir_unop_pack_unorm_4x8:
427 case ir_unop_pack_half_2x16:
428 case ir_unop_unpack_snorm_2x16:
429 case ir_unop_unpack_snorm_4x8:
430 case ir_unop_unpack_unorm_2x16:
431 case ir_unop_unpack_unorm_4x8:
432 case ir_unop_unpack_half_2x16:
433 case ir_binop_ldexp:
434 case ir_binop_vector_extract:
435 case ir_triop_vector_insert:
436 case ir_quadop_bitfield_insert:
437 case ir_quadop_vector:
438 unreachable("should have been lowered");
439
440 case ir_unop_unpack_half_2x16_split_x:
441 case ir_unop_unpack_half_2x16_split_y:
442 case ir_binop_pack_half_2x16_split:
443 case ir_unop_interpolate_at_centroid:
444 case ir_binop_interpolate_at_offset:
445 case ir_binop_interpolate_at_sample:
446 unreachable("not reached: expression operates on scalars only");
447 }
448
449 ir->remove();
450 this->progress = true;
451
452 return visit_continue;
453 }