src/mesa/drivers/dri/i965/brw_fs_combine_constants.cpp

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 /** @file brw_fs_combine_constants.cpp
  25  *
  26  * This file contains the opt_combine_constants() pass that runs after the
  27  * regular optimization loop. It passes over the instruction list and
  28  * selectively promotes immediate values to registers by emitting a mov(1)
  29  * instruction.
  30  *
  31  * This is useful on Gen 7 particularly, because a few instructions can be
  32  * coissued (i.e., issued in the same cycle as another thread on the same EU
  33  * issues an instruction) under some circumstances, one of which is that they
  34  * cannot use immediate values.
  35  */
  36
  37 #include "brw_fs.h"
  38 #include "brw_fs_live_variables.h"
  39 #include "brw_cfg.h"
  40
  41 using namespace brw;
  42
  43 /* Returns whether an instruction could co-issue if its immediate source were
  44  * replaced with a GRF source.
  45  */
  46 static bool
  47 could_coissue(const struct brw_device_info *devinfo, const fs_inst *inst)
  48 {
  49    if (devinfo->gen != 7)
  50       return false;
  51
  52    switch (inst->opcode) {
  53    case BRW_OPCODE_MOV:
  54    case BRW_OPCODE_CMP:
  55    case BRW_OPCODE_ADD:
  56    case BRW_OPCODE_MUL:
  57       return true;
  58    default:
  59       return false;
  60    }
  61 }
  62
  63 /**
  64  * Returns true for instructions that don't support immediate sources.
  65  */
  66 static bool
  67 must_promote_imm(const struct brw_device_info *devinfo, const fs_inst *inst)
  68 {
  69    switch (inst->opcode) {
  70    case SHADER_OPCODE_POW:
  71       return devinfo->gen < 8;
  72    case BRW_OPCODE_MAD:
  73    case BRW_OPCODE_LRP:
  74       return true;
  75    default:
  76       return false;
  77    }
  78 }
  79
  80 /** A box for putting fs_regs in a linked list. */
  81 struct reg_link {
  82    DECLARE_RALLOC_CXX_OPERATORS(reg_link)
  83
  84    reg_link(fs_reg *reg) : reg(reg) {}
  85
  86    struct exec_node link;
  87    fs_reg *reg;
  88 };
  89
  90 static struct exec_node *
  91 link(void *mem_ctx, fs_reg *reg)
  92 {
  93    reg_link *l = new(mem_ctx) reg_link(reg);
  94    return &l->link;
  95 }
  96
  97 /**
  98  * Information about an immediate value.
  99  */
 100 struct imm {
 101    /** The common ancestor of all blocks using this immediate value. */
 102    bblock_t *block;
 103
 104    /**
 105     * The instruction generating the immediate value, if all uses are contained
 106     * within a single basic block. Otherwise, NULL.
 107     */
 108    fs_inst *inst;
 109
 110    /**
 111     * A list of fs_regs that refer to this immediate.  If we promote it, we'll
 112     * have to patch these up to refer to the new GRF.
 113     */
 114    exec_list *uses;
 115
 116    /** The immediate value.  We currently only handle floats. */
 117    float val;
 118
 119    /**
 120     * The GRF register and subregister number where we've decided to store the
 121     * constant value.
 122     */
 123    uint8_t subreg_offset;
 124    uint16_t reg;
 125
 126    /** The number of coissuable instructions using this immediate. */
 127    uint16_t uses_by_coissue;
 128
 129    /**
 130     * Whether this constant is used by an instruction that can't handle an
 131     * immediate source (and already has to be promoted to a GRF).
 132     */
 133    bool must_promote;
 134
 135    uint16_t first_use_ip;
 136    uint16_t last_use_ip;
 137 };
 138
 139 /** The working set of information about immediates. */
 140 struct table {
 141    struct imm *imm;
 142    int size;
 143    int len;
 144 };
 145
 146 static struct imm *
 147 find_imm(struct table *table, float val)
 148 {
 149    assert(signbit(val) == 0);
 150
 151    for (int i = 0; i < table->len; i++) {
 152       if (table->imm[i].val == val) {
 153          return &table->imm[i];
 154       }
 155    }
 156    return NULL;
 157 }
 158
 159 static struct imm *
 160 new_imm(struct table *table, void *mem_ctx)
 161 {
 162    if (table->len == table->size) {
 163       table->size *= 2;
 164       table->imm = reralloc(mem_ctx, table->imm, struct imm, table->size);
 165    }
 166    return &table->imm[table->len++];
 167 }
 168
 169 /**
 170  * Comparator used for sorting an array of imm structures.
 171  *
 172  * We sort by basic block number, then last use IP, then first use IP (least
 173  * to greatest). This sorting causes immediates live in the same area to be
 174  * allocated to the same register in the hopes that all values will be dead
 175  * about the same time and the register can be reused.
 176  */
 177 static int
 178 compare(const void *_a, const void *_b)
 179 {
 180    const struct imm *a = (const struct imm *)_a,
 181                     *b = (const struct imm *)_b;
 182
 183    int block_diff = a->block->num - b->block->num;
 184    if (block_diff)
 185       return block_diff;
 186
 187    int end_diff = a->last_use_ip - b->last_use_ip;
 188    if (end_diff)
 189       return end_diff;
 190
 191    return a->first_use_ip - b->first_use_ip;
 192 }
 193
 194 bool
 195 fs_visitor::opt_combine_constants()
 196 {
 197    void *const_ctx = ralloc_context(NULL);
 198
 199    struct table table;
 200    table.size = 8;
 201    table.len = 0;
 202    table.imm = ralloc_array(const_ctx, struct imm, table.size);
 203
 204    cfg->calculate_idom();
 205    unsigned ip = -1;
 206
 207    /* Make a pass through all instructions and count the number of times each
 208     * constant is used by coissueable instructions or instructions that cannot
 209     * take immediate arguments.
 210     */
 211    foreach_block_and_inst(block, fs_inst, inst, cfg) {
 212       ip++;
 213
 214       if (!could_coissue(devinfo, inst) && !must_promote_imm(devinfo, inst))
 215          continue;
 216
 217       for (int i = 0; i < inst->sources; i++) {
 218          if (inst->src[i].file != IMM ||
 219              inst->src[i].type != BRW_REGISTER_TYPE_F)
 220             continue;
 221
 222          float val = fabsf(inst->src[i].f);
 223          struct imm *imm = find_imm(&table, val);
 224
 225          if (imm) {
 226             bblock_t *intersection = cfg_t::intersect(block, imm->block);
 227             if (intersection != imm->block)
 228                imm->inst = NULL;
 229             imm->block = intersection;
 230             imm->uses->push_tail(link(const_ctx, &inst->src[i]));
 231             imm->uses_by_coissue += could_coissue(devinfo, inst);
 232             imm->must_promote = imm->must_promote || must_promote_imm(devinfo, inst);
 233             imm->last_use_ip = ip;
 234          } else {
 235             imm = new_imm(&table, const_ctx);
 236             imm->block = block;
 237             imm->inst = inst;
 238             imm->uses = new(const_ctx) exec_list();
 239             imm->uses->push_tail(link(const_ctx, &inst->src[i]));
 240             imm->val = val;
 241             imm->uses_by_coissue = could_coissue(devinfo, inst);
 242             imm->must_promote = must_promote_imm(devinfo, inst);
 243             imm->first_use_ip = ip;
 244             imm->last_use_ip = ip;
 245          }
 246       }
 247    }
 248
 249    /* Remove constants from the table that don't have enough uses to make them
 250     * profitable to store in a register.
 251     */
 252    for (int i = 0; i < table.len;) {
 253       struct imm *imm = &table.imm[i];
 254
 255       if (!imm->must_promote && imm->uses_by_coissue < 4) {
 256          table.imm[i] = table.imm[table.len - 1];
 257          table.len--;
 258          continue;
 259       }
 260       i++;
 261    }
 262    if (table.len == 0) {
 263       ralloc_free(const_ctx);
 264       return false;
 265    }
 266    if (cfg->num_blocks != 1)
 267       qsort(table.imm, table.len, sizeof(struct imm), compare);
 268
 269
 270    /* Insert MOVs to load the constant values into GRFs. */
 271    fs_reg reg(GRF, alloc.allocate(dispatch_width / 8));
 272    reg.stride = 0;
 273    for (int i = 0; i < table.len; i++) {
 274       struct imm *imm = &table.imm[i];
 275       /* Insert it either before the instruction that generated the immediate
 276        * or after the last non-control flow instruction of the common ancestor.
 277        */
 278       exec_node *n = (imm->inst ? imm->inst :
 279                       imm->block->last_non_control_flow_inst()->next);
 280       const fs_builder ibld = bld.at(imm->block, n).exec_all().group(1, 0);
 281
 282       ibld.MOV(reg, fs_reg(imm->val));
 283       imm->reg = reg.reg;
 284       imm->subreg_offset = reg.subreg_offset;
 285
 286       reg.subreg_offset += sizeof(float);
 287       if ((unsigned)reg.subreg_offset == dispatch_width * sizeof(float)) {
 288          reg.reg = alloc.allocate(dispatch_width / 8);
 289          reg.subreg_offset = 0;
 290       }
 291    }
 292    promoted_constants = table.len;
 293
 294    /* Rewrite the immediate sources to refer to the new GRFs. */
 295    for (int i = 0; i < table.len; i++) {
 296       foreach_list_typed(reg_link, link, link, table.imm[i].uses) {
 297          fs_reg *reg = link->reg;
 298          reg->file = GRF;
 299          reg->reg = table.imm[i].reg;
 300          reg->subreg_offset = table.imm[i].subreg_offset;
 301          reg->stride = 0;
 302          reg->negate = signbit(reg->f) !=
 303                                signbit(table.imm[i].val);
 304          assert(fabsf(reg->f) == table.imm[i].val);
 305       }
 306    }
 307
 308    ralloc_free(const_ctx);
 309    invalidate_live_intervals();
 310
 311    return true;
 312 }