i965/nir/vec4: Implement load_const intrinsic
[mesa.git] / src / mesa / drivers / dri / i965 / brw_fs_copy_propagation.cpp
1 /*
2 * Copyright © 2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 /** @file brw_fs_copy_propagation.cpp
25 *
26 * Support for global copy propagation in two passes: A local pass that does
27 * intra-block copy (and constant) propagation, and a global pass that uses
28 * dataflow analysis on the copies available at the end of each block to re-do
29 * local copy propagation with more copies available.
30 *
31 * See Muchnick's Advanced Compiler Design and Implementation, section
32 * 12.5 (p356).
33 */
34
35 #define ACP_HASH_SIZE 16
36
37 #include "util/bitset.h"
38 #include "brw_fs.h"
39 #include "brw_cfg.h"
40
41 namespace { /* avoid conflict with opt_copy_propagation_elements */
42 struct acp_entry : public exec_node {
43 fs_reg dst;
44 fs_reg src;
45 uint8_t regs_written;
46 enum opcode opcode;
47 bool saturate;
48 };
49
50 struct block_data {
51 /**
52 * Which entries in the fs_copy_prop_dataflow acp table are live at the
53 * start of this block. This is the useful output of the analysis, since
54 * it lets us plug those into the local copy propagation on the second
55 * pass.
56 */
57 BITSET_WORD *livein;
58
59 /**
60 * Which entries in the fs_copy_prop_dataflow acp table are live at the end
61 * of this block. This is done in initial setup from the per-block acps
62 * returned by the first local copy prop pass.
63 */
64 BITSET_WORD *liveout;
65
66 /**
67 * Which entries in the fs_copy_prop_dataflow acp table are generated by
68 * instructions in this block which reach the end of the block without
69 * being killed.
70 */
71 BITSET_WORD *copy;
72
73 /**
74 * Which entries in the fs_copy_prop_dataflow acp table are killed over the
75 * course of this block.
76 */
77 BITSET_WORD *kill;
78 };
79
80 class fs_copy_prop_dataflow
81 {
82 public:
83 fs_copy_prop_dataflow(void *mem_ctx, cfg_t *cfg,
84 exec_list *out_acp[ACP_HASH_SIZE]);
85
86 void setup_initial_values();
87 void run();
88
89 void dump_block_data() const;
90
91 void *mem_ctx;
92 cfg_t *cfg;
93
94 acp_entry **acp;
95 int num_acp;
96 int bitset_words;
97
98 struct block_data *bd;
99 };
100 } /* anonymous namespace */
101
102 fs_copy_prop_dataflow::fs_copy_prop_dataflow(void *mem_ctx, cfg_t *cfg,
103 exec_list *out_acp[ACP_HASH_SIZE])
104 : mem_ctx(mem_ctx), cfg(cfg)
105 {
106 bd = rzalloc_array(mem_ctx, struct block_data, cfg->num_blocks);
107
108 num_acp = 0;
109 foreach_block (block, cfg) {
110 for (int i = 0; i < ACP_HASH_SIZE; i++) {
111 num_acp += out_acp[block->num][i].length();
112 }
113 }
114
115 acp = rzalloc_array(mem_ctx, struct acp_entry *, num_acp);
116
117 bitset_words = BITSET_WORDS(num_acp);
118
119 int next_acp = 0;
120 foreach_block (block, cfg) {
121 bd[block->num].livein = rzalloc_array(bd, BITSET_WORD, bitset_words);
122 bd[block->num].liveout = rzalloc_array(bd, BITSET_WORD, bitset_words);
123 bd[block->num].copy = rzalloc_array(bd, BITSET_WORD, bitset_words);
124 bd[block->num].kill = rzalloc_array(bd, BITSET_WORD, bitset_words);
125
126 for (int i = 0; i < ACP_HASH_SIZE; i++) {
127 foreach_in_list(acp_entry, entry, &out_acp[block->num][i]) {
128 acp[next_acp] = entry;
129
130 /* opt_copy_propagate_local populates out_acp with copies created
131 * in a block which are still live at the end of the block. This
132 * is exactly what we want in the COPY set.
133 */
134 BITSET_SET(bd[block->num].copy, next_acp);
135
136 next_acp++;
137 }
138 }
139 }
140
141 assert(next_acp == num_acp);
142
143 setup_initial_values();
144 run();
145 }
146
147 /**
148 * Set up initial values for each of the data flow sets, prior to running
149 * the fixed-point algorithm.
150 */
151 void
152 fs_copy_prop_dataflow::setup_initial_values()
153 {
154 /* Initialize the COPY and KILL sets. */
155 foreach_block (block, cfg) {
156 foreach_inst_in_block(fs_inst, inst, block) {
157 if (inst->dst.file != GRF)
158 continue;
159
160 /* Mark ACP entries which are killed by this instruction. */
161 for (int i = 0; i < num_acp; i++) {
162 if (inst->overwrites_reg(acp[i]->dst) ||
163 inst->overwrites_reg(acp[i]->src)) {
164 BITSET_SET(bd[block->num].kill, i);
165 }
166 }
167 }
168 }
169
170 /* Populate the initial values for the livein and liveout sets. For the
171 * block at the start of the program, livein = 0 and liveout = copy.
172 * For the others, set liveout to 0 (the empty set) and livein to ~0
173 * (the universal set).
174 */
175 foreach_block (block, cfg) {
176 if (block->parents.is_empty()) {
177 for (int i = 0; i < bitset_words; i++) {
178 bd[block->num].livein[i] = 0u;
179 bd[block->num].liveout[i] = bd[block->num].copy[i];
180 }
181 } else {
182 for (int i = 0; i < bitset_words; i++) {
183 bd[block->num].liveout[i] = 0u;
184 bd[block->num].livein[i] = ~0u;
185 }
186 }
187 }
188 }
189
190 /**
191 * Walk the set of instructions in the block, marking which entries in the acp
192 * are killed by the block.
193 */
194 void
195 fs_copy_prop_dataflow::run()
196 {
197 bool progress;
198
199 do {
200 progress = false;
201
202 /* Update liveout for all blocks. */
203 foreach_block (block, cfg) {
204 if (block->parents.is_empty())
205 continue;
206
207 for (int i = 0; i < bitset_words; i++) {
208 const BITSET_WORD old_liveout = bd[block->num].liveout[i];
209
210 bd[block->num].liveout[i] =
211 bd[block->num].copy[i] | (bd[block->num].livein[i] &
212 ~bd[block->num].kill[i]);
213
214 if (old_liveout != bd[block->num].liveout[i])
215 progress = true;
216 }
217 }
218
219 /* Update livein for all blocks. If a copy is live out of all parent
220 * blocks, it's live coming in to this block.
221 */
222 foreach_block (block, cfg) {
223 if (block->parents.is_empty())
224 continue;
225
226 for (int i = 0; i < bitset_words; i++) {
227 const BITSET_WORD old_livein = bd[block->num].livein[i];
228
229 bd[block->num].livein[i] = ~0u;
230 foreach_list_typed(bblock_link, parent_link, link, &block->parents) {
231 bblock_t *parent = parent_link->block;
232 bd[block->num].livein[i] &= bd[parent->num].liveout[i];
233 }
234
235 if (old_livein != bd[block->num].livein[i])
236 progress = true;
237 }
238 }
239 } while (progress);
240 }
241
242 void
243 fs_copy_prop_dataflow::dump_block_data() const
244 {
245 foreach_block (block, cfg) {
246 fprintf(stderr, "Block %d [%d, %d] (parents ", block->num,
247 block->start_ip, block->end_ip);
248 foreach_list_typed(bblock_link, link, link, &block->parents) {
249 bblock_t *parent = link->block;
250 fprintf(stderr, "%d ", parent->num);
251 }
252 fprintf(stderr, "):\n");
253 fprintf(stderr, " livein = 0x");
254 for (int i = 0; i < bitset_words; i++)
255 fprintf(stderr, "%08x", bd[block->num].livein[i]);
256 fprintf(stderr, ", liveout = 0x");
257 for (int i = 0; i < bitset_words; i++)
258 fprintf(stderr, "%08x", bd[block->num].liveout[i]);
259 fprintf(stderr, ",\n copy = 0x");
260 for (int i = 0; i < bitset_words; i++)
261 fprintf(stderr, "%08x", bd[block->num].copy[i]);
262 fprintf(stderr, ", kill = 0x");
263 for (int i = 0; i < bitset_words; i++)
264 fprintf(stderr, "%08x", bd[block->num].kill[i]);
265 fprintf(stderr, "\n");
266 }
267 }
268
269 static bool
270 is_logic_op(enum opcode opcode)
271 {
272 return (opcode == BRW_OPCODE_AND ||
273 opcode == BRW_OPCODE_OR ||
274 opcode == BRW_OPCODE_XOR ||
275 opcode == BRW_OPCODE_NOT);
276 }
277
278 static bool
279 can_change_source_types(fs_inst *inst)
280 {
281 return !inst->src[0].abs && !inst->src[0].negate &&
282 (inst->opcode == BRW_OPCODE_MOV ||
283 (inst->opcode == BRW_OPCODE_SEL &&
284 inst->predicate != BRW_PREDICATE_NONE &&
285 !inst->src[1].abs && !inst->src[1].negate));
286 }
287
288 bool
289 fs_visitor::try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry)
290 {
291 if (inst->src[arg].file != GRF)
292 return false;
293
294 if (entry->src.file == IMM)
295 return false;
296 assert(entry->src.file == GRF || entry->src.file == UNIFORM ||
297 entry->src.file == ATTR);
298
299 if (entry->opcode == SHADER_OPCODE_LOAD_PAYLOAD &&
300 inst->opcode == SHADER_OPCODE_LOAD_PAYLOAD)
301 return false;
302
303 assert(entry->dst.file == GRF);
304 if (inst->src[arg].reg != entry->dst.reg)
305 return false;
306
307 /* Bail if inst is reading a range that isn't contained in the range
308 * that entry is writing.
309 */
310 if (inst->src[arg].reg_offset < entry->dst.reg_offset ||
311 (inst->src[arg].reg_offset * 32 + inst->src[arg].subreg_offset +
312 inst->regs_read(arg) * inst->src[arg].stride * 32) >
313 (entry->dst.reg_offset + entry->regs_written) * 32)
314 return false;
315
316 /* we can't generally copy-propagate UD negations because we
317 * can end up accessing the resulting values as signed integers
318 * instead. See also resolve_ud_negate() and comment in
319 * fs_generator::generate_code.
320 */
321 if (entry->src.type == BRW_REGISTER_TYPE_UD &&
322 entry->src.negate)
323 return false;
324
325 bool has_source_modifiers = entry->src.abs || entry->src.negate;
326
327 if ((has_source_modifiers || entry->src.file == UNIFORM ||
328 !entry->src.is_contiguous()) &&
329 !inst->can_do_source_mods(devinfo))
330 return false;
331
332 if (has_source_modifiers &&
333 inst->opcode == SHADER_OPCODE_GEN4_SCRATCH_WRITE)
334 return false;
335
336 /* Bail if the result of composing both strides would exceed the
337 * hardware limit.
338 */
339 if (entry->src.stride * inst->src[arg].stride > 4)
340 return false;
341
342 /* Bail if the instruction type is larger than the execution type of the
343 * copy, what implies that each channel is reading multiple channels of the
344 * destination of the copy, and simply replacing the sources would give a
345 * program with different semantics.
346 */
347 if (type_sz(entry->dst.type) < type_sz(inst->src[arg].type))
348 return false;
349
350 /* Bail if the result of composing both strides cannot be expressed
351 * as another stride. This avoids, for example, trying to transform
352 * this:
353 *
354 * MOV (8) rX<1>UD rY<0;1,0>UD
355 * FOO (8) ... rX<8;8,1>UW
356 *
357 * into this:
358 *
359 * FOO (8) ... rY<0;1,0>UW
360 *
361 * Which would have different semantics.
362 */
363 if (entry->src.stride != 1 &&
364 (inst->src[arg].stride *
365 type_sz(inst->src[arg].type)) % type_sz(entry->src.type) != 0)
366 return false;
367
368 if (has_source_modifiers &&
369 entry->dst.type != inst->src[arg].type &&
370 !can_change_source_types(inst))
371 return false;
372
373 if (devinfo->gen >= 8 && (entry->src.negate || entry->src.abs) &&
374 is_logic_op(inst->opcode)) {
375 return false;
376 }
377
378 if (entry->saturate) {
379 switch(inst->opcode) {
380 case BRW_OPCODE_SEL:
381 if (inst->src[1].file != IMM ||
382 inst->src[1].fixed_hw_reg.dw1.f < 0.0 ||
383 inst->src[1].fixed_hw_reg.dw1.f > 1.0) {
384 return false;
385 }
386 break;
387 default:
388 return false;
389 }
390 }
391
392 inst->src[arg].file = entry->src.file;
393 inst->src[arg].reg = entry->src.reg;
394 inst->src[arg].stride *= entry->src.stride;
395 inst->saturate = inst->saturate || entry->saturate;
396
397 switch (entry->src.file) {
398 case UNIFORM:
399 case BAD_FILE:
400 case HW_REG:
401 inst->src[arg].reg_offset = entry->src.reg_offset;
402 inst->src[arg].subreg_offset = entry->src.subreg_offset;
403 break;
404 case ATTR:
405 case GRF:
406 {
407 /* In this case, we'll just leave the width alone. The source
408 * register could have different widths depending on how it is
409 * being used. For instance, if only half of the register was
410 * used then we want to preserve that and continue to only use
411 * half.
412 *
413 * Also, we have to deal with mapping parts of vgrfs to other
414 * parts of vgrfs so we have to do some reg_offset magic.
415 */
416
417 /* Compute the offset of inst->src[arg] relative to inst->dst */
418 assert(entry->dst.subreg_offset == 0);
419 int rel_offset = inst->src[arg].reg_offset - entry->dst.reg_offset;
420 int rel_suboffset = inst->src[arg].subreg_offset;
421
422 /* Compute the final register offset (in bytes) */
423 int offset = entry->src.reg_offset * 32 + entry->src.subreg_offset;
424 offset += rel_offset * 32 + rel_suboffset;
425 inst->src[arg].reg_offset = offset / 32;
426 inst->src[arg].subreg_offset = offset % 32;
427 }
428 break;
429 default:
430 unreachable("Invalid register file");
431 break;
432 }
433
434 if (has_source_modifiers) {
435 if (entry->dst.type != inst->src[arg].type) {
436 /* We are propagating source modifiers from a MOV with a different
437 * type. If we got here, then we can just change the source and
438 * destination types of the instruction and keep going.
439 */
440 assert(can_change_source_types(inst));
441 for (int i = 0; i < inst->sources; i++) {
442 inst->src[i].type = entry->dst.type;
443 }
444 inst->dst.type = entry->dst.type;
445 }
446
447 if (!inst->src[arg].abs) {
448 inst->src[arg].abs = entry->src.abs;
449 inst->src[arg].negate ^= entry->src.negate;
450 }
451 }
452
453 return true;
454 }
455
456
457 bool
458 fs_visitor::try_constant_propagate(fs_inst *inst, acp_entry *entry)
459 {
460 bool progress = false;
461
462 if (entry->src.file != IMM)
463 return false;
464 if (entry->saturate)
465 return false;
466
467 for (int i = inst->sources - 1; i >= 0; i--) {
468 if (inst->src[i].file != GRF)
469 continue;
470
471 assert(entry->dst.file == GRF);
472 if (inst->src[i].reg != entry->dst.reg)
473 continue;
474
475 /* Bail if inst is reading a range that isn't contained in the range
476 * that entry is writing.
477 */
478 if (inst->src[i].reg_offset < entry->dst.reg_offset ||
479 (inst->src[i].reg_offset * 32 + inst->src[i].subreg_offset +
480 inst->regs_read(i) * inst->src[i].stride * 32) >
481 (entry->dst.reg_offset + entry->regs_written) * 32)
482 continue;
483
484 fs_reg val = entry->src;
485 val.type = inst->src[i].type;
486
487 if (inst->src[i].abs) {
488 if ((devinfo->gen >= 8 && is_logic_op(inst->opcode)) ||
489 !brw_abs_immediate(val.type, &val.fixed_hw_reg)) {
490 continue;
491 }
492 }
493
494 if (inst->src[i].negate) {
495 if ((devinfo->gen >= 8 && is_logic_op(inst->opcode)) ||
496 !brw_negate_immediate(val.type, &val.fixed_hw_reg)) {
497 continue;
498 }
499 }
500
501 switch (inst->opcode) {
502 case BRW_OPCODE_MOV:
503 case SHADER_OPCODE_LOAD_PAYLOAD:
504 inst->src[i] = val;
505 progress = true;
506 break;
507
508 case SHADER_OPCODE_INT_QUOTIENT:
509 case SHADER_OPCODE_INT_REMAINDER:
510 /* FINISHME: Promote non-float constants and remove this. */
511 if (devinfo->gen < 8)
512 break;
513 /* fallthrough */
514 case SHADER_OPCODE_POW:
515 /* Allow constant propagation into src1 (except on Gen 6), and let
516 * constant combining promote the constant on Gen < 8.
517 *
518 * While Gen 6 MATH can take a scalar source, its source and
519 * destination offsets must be equal and we cannot ensure that.
520 */
521 if (devinfo->gen == 6)
522 break;
523 /* fallthrough */
524 case BRW_OPCODE_BFI1:
525 case BRW_OPCODE_ASR:
526 case BRW_OPCODE_SHL:
527 case BRW_OPCODE_SHR:
528 case BRW_OPCODE_SUBB:
529 if (i == 1) {
530 inst->src[i] = val;
531 progress = true;
532 }
533 break;
534
535 case BRW_OPCODE_MACH:
536 case BRW_OPCODE_MUL:
537 case BRW_OPCODE_ADD:
538 case BRW_OPCODE_OR:
539 case BRW_OPCODE_AND:
540 case BRW_OPCODE_XOR:
541 case BRW_OPCODE_ADDC:
542 if (i == 1) {
543 inst->src[i] = val;
544 progress = true;
545 } else if (i == 0 && inst->src[1].file != IMM) {
546 /* Fit this constant in by commuting the operands.
547 * Exception: we can't do this for 32-bit integer MUL/MACH
548 * because it's asymmetric.
549 *
550 * The BSpec says for Broadwell that
551 *
552 * "When multiplying DW x DW, the dst cannot be accumulator."
553 *
554 * Integer MUL with a non-accumulator destination will be lowered
555 * by lower_integer_multiplication(), so don't restrict it.
556 */
557 if (((inst->opcode == BRW_OPCODE_MUL &&
558 inst->dst.is_accumulator()) ||
559 inst->opcode == BRW_OPCODE_MACH) &&
560 (inst->src[1].type == BRW_REGISTER_TYPE_D ||
561 inst->src[1].type == BRW_REGISTER_TYPE_UD))
562 break;
563 inst->src[0] = inst->src[1];
564 inst->src[1] = val;
565 progress = true;
566 }
567 break;
568
569 case BRW_OPCODE_CMP:
570 case BRW_OPCODE_IF:
571 if (i == 1) {
572 inst->src[i] = val;
573 progress = true;
574 } else if (i == 0 && inst->src[1].file != IMM) {
575 enum brw_conditional_mod new_cmod;
576
577 new_cmod = brw_swap_cmod(inst->conditional_mod);
578 if (new_cmod != BRW_CONDITIONAL_NONE) {
579 /* Fit this constant in by swapping the operands and
580 * flipping the test
581 */
582 inst->src[0] = inst->src[1];
583 inst->src[1] = val;
584 inst->conditional_mod = new_cmod;
585 progress = true;
586 }
587 }
588 break;
589
590 case BRW_OPCODE_SEL:
591 if (i == 1) {
592 inst->src[i] = val;
593 progress = true;
594 } else if (i == 0 && inst->src[1].file != IMM) {
595 inst->src[0] = inst->src[1];
596 inst->src[1] = val;
597
598 /* If this was predicated, flipping operands means
599 * we also need to flip the predicate.
600 */
601 if (inst->conditional_mod == BRW_CONDITIONAL_NONE) {
602 inst->predicate_inverse =
603 !inst->predicate_inverse;
604 }
605 progress = true;
606 }
607 break;
608
609 case SHADER_OPCODE_RCP:
610 /* The hardware doesn't do math on immediate values
611 * (because why are you doing that, seriously?), but
612 * the correct answer is to just constant fold it
613 * anyway.
614 */
615 assert(i == 0);
616 if (inst->src[0].fixed_hw_reg.dw1.f != 0.0f) {
617 inst->opcode = BRW_OPCODE_MOV;
618 inst->src[0] = val;
619 inst->src[0].fixed_hw_reg.dw1.f = 1.0f / inst->src[0].fixed_hw_reg.dw1.f;
620 progress = true;
621 }
622 break;
623
624 case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
625 case SHADER_OPCODE_BROADCAST:
626 inst->src[i] = val;
627 progress = true;
628 break;
629
630 case BRW_OPCODE_MAD:
631 case BRW_OPCODE_LRP:
632 inst->src[i] = val;
633 progress = true;
634 break;
635
636 default:
637 break;
638 }
639 }
640
641 return progress;
642 }
643
644 static bool
645 can_propagate_from(fs_inst *inst)
646 {
647 return (inst->opcode == BRW_OPCODE_MOV &&
648 inst->dst.file == GRF &&
649 ((inst->src[0].file == GRF &&
650 (inst->src[0].reg != inst->dst.reg ||
651 inst->src[0].reg_offset != inst->dst.reg_offset)) ||
652 inst->src[0].file == ATTR ||
653 inst->src[0].file == UNIFORM ||
654 inst->src[0].file == IMM) &&
655 inst->src[0].type == inst->dst.type &&
656 !inst->is_partial_write());
657 }
658
659 /* Walks a basic block and does copy propagation on it using the acp
660 * list.
661 */
662 bool
663 fs_visitor::opt_copy_propagate_local(void *copy_prop_ctx, bblock_t *block,
664 exec_list *acp)
665 {
666 bool progress = false;
667
668 foreach_inst_in_block(fs_inst, inst, block) {
669 /* Try propagating into this instruction. */
670 for (int i = 0; i < inst->sources; i++) {
671 if (inst->src[i].file != GRF)
672 continue;
673
674 foreach_in_list(acp_entry, entry, &acp[inst->src[i].reg % ACP_HASH_SIZE]) {
675 if (try_constant_propagate(inst, entry))
676 progress = true;
677
678 if (try_copy_propagate(inst, i, entry))
679 progress = true;
680 }
681 }
682
683 /* kill the destination from the ACP */
684 if (inst->dst.file == GRF) {
685 foreach_in_list_safe(acp_entry, entry, &acp[inst->dst.reg % ACP_HASH_SIZE]) {
686 if (inst->overwrites_reg(entry->dst)) {
687 entry->remove();
688 }
689 }
690
691 /* Oops, we only have the chaining hash based on the destination, not
692 * the source, so walk across the entire table.
693 */
694 for (int i = 0; i < ACP_HASH_SIZE; i++) {
695 foreach_in_list_safe(acp_entry, entry, &acp[i]) {
696 if (inst->overwrites_reg(entry->src))
697 entry->remove();
698 }
699 }
700 }
701
702 /* If this instruction's source could potentially be folded into the
703 * operand of another instruction, add it to the ACP.
704 */
705 if (can_propagate_from(inst)) {
706 acp_entry *entry = ralloc(copy_prop_ctx, acp_entry);
707 entry->dst = inst->dst;
708 entry->src = inst->src[0];
709 entry->regs_written = inst->regs_written;
710 entry->opcode = inst->opcode;
711 entry->saturate = inst->saturate;
712 acp[entry->dst.reg % ACP_HASH_SIZE].push_tail(entry);
713 } else if (inst->opcode == SHADER_OPCODE_LOAD_PAYLOAD &&
714 inst->dst.file == GRF) {
715 int offset = 0;
716 for (int i = 0; i < inst->sources; i++) {
717 int effective_width = i < inst->header_size ? 8 : inst->exec_size;
718 int regs_written = effective_width / 8;
719 if (inst->src[i].file == GRF) {
720 acp_entry *entry = ralloc(copy_prop_ctx, acp_entry);
721 entry->dst = inst->dst;
722 entry->dst.reg_offset = offset;
723 entry->src = inst->src[i];
724 entry->regs_written = regs_written;
725 entry->opcode = inst->opcode;
726 if (!entry->dst.equals(inst->src[i])) {
727 acp[entry->dst.reg % ACP_HASH_SIZE].push_tail(entry);
728 } else {
729 ralloc_free(entry);
730 }
731 }
732 offset += regs_written;
733 }
734 }
735 }
736
737 return progress;
738 }
739
740 bool
741 fs_visitor::opt_copy_propagate()
742 {
743 bool progress = false;
744 void *copy_prop_ctx = ralloc_context(NULL);
745 exec_list *out_acp[cfg->num_blocks];
746
747 for (int i = 0; i < cfg->num_blocks; i++)
748 out_acp[i] = new exec_list [ACP_HASH_SIZE];
749
750 /* First, walk through each block doing local copy propagation and getting
751 * the set of copies available at the end of the block.
752 */
753 foreach_block (block, cfg) {
754 progress = opt_copy_propagate_local(copy_prop_ctx, block,
755 out_acp[block->num]) || progress;
756 }
757
758 /* Do dataflow analysis for those available copies. */
759 fs_copy_prop_dataflow dataflow(copy_prop_ctx, cfg, out_acp);
760
761 /* Next, re-run local copy propagation, this time with the set of copies
762 * provided by the dataflow analysis available at the start of a block.
763 */
764 foreach_block (block, cfg) {
765 exec_list in_acp[ACP_HASH_SIZE];
766
767 for (int i = 0; i < dataflow.num_acp; i++) {
768 if (BITSET_TEST(dataflow.bd[block->num].livein, i)) {
769 struct acp_entry *entry = dataflow.acp[i];
770 in_acp[entry->dst.reg % ACP_HASH_SIZE].push_tail(entry);
771 }
772 }
773
774 progress = opt_copy_propagate_local(copy_prop_ctx, block, in_acp) || progress;
775 }
776
777 for (int i = 0; i < cfg->num_blocks; i++)
778 delete [] out_acp[i];
779 ralloc_free(copy_prop_ctx);
780
781 if (progress)
782 invalidate_live_intervals();
783
784 return progress;
785 }