i965/fs_reg: Allocate double the number of vgrfs in SIMD16 mode
[mesa.git] / src / mesa / drivers / dri / i965 / brw_fs_copy_propagation.cpp
1 /*
2 * Copyright © 2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 /** @file brw_fs_copy_propagation.cpp
25 *
26 * Support for global copy propagation in two passes: A local pass that does
27 * intra-block copy (and constant) propagation, and a global pass that uses
28 * dataflow analysis on the copies available at the end of each block to re-do
29 * local copy propagation with more copies available.
30 *
31 * See Muchnick's Advanced Compiler Design and Implementation, section
32 * 12.5 (p356).
33 */
34
35 #define ACP_HASH_SIZE 16
36
37 #include "main/bitset.h"
38 #include "brw_fs.h"
39 #include "brw_cfg.h"
40
41 namespace { /* avoid conflict with opt_copy_propagation_elements */
42 struct acp_entry : public exec_node {
43 fs_reg dst;
44 fs_reg src;
45 uint8_t regs_written;
46 enum opcode opcode;
47 bool saturate;
48 };
49
50 struct block_data {
51 /**
52 * Which entries in the fs_copy_prop_dataflow acp table are live at the
53 * start of this block. This is the useful output of the analysis, since
54 * it lets us plug those into the local copy propagation on the second
55 * pass.
56 */
57 BITSET_WORD *livein;
58
59 /**
60 * Which entries in the fs_copy_prop_dataflow acp table are live at the end
61 * of this block. This is done in initial setup from the per-block acps
62 * returned by the first local copy prop pass.
63 */
64 BITSET_WORD *liveout;
65
66 /**
67 * Which entries in the fs_copy_prop_dataflow acp table are generated by
68 * instructions in this block which reach the end of the block without
69 * being killed.
70 */
71 BITSET_WORD *copy;
72
73 /**
74 * Which entries in the fs_copy_prop_dataflow acp table are killed over the
75 * course of this block.
76 */
77 BITSET_WORD *kill;
78 };
79
80 class fs_copy_prop_dataflow
81 {
82 public:
83 fs_copy_prop_dataflow(void *mem_ctx, cfg_t *cfg,
84 exec_list *out_acp[ACP_HASH_SIZE]);
85
86 void setup_initial_values();
87 void run();
88
89 void dump_block_data() const;
90
91 void *mem_ctx;
92 cfg_t *cfg;
93
94 acp_entry **acp;
95 int num_acp;
96 int bitset_words;
97
98 struct block_data *bd;
99 };
100 } /* anonymous namespace */
101
102 fs_copy_prop_dataflow::fs_copy_prop_dataflow(void *mem_ctx, cfg_t *cfg,
103 exec_list *out_acp[ACP_HASH_SIZE])
104 : mem_ctx(mem_ctx), cfg(cfg)
105 {
106 bd = rzalloc_array(mem_ctx, struct block_data, cfg->num_blocks);
107
108 num_acp = 0;
109 foreach_block (block, cfg) {
110 for (int i = 0; i < ACP_HASH_SIZE; i++) {
111 num_acp += out_acp[block->num][i].length();
112 }
113 }
114
115 acp = rzalloc_array(mem_ctx, struct acp_entry *, num_acp);
116
117 bitset_words = BITSET_WORDS(num_acp);
118
119 int next_acp = 0;
120 foreach_block (block, cfg) {
121 bd[block->num].livein = rzalloc_array(bd, BITSET_WORD, bitset_words);
122 bd[block->num].liveout = rzalloc_array(bd, BITSET_WORD, bitset_words);
123 bd[block->num].copy = rzalloc_array(bd, BITSET_WORD, bitset_words);
124 bd[block->num].kill = rzalloc_array(bd, BITSET_WORD, bitset_words);
125
126 for (int i = 0; i < ACP_HASH_SIZE; i++) {
127 foreach_in_list(acp_entry, entry, &out_acp[block->num][i]) {
128 acp[next_acp] = entry;
129
130 /* opt_copy_propagate_local populates out_acp with copies created
131 * in a block which are still live at the end of the block. This
132 * is exactly what we want in the COPY set.
133 */
134 BITSET_SET(bd[block->num].copy, next_acp);
135
136 next_acp++;
137 }
138 }
139 }
140
141 assert(next_acp == num_acp);
142
143 setup_initial_values();
144 run();
145 }
146
147 /**
148 * Set up initial values for each of the data flow sets, prior to running
149 * the fixed-point algorithm.
150 */
151 void
152 fs_copy_prop_dataflow::setup_initial_values()
153 {
154 /* Initialize the COPY and KILL sets. */
155 foreach_block (block, cfg) {
156 foreach_inst_in_block(fs_inst, inst, block) {
157 if (inst->dst.file != GRF)
158 continue;
159
160 /* Mark ACP entries which are killed by this instruction. */
161 for (int i = 0; i < num_acp; i++) {
162 if (inst->overwrites_reg(acp[i]->dst) ||
163 inst->overwrites_reg(acp[i]->src)) {
164 BITSET_SET(bd[block->num].kill, i);
165 }
166 }
167 }
168 }
169
170 /* Populate the initial values for the livein and liveout sets. For the
171 * block at the start of the program, livein = 0 and liveout = copy.
172 * For the others, set liveout to 0 (the empty set) and livein to ~0
173 * (the universal set).
174 */
175 foreach_block (block, cfg) {
176 if (block->parents.is_empty()) {
177 for (int i = 0; i < bitset_words; i++) {
178 bd[block->num].livein[i] = 0u;
179 bd[block->num].liveout[i] = bd[block->num].copy[i];
180 }
181 } else {
182 for (int i = 0; i < bitset_words; i++) {
183 bd[block->num].liveout[i] = 0u;
184 bd[block->num].livein[i] = ~0u;
185 }
186 }
187 }
188 }
189
190 /**
191 * Walk the set of instructions in the block, marking which entries in the acp
192 * are killed by the block.
193 */
194 void
195 fs_copy_prop_dataflow::run()
196 {
197 bool progress;
198
199 do {
200 progress = false;
201
202 /* Update liveout for all blocks. */
203 foreach_block (block, cfg) {
204 if (block->parents.is_empty())
205 continue;
206
207 for (int i = 0; i < bitset_words; i++) {
208 const BITSET_WORD old_liveout = bd[block->num].liveout[i];
209
210 bd[block->num].liveout[i] =
211 bd[block->num].copy[i] | (bd[block->num].livein[i] &
212 ~bd[block->num].kill[i]);
213
214 if (old_liveout != bd[block->num].liveout[i])
215 progress = true;
216 }
217 }
218
219 /* Update livein for all blocks. If a copy is live out of all parent
220 * blocks, it's live coming in to this block.
221 */
222 foreach_block (block, cfg) {
223 if (block->parents.is_empty())
224 continue;
225
226 for (int i = 0; i < bitset_words; i++) {
227 const BITSET_WORD old_livein = bd[block->num].livein[i];
228
229 bd[block->num].livein[i] = ~0u;
230 foreach_list_typed(bblock_link, parent_link, link, &block->parents) {
231 bblock_t *parent = parent_link->block;
232 bd[block->num].livein[i] &= bd[parent->num].liveout[i];
233 }
234
235 if (old_livein != bd[block->num].livein[i])
236 progress = true;
237 }
238 }
239 } while (progress);
240 }
241
242 void
243 fs_copy_prop_dataflow::dump_block_data() const
244 {
245 foreach_block (block, cfg) {
246 fprintf(stderr, "Block %d [%d, %d] (parents ", block->num,
247 block->start_ip, block->end_ip);
248 foreach_list_typed(bblock_link, link, link, &block->parents) {
249 bblock_t *parent = link->block;
250 fprintf(stderr, "%d ", parent->num);
251 }
252 fprintf(stderr, "):\n");
253 fprintf(stderr, " livein = 0x");
254 for (int i = 0; i < bitset_words; i++)
255 fprintf(stderr, "%08x", bd[block->num].livein[i]);
256 fprintf(stderr, ", liveout = 0x");
257 for (int i = 0; i < bitset_words; i++)
258 fprintf(stderr, "%08x", bd[block->num].liveout[i]);
259 fprintf(stderr, ",\n copy = 0x");
260 for (int i = 0; i < bitset_words; i++)
261 fprintf(stderr, "%08x", bd[block->num].copy[i]);
262 fprintf(stderr, ", kill = 0x");
263 for (int i = 0; i < bitset_words; i++)
264 fprintf(stderr, "%08x", bd[block->num].kill[i]);
265 fprintf(stderr, "\n");
266 }
267 }
268
269 static bool
270 is_logic_op(enum opcode opcode)
271 {
272 return (opcode == BRW_OPCODE_AND ||
273 opcode == BRW_OPCODE_OR ||
274 opcode == BRW_OPCODE_XOR ||
275 opcode == BRW_OPCODE_NOT);
276 }
277
278 bool
279 fs_visitor::try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry)
280 {
281 if (inst->src[arg].file != GRF)
282 return false;
283
284 if (entry->src.file == IMM)
285 return false;
286 assert(entry->src.file == GRF || entry->src.file == UNIFORM);
287
288 if (entry->opcode == SHADER_OPCODE_LOAD_PAYLOAD &&
289 inst->opcode == SHADER_OPCODE_LOAD_PAYLOAD)
290 return false;
291
292 assert(entry->dst.file == GRF);
293 if (inst->src[arg].reg != entry->dst.reg)
294 return false;
295
296 /* Bail if inst is reading a range that isn't contained in the range
297 * that entry is writing.
298 */
299 if (inst->src[arg].reg_offset < entry->dst.reg_offset ||
300 (inst->src[arg].reg_offset * 32 + inst->src[arg].subreg_offset +
301 inst->regs_read(this, arg) * inst->src[arg].stride * 32) >
302 (entry->dst.reg_offset + entry->regs_written) * 32)
303 return false;
304
305 /* See resolve_ud_negate() and comment in brw_fs_emit.cpp. */
306 if (inst->conditional_mod &&
307 inst->src[arg].type == BRW_REGISTER_TYPE_UD &&
308 entry->src.negate)
309 return false;
310
311 bool has_source_modifiers = entry->src.abs || entry->src.negate;
312
313 if ((has_source_modifiers || entry->src.file == UNIFORM ||
314 !entry->src.is_contiguous()) &&
315 !inst->can_do_source_mods(brw))
316 return false;
317
318 if (has_source_modifiers &&
319 inst->opcode == SHADER_OPCODE_GEN4_SCRATCH_WRITE)
320 return false;
321
322 /* Bail if the result of composing both strides would exceed the
323 * hardware limit.
324 */
325 if (entry->src.stride * inst->src[arg].stride > 4)
326 return false;
327
328 /* Bail if the result of composing both strides cannot be expressed
329 * as another stride. This avoids, for example, trying to transform
330 * this:
331 *
332 * MOV (8) rX<1>UD rY<0;1,0>UD
333 * FOO (8) ... rX<8;8,1>UW
334 *
335 * into this:
336 *
337 * FOO (8) ... rY<0;1,0>UW
338 *
339 * Which would have different semantics.
340 */
341 if (entry->src.stride != 1 &&
342 (inst->src[arg].stride *
343 type_sz(inst->src[arg].type)) % type_sz(entry->src.type) != 0)
344 return false;
345
346 if (has_source_modifiers && entry->dst.type != inst->src[arg].type)
347 return false;
348
349 if (brw->gen >= 8 && (entry->src.negate || entry->src.abs) &&
350 is_logic_op(inst->opcode)) {
351 return false;
352 }
353
354 if (entry->saturate) {
355 switch(inst->opcode) {
356 case BRW_OPCODE_SEL:
357 if (inst->src[1].file != IMM ||
358 inst->src[1].fixed_hw_reg.dw1.f < 0.0 ||
359 inst->src[1].fixed_hw_reg.dw1.f > 1.0) {
360 return false;
361 }
362 break;
363 default:
364 return false;
365 }
366 }
367
368 inst->src[arg].file = entry->src.file;
369 inst->src[arg].reg = entry->src.reg;
370 inst->src[arg].stride *= entry->src.stride;
371 inst->saturate = inst->saturate || entry->saturate;
372
373 switch (entry->src.file) {
374 case UNIFORM:
375 assert(entry->src.width == 1);
376 case BAD_FILE:
377 case HW_REG:
378 inst->src[arg].width = entry->src.width;
379 inst->src[arg].reg_offset = entry->src.reg_offset;
380 inst->src[arg].subreg_offset = entry->src.subreg_offset;
381 break;
382 case GRF:
383 {
384 assert(entry->src.width % inst->src[arg].width == 0);
385 /* In this case, we'll just leave the width alone. The source
386 * register could have different widths depending on how it is
387 * being used. For instance, if only half of the register was
388 * used then we want to preserve that and continue to only use
389 * half.
390 *
391 * Also, we have to deal with mapping parts of vgrfs to other
392 * parts of vgrfs so we have to do some reg_offset magic.
393 */
394
395 /* Compute the offset of inst->src[arg] relative to inst->dst */
396 assert(entry->dst.subreg_offset == 0);
397 int rel_offset = inst->src[arg].reg_offset - entry->dst.reg_offset;
398 int rel_suboffset = inst->src[arg].subreg_offset;
399
400 /* Compute the final register offset (in bytes) */
401 int offset = entry->src.reg_offset * 32 + entry->src.subreg_offset;
402 offset += rel_offset * 32 + rel_suboffset;
403 inst->src[arg].reg_offset = offset / 32;
404 inst->src[arg].subreg_offset = offset % 32;
405 }
406 break;
407 default:
408 unreachable("Invalid register file");
409 break;
410 }
411
412 if (!inst->src[arg].abs) {
413 inst->src[arg].abs = entry->src.abs;
414 inst->src[arg].negate ^= entry->src.negate;
415 }
416
417 return true;
418 }
419
420
421 bool
422 fs_visitor::try_constant_propagate(fs_inst *inst, acp_entry *entry)
423 {
424 bool progress = false;
425
426 if (entry->src.file != IMM)
427 return false;
428
429 for (int i = inst->sources - 1; i >= 0; i--) {
430 if (inst->src[i].file != GRF)
431 continue;
432
433 assert(entry->dst.file == GRF);
434 if (inst->src[i].reg != entry->dst.reg ||
435 inst->src[i].type != entry->dst.type)
436 continue;
437
438 /* Bail if inst is reading a range that isn't contained in the range
439 * that entry is writing.
440 */
441 if (inst->src[i].reg_offset < entry->dst.reg_offset ||
442 (inst->src[i].reg_offset * 32 + inst->src[i].subreg_offset +
443 inst->regs_read(this, i) * inst->src[i].stride * 32) >
444 (entry->dst.reg_offset + entry->regs_written) * 32)
445 continue;
446
447 /* Don't bother with cases that should have been taken care of by the
448 * GLSL compiler's constant folding pass.
449 */
450 if (inst->src[i].negate || inst->src[i].abs)
451 continue;
452
453 switch (inst->opcode) {
454 case BRW_OPCODE_MOV:
455 inst->src[i] = entry->src;
456 progress = true;
457 break;
458
459 case SHADER_OPCODE_POW:
460 case SHADER_OPCODE_INT_QUOTIENT:
461 case SHADER_OPCODE_INT_REMAINDER:
462 if (brw->gen < 8)
463 break;
464 /* fallthrough */
465 case BRW_OPCODE_BFI1:
466 case BRW_OPCODE_ASR:
467 case BRW_OPCODE_SHL:
468 case BRW_OPCODE_SHR:
469 case BRW_OPCODE_SUBB:
470 if (i == 1) {
471 inst->src[i] = entry->src;
472 progress = true;
473 }
474 break;
475
476 case BRW_OPCODE_MACH:
477 case BRW_OPCODE_MUL:
478 case BRW_OPCODE_ADD:
479 case BRW_OPCODE_OR:
480 case BRW_OPCODE_AND:
481 case BRW_OPCODE_XOR:
482 case BRW_OPCODE_ADDC:
483 if (i == 1) {
484 inst->src[i] = entry->src;
485 progress = true;
486 } else if (i == 0 && inst->src[1].file != IMM) {
487 /* Fit this constant in by commuting the operands.
488 * Exception: we can't do this for 32-bit integer MUL/MACH
489 * because it's asymmetric.
490 */
491 if ((inst->opcode == BRW_OPCODE_MUL ||
492 inst->opcode == BRW_OPCODE_MACH) &&
493 (inst->src[1].type == BRW_REGISTER_TYPE_D ||
494 inst->src[1].type == BRW_REGISTER_TYPE_UD))
495 break;
496 inst->src[0] = inst->src[1];
497 inst->src[1] = entry->src;
498 progress = true;
499 }
500 break;
501
502 case BRW_OPCODE_CMP:
503 case BRW_OPCODE_IF:
504 if (i == 1) {
505 inst->src[i] = entry->src;
506 progress = true;
507 } else if (i == 0 && inst->src[1].file != IMM) {
508 enum brw_conditional_mod new_cmod;
509
510 new_cmod = brw_swap_cmod(inst->conditional_mod);
511 if (new_cmod != BRW_CONDITIONAL_NONE) {
512 /* Fit this constant in by swapping the operands and
513 * flipping the test
514 */
515 inst->src[0] = inst->src[1];
516 inst->src[1] = entry->src;
517 inst->conditional_mod = new_cmod;
518 progress = true;
519 }
520 }
521 break;
522
523 case BRW_OPCODE_SEL:
524 if (i == 1) {
525 inst->src[i] = entry->src;
526 progress = true;
527 } else if (i == 0 && inst->src[1].file != IMM) {
528 inst->src[0] = inst->src[1];
529 inst->src[1] = entry->src;
530
531 /* If this was predicated, flipping operands means
532 * we also need to flip the predicate.
533 */
534 if (inst->conditional_mod == BRW_CONDITIONAL_NONE) {
535 inst->predicate_inverse =
536 !inst->predicate_inverse;
537 }
538 progress = true;
539 }
540 break;
541
542 case SHADER_OPCODE_RCP:
543 /* The hardware doesn't do math on immediate values
544 * (because why are you doing that, seriously?), but
545 * the correct answer is to just constant fold it
546 * anyway.
547 */
548 assert(i == 0);
549 if (inst->src[0].fixed_hw_reg.dw1.f != 0.0f) {
550 inst->opcode = BRW_OPCODE_MOV;
551 inst->src[0] = entry->src;
552 inst->src[0].fixed_hw_reg.dw1.f = 1.0f / inst->src[0].fixed_hw_reg.dw1.f;
553 progress = true;
554 }
555 break;
556
557 case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
558 inst->src[i] = entry->src;
559 progress = true;
560 break;
561
562 default:
563 break;
564 }
565 }
566
567 return progress;
568 }
569
570 static bool
571 can_propagate_from(fs_inst *inst)
572 {
573 return (inst->opcode == BRW_OPCODE_MOV &&
574 inst->dst.file == GRF &&
575 ((inst->src[0].file == GRF &&
576 (inst->src[0].reg != inst->dst.reg ||
577 inst->src[0].reg_offset != inst->dst.reg_offset)) ||
578 inst->src[0].file == UNIFORM ||
579 inst->src[0].file == IMM) &&
580 inst->src[0].type == inst->dst.type &&
581 !inst->is_partial_write());
582 }
583
584 /* Walks a basic block and does copy propagation on it using the acp
585 * list.
586 */
587 bool
588 fs_visitor::opt_copy_propagate_local(void *copy_prop_ctx, bblock_t *block,
589 exec_list *acp)
590 {
591 bool progress = false;
592
593 foreach_inst_in_block(fs_inst, inst, block) {
594 /* Try propagating into this instruction. */
595 for (int i = 0; i < inst->sources; i++) {
596 if (inst->src[i].file != GRF)
597 continue;
598
599 foreach_in_list(acp_entry, entry, &acp[inst->src[i].reg % ACP_HASH_SIZE]) {
600 if (try_constant_propagate(inst, entry))
601 progress = true;
602
603 if (try_copy_propagate(inst, i, entry))
604 progress = true;
605 }
606 }
607
608 /* kill the destination from the ACP */
609 if (inst->dst.file == GRF) {
610 foreach_in_list_safe(acp_entry, entry, &acp[inst->dst.reg % ACP_HASH_SIZE]) {
611 if (inst->overwrites_reg(entry->dst)) {
612 entry->remove();
613 }
614 }
615
616 /* Oops, we only have the chaining hash based on the destination, not
617 * the source, so walk across the entire table.
618 */
619 for (int i = 0; i < ACP_HASH_SIZE; i++) {
620 foreach_in_list_safe(acp_entry, entry, &acp[i]) {
621 if (inst->overwrites_reg(entry->src))
622 entry->remove();
623 }
624 }
625 }
626
627 /* If this instruction's source could potentially be folded into the
628 * operand of another instruction, add it to the ACP.
629 */
630 if (can_propagate_from(inst)) {
631 acp_entry *entry = ralloc(copy_prop_ctx, acp_entry);
632 entry->dst = inst->dst;
633 entry->src = inst->src[0];
634 entry->regs_written = inst->regs_written;
635 entry->opcode = inst->opcode;
636 entry->saturate = inst->saturate;
637 acp[entry->dst.reg % ACP_HASH_SIZE].push_tail(entry);
638 } else if (inst->opcode == SHADER_OPCODE_LOAD_PAYLOAD &&
639 inst->dst.file == GRF) {
640 int offset = 0;
641 for (int i = 0; i < inst->sources; i++) {
642 int regs_written = ((inst->src[i].effective_width(this) *
643 type_sz(inst->src[i].type)) + 31) / 32;
644 if (inst->src[i].file == GRF) {
645 acp_entry *entry = ralloc(copy_prop_ctx, acp_entry);
646 entry->dst = inst->dst;
647 entry->dst.reg_offset = offset;
648 entry->dst.width = inst->src[i].effective_width(this);
649 entry->src = inst->src[i];
650 entry->regs_written = regs_written;
651 entry->opcode = inst->opcode;
652 if (!entry->dst.equals(inst->src[i])) {
653 acp[entry->dst.reg % ACP_HASH_SIZE].push_tail(entry);
654 } else {
655 ralloc_free(entry);
656 }
657 }
658 offset += regs_written;
659 }
660 }
661 }
662
663 return progress;
664 }
665
666 bool
667 fs_visitor::opt_copy_propagate()
668 {
669 bool progress = false;
670 void *copy_prop_ctx = ralloc_context(NULL);
671 exec_list *out_acp[cfg->num_blocks];
672
673 for (int i = 0; i < cfg->num_blocks; i++)
674 out_acp[i] = new exec_list [ACP_HASH_SIZE];
675
676 /* First, walk through each block doing local copy propagation and getting
677 * the set of copies available at the end of the block.
678 */
679 foreach_block (block, cfg) {
680 progress = opt_copy_propagate_local(copy_prop_ctx, block,
681 out_acp[block->num]) || progress;
682 }
683
684 /* Do dataflow analysis for those available copies. */
685 fs_copy_prop_dataflow dataflow(copy_prop_ctx, cfg, out_acp);
686
687 /* Next, re-run local copy propagation, this time with the set of copies
688 * provided by the dataflow analysis available at the start of a block.
689 */
690 foreach_block (block, cfg) {
691 exec_list in_acp[ACP_HASH_SIZE];
692
693 for (int i = 0; i < dataflow.num_acp; i++) {
694 if (BITSET_TEST(dataflow.bd[block->num].livein, i)) {
695 struct acp_entry *entry = dataflow.acp[i];
696 in_acp[entry->dst.reg % ACP_HASH_SIZE].push_tail(entry);
697 }
698 }
699
700 progress = opt_copy_propagate_local(copy_prop_ctx, block, in_acp) || progress;
701 }
702
703 for (int i = 0; i < cfg->num_blocks; i++)
704 delete [] out_acp[i];
705 ralloc_free(copy_prop_ctx);
706
707 if (progress)
708 invalidate_live_intervals();
709
710 return progress;
711 }