src/mesa/drivers/dri/i965/brw_fs_cse.cpp

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "brw_fs.h"
  25 #include "brw_cfg.h"
  26
  27 /** @file brw_fs_cse.cpp
  28  *
  29  * Support for local common subexpression elimination.
  30  *
  31  * See Muchnick's Advanced Compiler Design and Implementation, section
  32  * 13.1 (p378).
  33  */
  34
  35 using namespace brw;
  36
  37 namespace {
  38 struct aeb_entry : public exec_node {
  39    /** The instruction that generates the expression value. */
  40    fs_inst *generator;
  41
  42    /** The temporary where the value is stored. */
  43    fs_reg tmp;
  44 };
  45 }
  46
  47 static bool
  48 is_expression(const fs_visitor *v, const fs_inst *const inst)
  49 {
  50    switch (inst->opcode) {
  51    case BRW_OPCODE_MOV:
  52    case BRW_OPCODE_SEL:
  53    case BRW_OPCODE_NOT:
  54    case BRW_OPCODE_AND:
  55    case BRW_OPCODE_OR:
  56    case BRW_OPCODE_XOR:
  57    case BRW_OPCODE_SHR:
  58    case BRW_OPCODE_SHL:
  59    case BRW_OPCODE_ASR:
  60    case BRW_OPCODE_CMP:
  61    case BRW_OPCODE_CMPN:
  62    case BRW_OPCODE_ADD:
  63    case BRW_OPCODE_MUL:
  64    case SHADER_OPCODE_MULH:
  65    case BRW_OPCODE_FRC:
  66    case BRW_OPCODE_RNDU:
  67    case BRW_OPCODE_RNDD:
  68    case BRW_OPCODE_RNDE:
  69    case BRW_OPCODE_RNDZ:
  70    case BRW_OPCODE_LINE:
  71    case BRW_OPCODE_PLN:
  72    case BRW_OPCODE_MAD:
  73    case BRW_OPCODE_LRP:
  74    case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
  75    case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7:
  76    case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD:
  77    case FS_OPCODE_CINTERP:
  78    case FS_OPCODE_LINTERP:
  79    case SHADER_OPCODE_FIND_LIVE_CHANNEL:
  80    case SHADER_OPCODE_BROADCAST:
  81    case SHADER_OPCODE_EXTRACT_BYTE:
  82    case SHADER_OPCODE_EXTRACT_WORD:
  83    case SHADER_OPCODE_MOV_INDIRECT:
  84       return true;
  85    case SHADER_OPCODE_RCP:
  86    case SHADER_OPCODE_RSQ:
  87    case SHADER_OPCODE_SQRT:
  88    case SHADER_OPCODE_EXP2:
  89    case SHADER_OPCODE_LOG2:
  90    case SHADER_OPCODE_POW:
  91    case SHADER_OPCODE_INT_QUOTIENT:
  92    case SHADER_OPCODE_INT_REMAINDER:
  93    case SHADER_OPCODE_SIN:
  94    case SHADER_OPCODE_COS:
  95       return inst->mlen < 2;
  96    case SHADER_OPCODE_LOAD_PAYLOAD:
  97       return !inst->is_copy_payload(v->alloc);
  98    default:
  99       return inst->is_send_from_grf() && !inst->has_side_effects() &&
 100          !inst->is_volatile();
 101    }
 102 }
 103
 104 static bool
 105 operands_match(const fs_inst *a, const fs_inst *b, bool *negate)
 106 {
 107    fs_reg *xs = a->src;
 108    fs_reg *ys = b->src;
 109
 110    if (a->opcode == BRW_OPCODE_MAD) {
 111       return xs[0].equals(ys[0]) &&
 112              ((xs[1].equals(ys[1]) && xs[2].equals(ys[2])) ||
 113               (xs[2].equals(ys[1]) && xs[1].equals(ys[2])));
 114    } else if (a->opcode == BRW_OPCODE_MUL && a->dst.type == BRW_REGISTER_TYPE_F) {
 115       bool xs0_negate = xs[0].negate;
 116       bool xs1_negate = xs[1].file == IMM ? xs[1].f < 0.0f
 117                                           : xs[1].negate;
 118       bool ys0_negate = ys[0].negate;
 119       bool ys1_negate = ys[1].file == IMM ? ys[1].f < 0.0f
 120                                           : ys[1].negate;
 121       float xs1_imm = xs[1].f;
 122       float ys1_imm = ys[1].f;
 123
 124       xs[0].negate = false;
 125       xs[1].negate = false;
 126       ys[0].negate = false;
 127       ys[1].negate = false;
 128       xs[1].f = fabsf(xs[1].f);
 129       ys[1].f = fabsf(ys[1].f);
 130
 131       bool ret = (xs[0].equals(ys[0]) && xs[1].equals(ys[1])) ||
 132                  (xs[1].equals(ys[0]) && xs[0].equals(ys[1]));
 133
 134       xs[0].negate = xs0_negate;
 135       xs[1].negate = xs[1].file == IMM ? false : xs1_negate;
 136       ys[0].negate = ys0_negate;
 137       ys[1].negate = ys[1].file == IMM ? false : ys1_negate;
 138       xs[1].f = xs1_imm;
 139       ys[1].f = ys1_imm;
 140
 141       *negate = (xs0_negate != xs1_negate) != (ys0_negate != ys1_negate);
 142       if (*negate && (a->saturate || b->saturate))
 143          return false;
 144       return ret;
 145    } else if (!a->is_commutative()) {
 146       bool match = true;
 147       for (int i = 0; i < a->sources; i++) {
 148          if (!xs[i].equals(ys[i])) {
 149             match = false;
 150             break;
 151          }
 152       }
 153       return match;
 154    } else {
 155       return (xs[0].equals(ys[0]) && xs[1].equals(ys[1])) ||
 156              (xs[1].equals(ys[0]) && xs[0].equals(ys[1]));
 157    }
 158 }
 159
 160 static bool
 161 instructions_match(fs_inst *a, fs_inst *b, bool *negate)
 162 {
 163    return a->opcode == b->opcode &&
 164           a->force_writemask_all == b->force_writemask_all &&
 165           a->exec_size == b->exec_size &&
 166           a->force_sechalf == b->force_sechalf &&
 167           a->saturate == b->saturate &&
 168           a->predicate == b->predicate &&
 169           a->predicate_inverse == b->predicate_inverse &&
 170           a->conditional_mod == b->conditional_mod &&
 171           a->flag_subreg == b->flag_subreg &&
 172           a->dst.type == b->dst.type &&
 173           a->offset == b->offset &&
 174           a->mlen == b->mlen &&
 175           a->regs_written == b->regs_written &&
 176           a->base_mrf == b->base_mrf &&
 177           a->eot == b->eot &&
 178           a->header_size == b->header_size &&
 179           a->shadow_compare == b->shadow_compare &&
 180           a->pi_noperspective == b->pi_noperspective &&
 181           a->sources == b->sources &&
 182           operands_match(a, b, negate);
 183 }
 184
 185 static void
 186 create_copy_instr(const fs_builder &bld, fs_inst *inst, fs_reg src, bool negate)
 187 {
 188    int written = inst->regs_written;
 189    int dst_width = inst->exec_size / 8;
 190    fs_inst *copy;
 191
 192    if (written > dst_width) {
 193       fs_reg *payload;
 194       int sources, header_size;
 195       if (inst->opcode == SHADER_OPCODE_LOAD_PAYLOAD) {
 196          sources = inst->sources;
 197          header_size = inst->header_size;
 198       } else {
 199          assert(written % dst_width == 0);
 200          sources = written / dst_width;
 201          header_size = 0;
 202       }
 203
 204       assert(src.file == VGRF);
 205       payload = ralloc_array(bld.shader->mem_ctx, fs_reg, sources);
 206       for (int i = 0; i < header_size; i++) {
 207          payload[i] = src;
 208          src.reg_offset++;
 209       }
 210       for (int i = header_size; i < sources; i++) {
 211          payload[i] = src;
 212          src = offset(src, bld, 1);
 213       }
 214       copy = bld.LOAD_PAYLOAD(inst->dst, payload, sources, header_size);
 215    } else {
 216       copy = bld.MOV(inst->dst, src);
 217       copy->force_sechalf = inst->force_sechalf;
 218       copy->force_writemask_all = inst->force_writemask_all;
 219       copy->src[0].negate = negate;
 220    }
 221    assert(copy->regs_written == written);
 222 }
 223
 224 bool
 225 fs_visitor::opt_cse_local(bblock_t *block)
 226 {
 227    bool progress = false;
 228    exec_list aeb;
 229
 230    void *cse_ctx = ralloc_context(NULL);
 231
 232    int ip = block->start_ip;
 233    foreach_inst_in_block(fs_inst, inst, block) {
 234       /* Skip some cases. */
 235       if (is_expression(this, inst) && !inst->is_partial_write() &&
 236           ((inst->dst.file != ARF && inst->dst.file != FIXED_GRF) ||
 237            inst->dst.is_null()))
 238       {
 239          bool found = false;
 240          bool negate = false;
 241
 242          foreach_in_list_use_after(aeb_entry, entry, &aeb) {
 243             /* Match current instruction's expression against those in AEB. */
 244             if (!(entry->generator->dst.is_null() && !inst->dst.is_null()) &&
 245                 instructions_match(inst, entry->generator, &negate)) {
 246                found = true;
 247                progress = true;
 248                break;
 249             }
 250          }
 251
 252          if (!found) {
 253             if (inst->opcode != BRW_OPCODE_MOV ||
 254                 (inst->opcode == BRW_OPCODE_MOV &&
 255                  inst->src[0].file == IMM &&
 256                  inst->src[0].type == BRW_REGISTER_TYPE_VF)) {
 257                /* Our first sighting of this expression.  Create an entry. */
 258                aeb_entry *entry = ralloc(cse_ctx, aeb_entry);
 259                entry->tmp = reg_undef;
 260                entry->generator = inst;
 261                aeb.push_tail(entry);
 262             }
 263          } else {
 264             /* This is at least our second sighting of this expression.
 265              * If we don't have a temporary already, make one.
 266              */
 267             bool no_existing_temp = entry->tmp.file == BAD_FILE;
 268             if (no_existing_temp && !entry->generator->dst.is_null()) {
 269                const fs_builder ibld = fs_builder(this, block, entry->generator)
 270                                        .at(block, entry->generator->next);
 271                int written = entry->generator->regs_written;
 272
 273                entry->tmp = fs_reg(VGRF, alloc.allocate(written),
 274                                    entry->generator->dst.type);
 275
 276                create_copy_instr(ibld, entry->generator, entry->tmp, false);
 277
 278                entry->generator->dst = entry->tmp;
 279             }
 280
 281             /* dest <- temp */
 282             if (!inst->dst.is_null()) {
 283                assert(inst->regs_written == entry->generator->regs_written);
 284                assert(inst->dst.type == entry->tmp.type);
 285                const fs_builder ibld(this, block, inst);
 286
 287                create_copy_instr(ibld, inst, entry->tmp, negate);
 288             }
 289
 290             /* Set our iterator so that next time through the loop inst->next
 291              * will get the instruction in the basic block after the one we've
 292              * removed.
 293              */
 294             fs_inst *prev = (fs_inst *)inst->prev;
 295
 296             inst->remove(block);
 297             inst = prev;
 298          }
 299       }
 300
 301       foreach_in_list_safe(aeb_entry, entry, &aeb) {
 302          /* Kill all AEB entries that write a different value to or read from
 303           * the flag register if we just wrote it.
 304           */
 305          if (inst->writes_flag()) {
 306             bool negate; /* dummy */
 307             if (entry->generator->reads_flag() ||
 308                 (entry->generator->writes_flag() &&
 309                  !instructions_match(inst, entry->generator, &negate))) {
 310                entry->remove();
 311                ralloc_free(entry);
 312                continue;
 313             }
 314          }
 315
 316          for (int i = 0; i < entry->generator->sources; i++) {
 317             fs_reg *src_reg = &entry->generator->src[i];
 318
 319             /* Kill all AEB entries that use the destination we just
 320              * overwrote.
 321              */
 322             if (inst->overwrites_reg(entry->generator->src[i])) {
 323                entry->remove();
 324                ralloc_free(entry);
 325                break;
 326             }
 327
 328             /* Kill any AEB entries using registers that don't get reused any
 329              * more -- a sure sign they'll fail operands_match().
 330              */
 331             if (src_reg->file == VGRF && virtual_grf_end[src_reg->nr] < ip) {
 332                entry->remove();
 333                ralloc_free(entry);
 334                break;
 335             }
 336          }
 337       }
 338
 339       ip++;
 340    }
 341
 342    ralloc_free(cse_ctx);
 343
 344    return progress;
 345 }
 346
 347 bool
 348 fs_visitor::opt_cse()
 349 {
 350    bool progress = false;
 351
 352    calculate_live_intervals();
 353
 354    foreach_block (block, cfg) {
 355       progress = opt_cse_local(block) || progress;
 356    }
 357
 358    if (progress)
 359       invalidate_live_intervals();
 360
 361    return progress;
 362 }