src/mesa/drivers/dri/i965/brw_fs_cse.cpp

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "brw_fs.h"
  25 #include "brw_cfg.h"
  26
  27 /** @file brw_fs_cse.cpp
  28  *
  29  * Support for local common subexpression elimination.
  30  *
  31  * See Muchnick's Advanced Compiler Design and Implementation, section
  32  * 13.1 (p378).
  33  */
  34
  35 namespace {
  36 struct aeb_entry : public exec_node {
  37    /** The instruction that generates the expression value. */
  38    fs_inst *generator;
  39
  40    /** The temporary where the value is stored. */
  41    fs_reg tmp;
  42 };
  43 }
  44
  45 static bool
  46 is_copy_payload(const fs_inst *inst)
  47 {
  48    const int reg = inst->src[0].reg;
  49    if (inst->src[0].reg_offset != 0)
  50       return false;
  51
  52    for (int i = 1; i < inst->sources; i++) {
  53       if (inst->src[i].reg != reg ||
  54           inst->src[i].reg_offset != i) {
  55          return false;
  56       }
  57    }
  58    return true;
  59 }
  60
  61 static bool
  62 is_expression(const fs_inst *const inst)
  63 {
  64    switch (inst->opcode) {
  65    case BRW_OPCODE_SEL:
  66    case BRW_OPCODE_NOT:
  67    case BRW_OPCODE_AND:
  68    case BRW_OPCODE_OR:
  69    case BRW_OPCODE_XOR:
  70    case BRW_OPCODE_SHR:
  71    case BRW_OPCODE_SHL:
  72    case BRW_OPCODE_ASR:
  73    case BRW_OPCODE_CMP:
  74    case BRW_OPCODE_CMPN:
  75    case BRW_OPCODE_ADD:
  76    case BRW_OPCODE_MUL:
  77    case BRW_OPCODE_FRC:
  78    case BRW_OPCODE_RNDU:
  79    case BRW_OPCODE_RNDD:
  80    case BRW_OPCODE_RNDE:
  81    case BRW_OPCODE_RNDZ:
  82    case BRW_OPCODE_LINE:
  83    case BRW_OPCODE_PLN:
  84    case BRW_OPCODE_MAD:
  85    case BRW_OPCODE_LRP:
  86    case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
  87    case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7:
  88    case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD:
  89    case FS_OPCODE_CINTERP:
  90    case FS_OPCODE_LINTERP:
  91       return true;
  92    case SHADER_OPCODE_RCP:
  93    case SHADER_OPCODE_RSQ:
  94    case SHADER_OPCODE_SQRT:
  95    case SHADER_OPCODE_EXP2:
  96    case SHADER_OPCODE_LOG2:
  97    case SHADER_OPCODE_POW:
  98    case SHADER_OPCODE_INT_QUOTIENT:
  99    case SHADER_OPCODE_INT_REMAINDER:
 100    case SHADER_OPCODE_SIN:
 101    case SHADER_OPCODE_COS:
 102       return inst->mlen == 0;
 103    case SHADER_OPCODE_LOAD_PAYLOAD:
 104       return !is_copy_payload(inst);
 105    default:
 106       return inst->is_tex();
 107    }
 108 }
 109
 110 static bool
 111 is_expression_commutative(enum opcode op)
 112 {
 113    switch (op) {
 114    case BRW_OPCODE_AND:
 115    case BRW_OPCODE_OR:
 116    case BRW_OPCODE_XOR:
 117    case BRW_OPCODE_ADD:
 118    case BRW_OPCODE_MUL:
 119       return true;
 120    default:
 121       return false;
 122    }
 123 }
 124
 125 static bool
 126 operands_match(fs_inst *a, fs_inst *b)
 127 {
 128    fs_reg *xs = a->src;
 129    fs_reg *ys = b->src;
 130
 131    if (!is_expression_commutative(a->opcode)) {
 132       bool match = true;
 133       for (int i = 0; i < a->sources; i++) {
 134          if (!xs[i].equals(ys[i])) {
 135             match = false;
 136             break;
 137          }
 138       }
 139       return match;
 140    } else {
 141       return (xs[0].equals(ys[0]) && xs[1].equals(ys[1])) ||
 142              (xs[1].equals(ys[0]) && xs[0].equals(ys[1]));
 143    }
 144 }
 145
 146 static bool
 147 instructions_match(fs_inst *a, fs_inst *b)
 148 {
 149    return a->opcode == b->opcode &&
 150           a->saturate == b->saturate &&
 151           a->predicate == b->predicate &&
 152           a->predicate_inverse == b->predicate_inverse &&
 153           a->conditional_mod == b->conditional_mod &&
 154           a->dst.type == b->dst.type &&
 155           a->sources == b->sources &&
 156           (a->is_tex() ? (a->texture_offset == b->texture_offset &&
 157                           a->mlen == b->mlen &&
 158                           a->regs_written == b->regs_written &&
 159                           a->base_mrf == b->base_mrf &&
 160                           a->sampler == b->sampler &&
 161                           a->eot == b->eot &&
 162                           a->header_present == b->header_present &&
 163                           a->shadow_compare == b->shadow_compare)
 164                        : true) &&
 165           operands_match(a, b);
 166 }
 167
 168 bool
 169 fs_visitor::opt_cse_local(bblock_t *block, exec_list *aeb)
 170 {
 171    bool progress = false;
 172
 173    void *cse_ctx = ralloc_context(NULL);
 174
 175    int ip = block->start_ip;
 176    for (fs_inst *inst = (fs_inst *)block->start;
 177         inst != block->end->next;
 178         inst = (fs_inst *) inst->next) {
 179
 180       /* Skip some cases. */
 181       if (is_expression(inst) && !inst->is_partial_write() &&
 182           (inst->dst.file != HW_REG || inst->dst.is_null()))
 183       {
 184          bool found = false;
 185
 186          foreach_in_list_use_after(aeb_entry, entry, aeb) {
 187             /* Match current instruction's expression against those in AEB. */
 188             if (instructions_match(inst, entry->generator)) {
 189                found = true;
 190                progress = true;
 191                break;
 192             }
 193          }
 194
 195          if (!found) {
 196             /* Our first sighting of this expression.  Create an entry. */
 197             aeb_entry *entry = ralloc(cse_ctx, aeb_entry);
 198             entry->tmp = reg_undef;
 199             entry->generator = inst;
 200             aeb->push_tail(entry);
 201          } else {
 202             /* This is at least our second sighting of this expression.
 203              * If we don't have a temporary already, make one.
 204              */
 205             bool no_existing_temp = entry->tmp.file == BAD_FILE;
 206             if (no_existing_temp && !entry->generator->dst.is_null()) {
 207                int written = entry->generator->regs_written;
 208
 209                fs_reg orig_dst = entry->generator->dst;
 210                fs_reg tmp = fs_reg(GRF, virtual_grf_alloc(written),
 211                                    orig_dst.type);
 212                entry->tmp = tmp;
 213                entry->generator->dst = tmp;
 214
 215                fs_inst *copy;
 216                if (written > 1) {
 217                   fs_reg *sources = ralloc_array(mem_ctx, fs_reg, written);
 218                   for (int i = 0; i < written; i++) {
 219                      sources[i] = tmp;
 220                      sources[i].reg_offset = i;
 221                   }
 222                   copy = LOAD_PAYLOAD(orig_dst, sources, written);
 223                } else {
 224                   copy = MOV(orig_dst, tmp);
 225                   copy->force_writemask_all =
 226                      entry->generator->force_writemask_all;
 227                }
 228                entry->generator->insert_after(copy);
 229             }
 230
 231             /* dest <- temp */
 232             if (!inst->dst.is_null()) {
 233                int written = inst->regs_written;
 234                assert(written == entry->generator->regs_written);
 235                assert(inst->dst.type == entry->tmp.type);
 236                fs_reg dst = inst->dst;
 237                fs_reg tmp = entry->tmp;
 238                fs_inst *copy;
 239                if (written > 1) {
 240                   fs_reg *sources = ralloc_array(mem_ctx, fs_reg, written);
 241                   for (int i = 0; i < written; i++) {
 242                      sources[i] = tmp;
 243                      sources[i].reg_offset = i;
 244                   }
 245                   copy = LOAD_PAYLOAD(dst, sources, written);
 246                } else {
 247                   copy = MOV(dst, tmp);
 248                   copy->force_writemask_all = inst->force_writemask_all;
 249                }
 250                inst->insert_before(copy);
 251             }
 252
 253             /* Set our iterator so that next time through the loop inst->next
 254              * will get the instruction in the basic block after the one we've
 255              * removed.
 256              */
 257             fs_inst *prev = (fs_inst *)inst->prev;
 258
 259             inst->remove();
 260
 261             /* Appending an instruction may have changed our bblock end. */
 262             if (inst == block->end) {
 263                block->end = prev;
 264             }
 265
 266             inst = prev;
 267          }
 268       }
 269
 270       foreach_list_safe(entry_node, aeb) {
 271          aeb_entry *entry = (aeb_entry *)entry_node;
 272
 273          /* Kill all AEB entries that write a different value to or read from
 274           * the flag register if we just wrote it.
 275           */
 276          if (inst->writes_flag()) {
 277             if (entry->generator->reads_flag() ||
 278                 (entry->generator->writes_flag() &&
 279                  !instructions_match(inst, entry->generator))) {
 280                entry->remove();
 281                ralloc_free(entry);
 282                continue;
 283             }
 284          }
 285
 286          for (int i = 0; i < entry->generator->sources; i++) {
 287             fs_reg *src_reg = &entry->generator->src[i];
 288
 289             /* Kill all AEB entries that use the destination we just
 290              * overwrote.
 291              */
 292             if (inst->overwrites_reg(entry->generator->src[i])) {
 293                entry->remove();
 294                ralloc_free(entry);
 295                break;
 296             }
 297
 298             /* Kill any AEB entries using registers that don't get reused any
 299              * more -- a sure sign they'll fail operands_match().
 300              */
 301             if (src_reg->file == GRF && virtual_grf_end[src_reg->reg] < ip) {
 302                entry->remove();
 303                ralloc_free(entry);
 304                break;
 305             }
 306          }
 307       }
 308
 309       ip++;
 310    }
 311
 312    ralloc_free(cse_ctx);
 313
 314    if (progress)
 315       invalidate_live_intervals();
 316
 317    return progress;
 318 }
 319
 320 bool
 321 fs_visitor::opt_cse()
 322 {
 323    bool progress = false;
 324
 325    calculate_live_intervals();
 326
 327    cfg_t cfg(&instructions);
 328
 329    for (int b = 0; b < cfg.num_blocks; b++) {
 330       bblock_t *block = cfg.blocks[b];
 331       exec_list aeb;
 332
 333       progress = opt_cse_local(block, &aeb) || progress;
 334    }
 335
 336    return progress;
 337 }