src/mesa/drivers/dri/i965/brw_fs_cse.cpp

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "brw_fs.h"
  25 #include "brw_cfg.h"
  26
  27 /** @file brw_fs_cse.cpp
  28  *
  29  * Support for local common subexpression elimination.
  30  *
  31  * See Muchnick's Advanced Compiler Design and Implementation, section
  32  * 13.1 (p378).
  33  */
  34
  35 namespace {
  36 struct aeb_entry : public exec_node {
  37    /** The instruction that generates the expression value. */
  38    fs_inst *generator;
  39
  40    /** The temporary where the value is stored. */
  41    fs_reg tmp;
  42 };
  43 }
  44
  45 static bool
  46 is_expression(const fs_inst *const inst)
  47 {
  48    switch (inst->opcode) {
  49    case BRW_OPCODE_SEL:
  50    case BRW_OPCODE_NOT:
  51    case BRW_OPCODE_AND:
  52    case BRW_OPCODE_OR:
  53    case BRW_OPCODE_XOR:
  54    case BRW_OPCODE_SHR:
  55    case BRW_OPCODE_SHL:
  56    case BRW_OPCODE_ASR:
  57    case BRW_OPCODE_CMP:
  58    case BRW_OPCODE_CMPN:
  59    case BRW_OPCODE_ADD:
  60    case BRW_OPCODE_MUL:
  61    case BRW_OPCODE_FRC:
  62    case BRW_OPCODE_RNDU:
  63    case BRW_OPCODE_RNDD:
  64    case BRW_OPCODE_RNDE:
  65    case BRW_OPCODE_RNDZ:
  66    case BRW_OPCODE_LINE:
  67    case BRW_OPCODE_PLN:
  68    case BRW_OPCODE_MAD:
  69    case BRW_OPCODE_LRP:
  70    case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
  71    case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7:
  72    case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD:
  73    case FS_OPCODE_CINTERP:
  74    case FS_OPCODE_LINTERP:
  75       return true;
  76    default:
  77       return false;
  78    }
  79 }
  80
  81 static bool
  82 is_expression_commutative(enum opcode op)
  83 {
  84    switch (op) {
  85    case BRW_OPCODE_AND:
  86    case BRW_OPCODE_OR:
  87    case BRW_OPCODE_XOR:
  88    case BRW_OPCODE_ADD:
  89    case BRW_OPCODE_MUL:
  90       return true;
  91    default:
  92       return false;
  93    }
  94 }
  95
  96 static bool
  97 operands_match(enum opcode op, fs_reg *xs, fs_reg *ys)
  98 {
  99    if (!is_expression_commutative(op)) {
 100       return xs[0].equals(ys[0]) && xs[1].equals(ys[1]) && xs[2].equals(ys[2]);
 101    } else {
 102       return (xs[0].equals(ys[0]) && xs[1].equals(ys[1])) ||
 103              (xs[1].equals(ys[0]) && xs[0].equals(ys[1]));
 104    }
 105 }
 106
 107 static bool
 108 instructions_match(fs_inst *a, fs_inst *b)
 109 {
 110    return a->opcode == b->opcode &&
 111           a->saturate == b->saturate &&
 112           a->predicate == b->predicate &&
 113           a->predicate_inverse == b->predicate_inverse &&
 114           a->conditional_mod == b->conditional_mod &&
 115           a->dst.type == b->dst.type &&
 116           operands_match(a->opcode, a->src, b->src);
 117 }
 118
 119 bool
 120 fs_visitor::opt_cse_local(bblock_t *block, exec_list *aeb)
 121 {
 122    bool progress = false;
 123
 124    void *mem_ctx = ralloc_context(this->mem_ctx);
 125
 126    int ip = block->start_ip;
 127    for (fs_inst *inst = (fs_inst *)block->start;
 128         inst != block->end->next;
 129         inst = (fs_inst *) inst->next) {
 130
 131       /* Skip some cases. */
 132       if (is_expression(inst) && !inst->is_partial_write() &&
 133           (inst->dst.file != HW_REG || inst->dst.is_null()))
 134       {
 135          bool found = false;
 136
 137          aeb_entry *entry;
 138          foreach_list(entry_node, aeb) {
 139             entry = (aeb_entry *) entry_node;
 140
 141             /* Match current instruction's expression against those in AEB. */
 142             if (instructions_match(inst, entry->generator)) {
 143                found = true;
 144                progress = true;
 145                break;
 146             }
 147          }
 148
 149          if (!found) {
 150             /* Our first sighting of this expression.  Create an entry. */
 151             aeb_entry *entry = ralloc(mem_ctx, aeb_entry);
 152             entry->tmp = reg_undef;
 153             entry->generator = inst;
 154             aeb->push_tail(entry);
 155          } else {
 156             /* This is at least our second sighting of this expression.
 157              * If we don't have a temporary already, make one.
 158              */
 159             bool no_existing_temp = entry->tmp.file == BAD_FILE;
 160             if (no_existing_temp && !entry->generator->dst.is_null()) {
 161                int written = entry->generator->regs_written;
 162
 163                fs_reg orig_dst = entry->generator->dst;
 164                fs_reg tmp = fs_reg(GRF, virtual_grf_alloc(written),
 165                                    orig_dst.type);
 166                entry->tmp = tmp;
 167                entry->generator->dst = tmp;
 168
 169                for (int i = 0; i < written; i++) {
 170                   fs_inst *copy = MOV(orig_dst, tmp);
 171                   copy->force_writemask_all =
 172                      entry->generator->force_writemask_all;
 173                   entry->generator->insert_after(copy);
 174
 175                   orig_dst.reg_offset++;
 176                   tmp.reg_offset++;
 177                }
 178             }
 179
 180             /* dest <- temp */
 181             if (!inst->dst.is_null()) {
 182                int written = inst->regs_written;
 183                assert(written == entry->generator->regs_written);
 184                assert(inst->dst.type == entry->tmp.type);
 185                fs_reg dst = inst->dst;
 186                fs_reg tmp = entry->tmp;
 187                fs_inst *copy = NULL;
 188                for (int i = 0; i < written; i++) {
 189                   copy = MOV(dst, tmp);
 190                   copy->force_writemask_all = inst->force_writemask_all;
 191                   inst->insert_before(copy);
 192
 193                   dst.reg_offset++;
 194                   tmp.reg_offset++;
 195                }
 196             }
 197
 198             /* Set our iterator so that next time through the loop inst->next
 199              * will get the instruction in the basic block after the one we've
 200              * removed.
 201              */
 202             fs_inst *prev = (fs_inst *)inst->prev;
 203
 204             inst->remove();
 205
 206             /* Appending an instruction may have changed our bblock end. */
 207             if (inst == block->end) {
 208                block->end = prev;
 209             }
 210
 211             inst = prev;
 212          }
 213       }
 214
 215       foreach_list_safe(entry_node, aeb) {
 216          aeb_entry *entry = (aeb_entry *)entry_node;
 217
 218          /* Kill all AEB entries that write a different value to or read from
 219           * the flag register if we just wrote it.
 220           */
 221          if (inst->writes_flag()) {
 222             if (entry->generator->reads_flag() ||
 223                 (entry->generator->writes_flag() &&
 224                  !instructions_match(inst, entry->generator))) {
 225                entry->remove();
 226                ralloc_free(entry);
 227                continue;
 228             }
 229          }
 230
 231          for (int i = 0; i < 3; i++) {
 232             fs_reg *src_reg = &entry->generator->src[i];
 233
 234             /* Kill all AEB entries that use the destination we just
 235              * overwrote.
 236              */
 237             if (inst->overwrites_reg(entry->generator->src[i])) {
 238                entry->remove();
 239                ralloc_free(entry);
 240                break;
 241             }
 242
 243             /* Kill any AEB entries using registers that don't get reused any
 244              * more -- a sure sign they'll fail operands_match().
 245              */
 246             if (src_reg->file == GRF && virtual_grf_end[src_reg->reg] < ip) {
 247                entry->remove();
 248                ralloc_free(entry);
 249                break;
 250             }
 251          }
 252       }
 253
 254       ip++;
 255    }
 256
 257    ralloc_free(mem_ctx);
 258
 259    if (progress)
 260       invalidate_live_intervals();
 261
 262    return progress;
 263 }
 264
 265 bool
 266 fs_visitor::opt_cse()
 267 {
 268    bool progress = false;
 269
 270    calculate_live_intervals();
 271
 272    cfg_t cfg(this);
 273
 274    for (int b = 0; b < cfg.num_blocks; b++) {
 275       bblock_t *block = cfg.blocks[b];
 276       exec_list aeb;
 277
 278       progress = opt_cse_local(block, &aeb) || progress;
 279    }
 280
 281    return progress;
 282 }