63d87f942f3ffdf0c6e951a65c8af47672d33473
[mesa.git] / src / mesa / drivers / dri / i965 / brw_fs_cse.cpp
1 /*
2 * Copyright © 2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "brw_fs.h"
25 #include "brw_cfg.h"
26
27 /** @file brw_fs_cse.cpp
28 *
29 * Support for local common subexpression elimination.
30 *
31 * See Muchnick's Advanced Compiler Design and Implementation, section
32 * 13.1 (p378).
33 */
34
35 namespace {
36 struct aeb_entry : public exec_node {
37 /** The instruction that generates the expression value. */
38 fs_inst *generator;
39
40 /** The temporary where the value is stored. */
41 fs_reg tmp;
42 };
43 }
44
45 static bool
46 is_copy_payload(const fs_inst *inst)
47 {
48 const int reg = inst->src[0].reg;
49 if (inst->src[0].reg_offset != 0)
50 return false;
51
52 for (int i = 1; i < inst->sources; i++) {
53 if (inst->src[i].reg != reg ||
54 inst->src[i].reg_offset != i) {
55 return false;
56 }
57 }
58 return true;
59 }
60
61 static bool
62 is_expression(const fs_inst *const inst)
63 {
64 switch (inst->opcode) {
65 case BRW_OPCODE_SEL:
66 case BRW_OPCODE_NOT:
67 case BRW_OPCODE_AND:
68 case BRW_OPCODE_OR:
69 case BRW_OPCODE_XOR:
70 case BRW_OPCODE_SHR:
71 case BRW_OPCODE_SHL:
72 case BRW_OPCODE_ASR:
73 case BRW_OPCODE_CMP:
74 case BRW_OPCODE_CMPN:
75 case BRW_OPCODE_ADD:
76 case BRW_OPCODE_MUL:
77 case BRW_OPCODE_FRC:
78 case BRW_OPCODE_RNDU:
79 case BRW_OPCODE_RNDD:
80 case BRW_OPCODE_RNDE:
81 case BRW_OPCODE_RNDZ:
82 case BRW_OPCODE_LINE:
83 case BRW_OPCODE_PLN:
84 case BRW_OPCODE_MAD:
85 case BRW_OPCODE_LRP:
86 case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
87 case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7:
88 case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD:
89 case FS_OPCODE_CINTERP:
90 case FS_OPCODE_LINTERP:
91 return true;
92 case SHADER_OPCODE_RCP:
93 case SHADER_OPCODE_RSQ:
94 case SHADER_OPCODE_SQRT:
95 case SHADER_OPCODE_EXP2:
96 case SHADER_OPCODE_LOG2:
97 case SHADER_OPCODE_POW:
98 case SHADER_OPCODE_INT_QUOTIENT:
99 case SHADER_OPCODE_INT_REMAINDER:
100 case SHADER_OPCODE_SIN:
101 case SHADER_OPCODE_COS:
102 return inst->mlen == 0;
103 case SHADER_OPCODE_LOAD_PAYLOAD:
104 return !is_copy_payload(inst);
105 default:
106 return inst->is_send_from_grf();
107 }
108 }
109
110 static bool
111 is_expression_commutative(enum opcode op)
112 {
113 switch (op) {
114 case BRW_OPCODE_AND:
115 case BRW_OPCODE_OR:
116 case BRW_OPCODE_XOR:
117 case BRW_OPCODE_ADD:
118 case BRW_OPCODE_MUL:
119 return true;
120 default:
121 return false;
122 }
123 }
124
125 static bool
126 operands_match(fs_inst *a, fs_inst *b)
127 {
128 fs_reg *xs = a->src;
129 fs_reg *ys = b->src;
130
131 if (!is_expression_commutative(a->opcode)) {
132 bool match = true;
133 for (int i = 0; i < a->sources; i++) {
134 if (!xs[i].equals(ys[i])) {
135 match = false;
136 break;
137 }
138 }
139 return match;
140 } else {
141 return (xs[0].equals(ys[0]) && xs[1].equals(ys[1])) ||
142 (xs[1].equals(ys[0]) && xs[0].equals(ys[1]));
143 }
144 }
145
146 static bool
147 instructions_match(fs_inst *a, fs_inst *b)
148 {
149 return a->opcode == b->opcode &&
150 a->saturate == b->saturate &&
151 a->predicate == b->predicate &&
152 a->predicate_inverse == b->predicate_inverse &&
153 a->conditional_mod == b->conditional_mod &&
154 a->dst.type == b->dst.type &&
155 a->sources == b->sources &&
156 (a->is_tex() ? (a->texture_offset == b->texture_offset &&
157 a->mlen == b->mlen &&
158 a->regs_written == b->regs_written &&
159 a->base_mrf == b->base_mrf &&
160 a->sampler == b->sampler &&
161 a->eot == b->eot &&
162 a->header_present == b->header_present &&
163 a->shadow_compare == b->shadow_compare)
164 : true) &&
165 operands_match(a, b);
166 }
167
168 bool
169 fs_visitor::opt_cse_local(bblock_t *block)
170 {
171 bool progress = false;
172 exec_list aeb;
173
174 void *cse_ctx = ralloc_context(NULL);
175
176 int ip = block->start_ip;
177 foreach_inst_in_block(fs_inst, inst, block) {
178 /* Skip some cases. */
179 if (is_expression(inst) && !inst->is_partial_write() &&
180 (inst->dst.file != HW_REG || inst->dst.is_null()))
181 {
182 bool found = false;
183
184 foreach_in_list_use_after(aeb_entry, entry, &aeb) {
185 /* Match current instruction's expression against those in AEB. */
186 if (instructions_match(inst, entry->generator)) {
187 found = true;
188 progress = true;
189 break;
190 }
191 }
192
193 if (!found) {
194 /* Our first sighting of this expression. Create an entry. */
195 aeb_entry *entry = ralloc(cse_ctx, aeb_entry);
196 entry->tmp = reg_undef;
197 entry->generator = inst;
198 aeb.push_tail(entry);
199 } else {
200 /* This is at least our second sighting of this expression.
201 * If we don't have a temporary already, make one.
202 */
203 bool no_existing_temp = entry->tmp.file == BAD_FILE;
204 if (no_existing_temp && !entry->generator->dst.is_null()) {
205 int written = entry->generator->regs_written;
206
207 fs_reg orig_dst = entry->generator->dst;
208 fs_reg tmp = fs_reg(GRF, virtual_grf_alloc(written),
209 orig_dst.type);
210 entry->tmp = tmp;
211 entry->generator->dst = tmp;
212
213 fs_inst *copy;
214 if (written > 1) {
215 fs_reg *sources = ralloc_array(mem_ctx, fs_reg, written);
216 for (int i = 0; i < written; i++) {
217 sources[i] = tmp;
218 sources[i].reg_offset = i;
219 }
220 copy = LOAD_PAYLOAD(orig_dst, sources, written);
221 } else {
222 copy = MOV(orig_dst, tmp);
223 copy->force_writemask_all =
224 entry->generator->force_writemask_all;
225 }
226 entry->generator->insert_after(copy);
227 }
228
229 /* dest <- temp */
230 if (!inst->dst.is_null()) {
231 int written = inst->regs_written;
232 assert(written == entry->generator->regs_written);
233 assert(inst->dst.type == entry->tmp.type);
234 fs_reg dst = inst->dst;
235 fs_reg tmp = entry->tmp;
236 fs_inst *copy;
237 if (written > 1) {
238 fs_reg *sources = ralloc_array(mem_ctx, fs_reg, written);
239 for (int i = 0; i < written; i++) {
240 sources[i] = tmp;
241 sources[i].reg_offset = i;
242 }
243 copy = LOAD_PAYLOAD(dst, sources, written);
244 } else {
245 copy = MOV(dst, tmp);
246 copy->force_writemask_all = inst->force_writemask_all;
247 }
248 inst->insert_before(copy);
249 }
250
251 /* Set our iterator so that next time through the loop inst->next
252 * will get the instruction in the basic block after the one we've
253 * removed.
254 */
255 fs_inst *prev = (fs_inst *)inst->prev;
256
257 inst->remove();
258
259 /* Appending an instruction may have changed our bblock end. */
260 if (inst == block->end) {
261 block->end = prev;
262 }
263
264 inst = prev;
265 }
266 }
267
268 foreach_in_list_safe(aeb_entry, entry, &aeb) {
269 /* Kill all AEB entries that write a different value to or read from
270 * the flag register if we just wrote it.
271 */
272 if (inst->writes_flag()) {
273 if (entry->generator->reads_flag() ||
274 (entry->generator->writes_flag() &&
275 !instructions_match(inst, entry->generator))) {
276 entry->remove();
277 ralloc_free(entry);
278 continue;
279 }
280 }
281
282 for (int i = 0; i < entry->generator->sources; i++) {
283 fs_reg *src_reg = &entry->generator->src[i];
284
285 /* Kill all AEB entries that use the destination we just
286 * overwrote.
287 */
288 if (inst->overwrites_reg(entry->generator->src[i])) {
289 entry->remove();
290 ralloc_free(entry);
291 break;
292 }
293
294 /* Kill any AEB entries using registers that don't get reused any
295 * more -- a sure sign they'll fail operands_match().
296 */
297 if (src_reg->file == GRF && virtual_grf_end[src_reg->reg] < ip) {
298 entry->remove();
299 ralloc_free(entry);
300 break;
301 }
302 }
303 }
304
305 ip++;
306 }
307
308 ralloc_free(cse_ctx);
309
310 return progress;
311 }
312
313 bool
314 fs_visitor::opt_cse()
315 {
316 bool progress = false;
317
318 calculate_live_intervals();
319
320 for (int b = 0; b < cfg->num_blocks; b++) {
321 bblock_t *block = cfg->blocks[b];
322
323 progress = opt_cse_local(block) || progress;
324 }
325
326 if (progress)
327 invalidate_live_intervals();
328
329 return progress;
330 }