src/mesa/drivers/dri/i965/brw_fs_cse.cpp

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "brw_fs.h"
  25 #include "brw_cfg.h"
  26
  27 /** @file brw_fs_cse.cpp
  28  *
  29  * Support for local common subexpression elimination.
  30  *
  31  * See Muchnick's Advanced Compiler Design and Implementation, section
  32  * 13.1 (p378).
  33  */
  34
  35 using namespace brw;
  36
  37 namespace {
  38 struct aeb_entry : public exec_node {
  39    /** The instruction that generates the expression value. */
  40    fs_inst *generator;
  41
  42    /** The temporary where the value is stored. */
  43    fs_reg tmp;
  44 };
  45 }
  46
  47 static bool
  48 is_expression(const fs_visitor *v, const fs_inst *const inst)
  49 {
  50    switch (inst->opcode) {
  51    case BRW_OPCODE_MOV:
  52    case BRW_OPCODE_SEL:
  53    case BRW_OPCODE_NOT:
  54    case BRW_OPCODE_AND:
  55    case BRW_OPCODE_OR:
  56    case BRW_OPCODE_XOR:
  57    case BRW_OPCODE_SHR:
  58    case BRW_OPCODE_SHL:
  59    case BRW_OPCODE_ASR:
  60    case BRW_OPCODE_CMP:
  61    case BRW_OPCODE_CMPN:
  62    case BRW_OPCODE_ADD:
  63    case BRW_OPCODE_MUL:
  64    case SHADER_OPCODE_MULH:
  65    case BRW_OPCODE_FRC:
  66    case BRW_OPCODE_RNDU:
  67    case BRW_OPCODE_RNDD:
  68    case BRW_OPCODE_RNDE:
  69    case BRW_OPCODE_RNDZ:
  70    case BRW_OPCODE_LINE:
  71    case BRW_OPCODE_PLN:
  72    case BRW_OPCODE_MAD:
  73    case BRW_OPCODE_LRP:
  74    case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
  75    case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7:
  76    case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD:
  77    case FS_OPCODE_CINTERP:
  78    case FS_OPCODE_LINTERP:
  79    case SHADER_OPCODE_FIND_LIVE_CHANNEL:
  80    case SHADER_OPCODE_BROADCAST:
  81       return true;
  82    case SHADER_OPCODE_RCP:
  83    case SHADER_OPCODE_RSQ:
  84    case SHADER_OPCODE_SQRT:
  85    case SHADER_OPCODE_EXP2:
  86    case SHADER_OPCODE_LOG2:
  87    case SHADER_OPCODE_POW:
  88    case SHADER_OPCODE_INT_QUOTIENT:
  89    case SHADER_OPCODE_INT_REMAINDER:
  90    case SHADER_OPCODE_SIN:
  91    case SHADER_OPCODE_COS:
  92       return inst->mlen < 2;
  93    case SHADER_OPCODE_LOAD_PAYLOAD:
  94       return !inst->is_copy_payload(v->alloc);
  95    default:
  96       return inst->is_send_from_grf() && !inst->has_side_effects();
  97    }
  98 }
  99
 100 static bool
 101 operands_match(const fs_inst *a, const fs_inst *b, bool *negate)
 102 {
 103    fs_reg *xs = a->src;
 104    fs_reg *ys = b->src;
 105
 106    if (a->opcode == BRW_OPCODE_MAD) {
 107       return xs[0].equals(ys[0]) &&
 108              ((xs[1].equals(ys[1]) && xs[2].equals(ys[2])) ||
 109               (xs[2].equals(ys[1]) && xs[1].equals(ys[2])));
 110    } else if (a->opcode == BRW_OPCODE_MUL && a->dst.type == BRW_REGISTER_TYPE_F) {
 111       bool xs0_negate = xs[0].negate;
 112       bool xs1_negate = xs[1].file == IMM ? xs[1].fixed_hw_reg.dw1.f < 0.0f
 113                                           : xs[1].negate;
 114       bool ys0_negate = ys[0].negate;
 115       bool ys1_negate = ys[1].file == IMM ? ys[1].fixed_hw_reg.dw1.f < 0.0f
 116                                           : ys[1].negate;
 117       float xs1_imm = xs[1].fixed_hw_reg.dw1.f;
 118       float ys1_imm = ys[1].fixed_hw_reg.dw1.f;
 119
 120       xs[0].negate = false;
 121       xs[1].negate = false;
 122       ys[0].negate = false;
 123       ys[1].negate = false;
 124       xs[1].fixed_hw_reg.dw1.f = fabsf(xs[1].fixed_hw_reg.dw1.f);
 125       ys[1].fixed_hw_reg.dw1.f = fabsf(ys[1].fixed_hw_reg.dw1.f);
 126
 127       bool ret = (xs[0].equals(ys[0]) && xs[1].equals(ys[1])) ||
 128                  (xs[1].equals(ys[0]) && xs[0].equals(ys[1]));
 129
 130       xs[0].negate = xs0_negate;
 131       xs[1].negate = xs[1].file == IMM ? false : xs1_negate;
 132       ys[0].negate = ys0_negate;
 133       ys[1].negate = ys[1].file == IMM ? false : ys1_negate;
 134       xs[1].fixed_hw_reg.dw1.f = xs1_imm;
 135       ys[1].fixed_hw_reg.dw1.f = ys1_imm;
 136
 137       *negate = (xs0_negate != xs1_negate) != (ys0_negate != ys1_negate);
 138       return ret;
 139    } else if (!a->is_commutative()) {
 140       bool match = true;
 141       for (int i = 0; i < a->sources; i++) {
 142          if (!xs[i].equals(ys[i])) {
 143             match = false;
 144             break;
 145          }
 146       }
 147       return match;
 148    } else {
 149       return (xs[0].equals(ys[0]) && xs[1].equals(ys[1])) ||
 150              (xs[1].equals(ys[0]) && xs[0].equals(ys[1]));
 151    }
 152 }
 153
 154 static bool
 155 instructions_match(fs_inst *a, fs_inst *b, bool *negate)
 156 {
 157    return a->opcode == b->opcode &&
 158           a->force_writemask_all == b->force_writemask_all &&
 159           a->exec_size == b->exec_size &&
 160           a->force_sechalf == b->force_sechalf &&
 161           a->saturate == b->saturate &&
 162           a->predicate == b->predicate &&
 163           a->predicate_inverse == b->predicate_inverse &&
 164           a->conditional_mod == b->conditional_mod &&
 165           a->flag_subreg == b->flag_subreg &&
 166           a->dst.type == b->dst.type &&
 167           a->offset == b->offset &&
 168           a->mlen == b->mlen &&
 169           a->regs_written == b->regs_written &&
 170           a->base_mrf == b->base_mrf &&
 171           a->eot == b->eot &&
 172           a->header_size == b->header_size &&
 173           a->shadow_compare == b->shadow_compare &&
 174           a->pi_noperspective == b->pi_noperspective &&
 175           a->sources == b->sources &&
 176           operands_match(a, b, negate);
 177 }
 178
 179 static void
 180 create_copy_instr(const fs_builder &bld, fs_inst *inst, fs_reg src, bool negate)
 181 {
 182    int written = inst->regs_written;
 183    int dst_width = inst->exec_size / 8;
 184    fs_inst *copy;
 185
 186    if (written > dst_width) {
 187       fs_reg *payload;
 188       int sources, header_size;
 189       if (inst->opcode == SHADER_OPCODE_LOAD_PAYLOAD) {
 190          sources = inst->sources;
 191          header_size = inst->header_size;
 192       } else {
 193          assert(written % dst_width == 0);
 194          sources = written / dst_width;
 195          header_size = 0;
 196       }
 197
 198       assert(src.file == GRF);
 199       payload = ralloc_array(bld.shader->mem_ctx, fs_reg, sources);
 200       for (int i = 0; i < header_size; i++) {
 201          payload[i] = src;
 202          src.reg_offset++;
 203       }
 204       for (int i = header_size; i < sources; i++) {
 205          payload[i] = src;
 206          src = offset(src, bld, 1);
 207       }
 208       copy = bld.LOAD_PAYLOAD(inst->dst, payload, sources, header_size);
 209    } else {
 210       copy = bld.MOV(inst->dst, src);
 211       copy->src[0].negate = negate;
 212    }
 213    assert(copy->regs_written == written);
 214 }
 215
 216 bool
 217 fs_visitor::opt_cse_local(bblock_t *block)
 218 {
 219    bool progress = false;
 220    exec_list aeb;
 221
 222    void *cse_ctx = ralloc_context(NULL);
 223
 224    int ip = block->start_ip;
 225    foreach_inst_in_block(fs_inst, inst, block) {
 226       /* Skip some cases. */
 227       if (is_expression(this, inst) && !inst->is_partial_write() &&
 228           (inst->dst.file != HW_REG || inst->dst.is_null()))
 229       {
 230          bool found = false;
 231          bool negate = false;
 232
 233          foreach_in_list_use_after(aeb_entry, entry, &aeb) {
 234             /* Match current instruction's expression against those in AEB. */
 235             if (!(entry->generator->dst.is_null() && !inst->dst.is_null()) &&
 236                 instructions_match(inst, entry->generator, &negate)) {
 237                found = true;
 238                progress = true;
 239                break;
 240             }
 241          }
 242
 243          if (!found) {
 244             if (inst->opcode != BRW_OPCODE_MOV ||
 245                 (inst->opcode == BRW_OPCODE_MOV &&
 246                  inst->src[0].file == IMM &&
 247                  inst->src[0].type == BRW_REGISTER_TYPE_VF)) {
 248                /* Our first sighting of this expression.  Create an entry. */
 249                aeb_entry *entry = ralloc(cse_ctx, aeb_entry);
 250                entry->tmp = reg_undef;
 251                entry->generator = inst;
 252                aeb.push_tail(entry);
 253             }
 254          } else {
 255             /* This is at least our second sighting of this expression.
 256              * If we don't have a temporary already, make one.
 257              */
 258             bool no_existing_temp = entry->tmp.file == BAD_FILE;
 259             if (no_existing_temp && !entry->generator->dst.is_null()) {
 260                const fs_builder ibld = fs_builder(this, block, entry->generator)
 261                                        .at(block, entry->generator->next);
 262                int written = entry->generator->regs_written;
 263
 264                entry->tmp = fs_reg(GRF, alloc.allocate(written),
 265                                    entry->generator->dst.type);
 266
 267                create_copy_instr(ibld, entry->generator, entry->tmp, false);
 268
 269                entry->generator->dst = entry->tmp;
 270             }
 271
 272             /* dest <- temp */
 273             if (!inst->dst.is_null()) {
 274                assert(inst->regs_written == entry->generator->regs_written);
 275                assert(inst->dst.type == entry->tmp.type);
 276                const fs_builder ibld(this, block, inst);
 277
 278                create_copy_instr(ibld, inst, entry->tmp, negate);
 279             }
 280
 281             /* Set our iterator so that next time through the loop inst->next
 282              * will get the instruction in the basic block after the one we've
 283              * removed.
 284              */
 285             fs_inst *prev = (fs_inst *)inst->prev;
 286
 287             inst->remove(block);
 288             inst = prev;
 289          }
 290       }
 291
 292       foreach_in_list_safe(aeb_entry, entry, &aeb) {
 293          /* Kill all AEB entries that write a different value to or read from
 294           * the flag register if we just wrote it.
 295           */
 296          if (inst->writes_flag()) {
 297             bool negate; /* dummy */
 298             if (entry->generator->reads_flag() ||
 299                 (entry->generator->writes_flag() &&
 300                  !instructions_match(inst, entry->generator, &negate))) {
 301                entry->remove();
 302                ralloc_free(entry);
 303                continue;
 304             }
 305          }
 306
 307          for (int i = 0; i < entry->generator->sources; i++) {
 308             fs_reg *src_reg = &entry->generator->src[i];
 309
 310             /* Kill all AEB entries that use the destination we just
 311              * overwrote.
 312              */
 313             if (inst->overwrites_reg(entry->generator->src[i])) {
 314                entry->remove();
 315                ralloc_free(entry);
 316                break;
 317             }
 318
 319             /* Kill any AEB entries using registers that don't get reused any
 320              * more -- a sure sign they'll fail operands_match().
 321              */
 322             if (src_reg->file == GRF && virtual_grf_end[src_reg->reg] < ip) {
 323                entry->remove();
 324                ralloc_free(entry);
 325                break;
 326             }
 327          }
 328       }
 329
 330       ip++;
 331    }
 332
 333    ralloc_free(cse_ctx);
 334
 335    return progress;
 336 }
 337
 338 bool
 339 fs_visitor::opt_cse()
 340 {
 341    bool progress = false;
 342
 343    calculate_live_intervals();
 344
 345    foreach_block (block, cfg) {
 346       progress = opt_cse_local(block) || progress;
 347    }
 348
 349    if (progress)
 350       invalidate_live_intervals();
 351
 352    return progress;
 353 }