src/mesa/drivers/dri/i965/brw_fs_cse.cpp

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "brw_fs.h"
  25 #include "brw_cfg.h"
  26
  27 /** @file brw_fs_cse.cpp
  28  *
  29  * Support for local common subexpression elimination.
  30  *
  31  * See Muchnick's Advanced Compiler Design and Implementation, section
  32  * 13.1 (p378).
  33  */
  34
  35 namespace {
  36 struct aeb_entry : public exec_node {
  37    /** The instruction that generates the expression value. */
  38    fs_inst *generator;
  39
  40    /** The temporary where the value is stored. */
  41    fs_reg tmp;
  42 };
  43 }
  44
  45 static bool
  46 is_copy_payload(const fs_inst *inst)
  47 {
  48    const int reg = inst->src[0].reg;
  49    if (inst->src[0].reg_offset != 0)
  50       return false;
  51
  52    for (int i = 1; i < inst->sources; i++) {
  53       if (inst->src[i].reg != reg ||
  54           inst->src[i].reg_offset != i) {
  55          return false;
  56       }
  57    }
  58    return true;
  59 }
  60
  61 static bool
  62 is_expression(const fs_inst *const inst)
  63 {
  64    switch (inst->opcode) {
  65    case BRW_OPCODE_MOV:
  66    case BRW_OPCODE_SEL:
  67    case BRW_OPCODE_NOT:
  68    case BRW_OPCODE_AND:
  69    case BRW_OPCODE_OR:
  70    case BRW_OPCODE_XOR:
  71    case BRW_OPCODE_SHR:
  72    case BRW_OPCODE_SHL:
  73    case BRW_OPCODE_ASR:
  74    case BRW_OPCODE_CMP:
  75    case BRW_OPCODE_CMPN:
  76    case BRW_OPCODE_ADD:
  77    case BRW_OPCODE_MUL:
  78    case BRW_OPCODE_FRC:
  79    case BRW_OPCODE_RNDU:
  80    case BRW_OPCODE_RNDD:
  81    case BRW_OPCODE_RNDE:
  82    case BRW_OPCODE_RNDZ:
  83    case BRW_OPCODE_LINE:
  84    case BRW_OPCODE_PLN:
  85    case BRW_OPCODE_MAD:
  86    case BRW_OPCODE_LRP:
  87    case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
  88    case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7:
  89    case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD:
  90    case FS_OPCODE_CINTERP:
  91    case FS_OPCODE_LINTERP:
  92       return true;
  93    case SHADER_OPCODE_RCP:
  94    case SHADER_OPCODE_RSQ:
  95    case SHADER_OPCODE_SQRT:
  96    case SHADER_OPCODE_EXP2:
  97    case SHADER_OPCODE_LOG2:
  98    case SHADER_OPCODE_POW:
  99    case SHADER_OPCODE_INT_QUOTIENT:
 100    case SHADER_OPCODE_INT_REMAINDER:
 101    case SHADER_OPCODE_SIN:
 102    case SHADER_OPCODE_COS:
 103       return inst->mlen < 2;
 104    case SHADER_OPCODE_LOAD_PAYLOAD:
 105       return !is_copy_payload(inst);
 106    default:
 107       return inst->is_send_from_grf() && !inst->has_side_effects();
 108    }
 109 }
 110
 111 static bool
 112 operands_match(const fs_inst *a, const fs_inst *b)
 113 {
 114    fs_reg *xs = a->src;
 115    fs_reg *ys = b->src;
 116
 117    if (a->opcode == BRW_OPCODE_MAD) {
 118       return xs[0].equals(ys[0]) &&
 119              ((xs[1].equals(ys[1]) && xs[2].equals(ys[2])) ||
 120               (xs[2].equals(ys[1]) && xs[1].equals(ys[2])));
 121    } else if (!a->is_commutative()) {
 122       bool match = true;
 123       for (int i = 0; i < a->sources; i++) {
 124          if (!xs[i].equals(ys[i])) {
 125             match = false;
 126             break;
 127          }
 128       }
 129       return match;
 130    } else {
 131       return (xs[0].equals(ys[0]) && xs[1].equals(ys[1])) ||
 132              (xs[1].equals(ys[0]) && xs[0].equals(ys[1]));
 133    }
 134 }
 135
 136 static bool
 137 instructions_match(fs_inst *a, fs_inst *b)
 138 {
 139    return a->opcode == b->opcode &&
 140           a->saturate == b->saturate &&
 141           a->predicate == b->predicate &&
 142           a->predicate_inverse == b->predicate_inverse &&
 143           a->conditional_mod == b->conditional_mod &&
 144           a->dst.type == b->dst.type &&
 145           a->sources == b->sources &&
 146           (a->is_tex() ? (a->offset == b->offset &&
 147                           a->mlen == b->mlen &&
 148                           a->regs_written == b->regs_written &&
 149                           a->base_mrf == b->base_mrf &&
 150                           a->eot == b->eot &&
 151                           a->header_present == b->header_present &&
 152                           a->shadow_compare == b->shadow_compare)
 153                        : true) &&
 154           operands_match(a, b);
 155 }
 156
 157 bool
 158 fs_visitor::opt_cse_local(bblock_t *block)
 159 {
 160    bool progress = false;
 161    exec_list aeb;
 162
 163    void *cse_ctx = ralloc_context(NULL);
 164
 165    int ip = block->start_ip;
 166    foreach_inst_in_block(fs_inst, inst, block) {
 167       /* Skip some cases. */
 168       if (is_expression(inst) && !inst->is_partial_write() &&
 169           (inst->dst.file != HW_REG || inst->dst.is_null()))
 170       {
 171          bool found = false;
 172
 173          foreach_in_list_use_after(aeb_entry, entry, &aeb) {
 174             /* Match current instruction's expression against those in AEB. */
 175             if (!(entry->generator->dst.is_null() && !inst->dst.is_null()) &&
 176                 instructions_match(inst, entry->generator)) {
 177                found = true;
 178                progress = true;
 179                break;
 180             }
 181          }
 182
 183          if (!found) {
 184             if (inst->opcode != BRW_OPCODE_MOV ||
 185                 (inst->opcode == BRW_OPCODE_MOV &&
 186                  inst->src[0].file == IMM &&
 187                  inst->src[0].type == BRW_REGISTER_TYPE_VF)) {
 188                /* Our first sighting of this expression.  Create an entry. */
 189                aeb_entry *entry = ralloc(cse_ctx, aeb_entry);
 190                entry->tmp = reg_undef;
 191                entry->generator = inst;
 192                aeb.push_tail(entry);
 193             }
 194          } else {
 195             /* This is at least our second sighting of this expression.
 196              * If we don't have a temporary already, make one.
 197              */
 198             bool no_existing_temp = entry->tmp.file == BAD_FILE;
 199             if (no_existing_temp && !entry->generator->dst.is_null()) {
 200                int written = entry->generator->regs_written;
 201                int dst_width = entry->generator->dst.width / 8;
 202                assert(written % dst_width == 0);
 203
 204                fs_reg orig_dst = entry->generator->dst;
 205                fs_reg tmp = fs_reg(GRF, alloc.allocate(written),
 206                                    orig_dst.type, orig_dst.width);
 207                entry->tmp = tmp;
 208                entry->generator->dst = tmp;
 209
 210                fs_inst *copy;
 211                if (written > dst_width) {
 212                   fs_reg *sources = ralloc_array(mem_ctx, fs_reg, written / dst_width);
 213                   for (int i = 0; i < written / dst_width; i++)
 214                      sources[i] = offset(tmp, i);
 215                   copy = LOAD_PAYLOAD(orig_dst, sources, written / dst_width);
 216                } else {
 217                   copy = MOV(orig_dst, tmp);
 218                   copy->force_writemask_all =
 219                      entry->generator->force_writemask_all;
 220                }
 221                entry->generator->insert_after(block, copy);
 222             }
 223
 224             /* dest <- temp */
 225             if (!inst->dst.is_null()) {
 226                int written = inst->regs_written;
 227                int dst_width = inst->dst.width / 8;
 228                assert(written == entry->generator->regs_written);
 229                assert(dst_width == entry->generator->dst.width / 8);
 230                assert(inst->dst.type == entry->tmp.type);
 231                fs_reg dst = inst->dst;
 232                fs_reg tmp = entry->tmp;
 233                fs_inst *copy;
 234                if (written > dst_width) {
 235                   fs_reg *sources = ralloc_array(mem_ctx, fs_reg, written / dst_width);
 236                   for (int i = 0; i < written / dst_width; i++)
 237                      sources[i] = offset(tmp, i);
 238                   copy = LOAD_PAYLOAD(dst, sources, written / dst_width);
 239                } else {
 240                   copy = MOV(dst, tmp);
 241                   copy->force_writemask_all = inst->force_writemask_all;
 242                }
 243                inst->insert_before(block, copy);
 244             }
 245
 246             /* Set our iterator so that next time through the loop inst->next
 247              * will get the instruction in the basic block after the one we've
 248              * removed.
 249              */
 250             fs_inst *prev = (fs_inst *)inst->prev;
 251
 252             inst->remove(block);
 253             inst = prev;
 254          }
 255       }
 256
 257       foreach_in_list_safe(aeb_entry, entry, &aeb) {
 258          /* Kill all AEB entries that write a different value to or read from
 259           * the flag register if we just wrote it.
 260           */
 261          if (inst->writes_flag()) {
 262             if (entry->generator->reads_flag() ||
 263                 (entry->generator->writes_flag() &&
 264                  !instructions_match(inst, entry->generator))) {
 265                entry->remove();
 266                ralloc_free(entry);
 267                continue;
 268             }
 269          }
 270
 271          for (int i = 0; i < entry->generator->sources; i++) {
 272             fs_reg *src_reg = &entry->generator->src[i];
 273
 274             /* Kill all AEB entries that use the destination we just
 275              * overwrote.
 276              */
 277             if (inst->overwrites_reg(entry->generator->src[i])) {
 278                entry->remove();
 279                ralloc_free(entry);
 280                break;
 281             }
 282
 283             /* Kill any AEB entries using registers that don't get reused any
 284              * more -- a sure sign they'll fail operands_match().
 285              */
 286             if (src_reg->file == GRF && virtual_grf_end[src_reg->reg] < ip) {
 287                entry->remove();
 288                ralloc_free(entry);
 289                break;
 290             }
 291          }
 292       }
 293
 294       ip++;
 295    }
 296
 297    ralloc_free(cse_ctx);
 298
 299    return progress;
 300 }
 301
 302 bool
 303 fs_visitor::opt_cse()
 304 {
 305    bool progress = false;
 306
 307    calculate_live_intervals();
 308
 309    foreach_block (block, cfg) {
 310       progress = opt_cse_local(block) || progress;
 311    }
 312
 313    if (progress)
 314       invalidate_live_intervals();
 315
 316    return progress;
 317 }