src/mesa/drivers/dri/i965/brw_fs_cse.cpp

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "brw_fs.h"
  25 #include "brw_cfg.h"
  26
  27 /** @file brw_fs_cse.cpp
  28  *
  29  * Support for local common subexpression elimination.
  30  *
  31  * See Muchnick's Advanced Compiler Design and Implementation, section
  32  * 13.1 (p378).
  33  */
  34
  35 namespace {
  36 struct aeb_entry : public exec_node {
  37    /** The instruction that generates the expression value. */
  38    fs_inst *generator;
  39
  40    /** The temporary where the value is stored. */
  41    fs_reg tmp;
  42 };
  43 }
  44
  45 static bool
  46 is_expression(const fs_visitor *v, const fs_inst *const inst)
  47 {
  48    switch (inst->opcode) {
  49    case BRW_OPCODE_MOV:
  50    case BRW_OPCODE_SEL:
  51    case BRW_OPCODE_NOT:
  52    case BRW_OPCODE_AND:
  53    case BRW_OPCODE_OR:
  54    case BRW_OPCODE_XOR:
  55    case BRW_OPCODE_SHR:
  56    case BRW_OPCODE_SHL:
  57    case BRW_OPCODE_ASR:
  58    case BRW_OPCODE_CMP:
  59    case BRW_OPCODE_CMPN:
  60    case BRW_OPCODE_ADD:
  61    case BRW_OPCODE_MUL:
  62    case BRW_OPCODE_FRC:
  63    case BRW_OPCODE_RNDU:
  64    case BRW_OPCODE_RNDD:
  65    case BRW_OPCODE_RNDE:
  66    case BRW_OPCODE_RNDZ:
  67    case BRW_OPCODE_LINE:
  68    case BRW_OPCODE_PLN:
  69    case BRW_OPCODE_MAD:
  70    case BRW_OPCODE_LRP:
  71    case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
  72    case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7:
  73    case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD:
  74    case FS_OPCODE_CINTERP:
  75    case FS_OPCODE_LINTERP:
  76    case SHADER_OPCODE_FIND_LIVE_CHANNEL:
  77    case SHADER_OPCODE_BROADCAST:
  78       return true;
  79    case SHADER_OPCODE_RCP:
  80    case SHADER_OPCODE_RSQ:
  81    case SHADER_OPCODE_SQRT:
  82    case SHADER_OPCODE_EXP2:
  83    case SHADER_OPCODE_LOG2:
  84    case SHADER_OPCODE_POW:
  85    case SHADER_OPCODE_INT_QUOTIENT:
  86    case SHADER_OPCODE_INT_REMAINDER:
  87    case SHADER_OPCODE_SIN:
  88    case SHADER_OPCODE_COS:
  89       return inst->mlen < 2;
  90    case SHADER_OPCODE_LOAD_PAYLOAD:
  91       return !inst->is_copy_payload(v->alloc);
  92    default:
  93       return inst->is_send_from_grf() && !inst->has_side_effects();
  94    }
  95 }
  96
  97 static bool
  98 operands_match(const fs_inst *a, const fs_inst *b, bool *negate)
  99 {
 100    fs_reg *xs = a->src;
 101    fs_reg *ys = b->src;
 102
 103    if (a->opcode == BRW_OPCODE_MAD) {
 104       return xs[0].equals(ys[0]) &&
 105              ((xs[1].equals(ys[1]) && xs[2].equals(ys[2])) ||
 106               (xs[2].equals(ys[1]) && xs[1].equals(ys[2])));
 107    } else if (a->opcode == BRW_OPCODE_MUL && a->dst.type == BRW_REGISTER_TYPE_F) {
 108       bool xs0_negate = xs[0].negate;
 109       bool xs1_negate = xs[1].file == IMM ? xs[1].fixed_hw_reg.dw1.f < 0.0f
 110                                           : xs[1].negate;
 111       bool ys0_negate = ys[0].negate;
 112       bool ys1_negate = ys[1].file == IMM ? ys[1].fixed_hw_reg.dw1.f < 0.0f
 113                                           : ys[1].negate;
 114       float xs1_imm = xs[1].fixed_hw_reg.dw1.f;
 115       float ys1_imm = ys[1].fixed_hw_reg.dw1.f;
 116
 117       xs[0].negate = false;
 118       xs[1].negate = false;
 119       ys[0].negate = false;
 120       ys[1].negate = false;
 121       xs[1].fixed_hw_reg.dw1.f = fabsf(xs[1].fixed_hw_reg.dw1.f);
 122       ys[1].fixed_hw_reg.dw1.f = fabsf(ys[1].fixed_hw_reg.dw1.f);
 123
 124       bool ret = (xs[0].equals(ys[0]) && xs[1].equals(ys[1])) ||
 125                  (xs[1].equals(ys[0]) && xs[0].equals(ys[1]));
 126
 127       xs[0].negate = xs0_negate;
 128       xs[1].negate = xs[1].file == IMM ? false : xs1_negate;
 129       ys[0].negate = ys0_negate;
 130       ys[1].negate = ys[1].file == IMM ? false : ys1_negate;
 131       xs[1].fixed_hw_reg.dw1.f = xs1_imm;
 132       ys[1].fixed_hw_reg.dw1.f = ys1_imm;
 133
 134       *negate = (xs0_negate != xs1_negate) != (ys0_negate != ys1_negate);
 135       return ret;
 136    } else if (!a->is_commutative()) {
 137       bool match = true;
 138       for (int i = 0; i < a->sources; i++) {
 139          if (!xs[i].equals(ys[i])) {
 140             match = false;
 141             break;
 142          }
 143       }
 144       return match;
 145    } else {
 146       return (xs[0].equals(ys[0]) && xs[1].equals(ys[1])) ||
 147              (xs[1].equals(ys[0]) && xs[0].equals(ys[1]));
 148    }
 149 }
 150
 151 static bool
 152 instructions_match(fs_inst *a, fs_inst *b, bool *negate)
 153 {
 154    return a->opcode == b->opcode &&
 155           a->saturate == b->saturate &&
 156           a->predicate == b->predicate &&
 157           a->predicate_inverse == b->predicate_inverse &&
 158           a->conditional_mod == b->conditional_mod &&
 159           a->dst.type == b->dst.type &&
 160           a->sources == b->sources &&
 161           (a->is_tex() ? (a->offset == b->offset &&
 162                           a->mlen == b->mlen &&
 163                           a->regs_written == b->regs_written &&
 164                           a->base_mrf == b->base_mrf &&
 165                           a->eot == b->eot &&
 166                           a->header_size == b->header_size &&
 167                           a->shadow_compare == b->shadow_compare)
 168                        : true) &&
 169           operands_match(a, b, negate);
 170 }
 171
 172 static fs_inst *
 173 create_copy_instr(fs_visitor *v, fs_inst *inst, fs_reg src, bool negate)
 174 {
 175    int written = inst->regs_written;
 176    int dst_width = inst->dst.width / 8;
 177    fs_inst *copy;
 178
 179    if (written > dst_width) {
 180       fs_reg *payload;
 181       int sources, header_size;
 182       if (inst->opcode == SHADER_OPCODE_LOAD_PAYLOAD) {
 183          sources = inst->sources;
 184          header_size = inst->header_size;
 185       } else {
 186          assert(written % dst_width == 0);
 187          sources = written / dst_width;
 188          header_size = 0;
 189       }
 190
 191       assert(src.file == GRF);
 192       payload = ralloc_array(v->mem_ctx, fs_reg, sources);
 193       for (int i = 0; i < header_size; i++) {
 194          payload[i] = src;
 195          payload[i].width = 8;
 196          src.reg_offset++;
 197       }
 198       for (int i = header_size; i < sources; i++) {
 199          payload[i] = src;
 200          src = offset(src, 1);
 201       }
 202       copy = v->LOAD_PAYLOAD(inst->dst, payload, sources, header_size);
 203    } else {
 204       copy = v->MOV(inst->dst, src);
 205       copy->force_writemask_all = inst->force_writemask_all;
 206       copy->src[0].negate = negate;
 207    }
 208    assert(copy->regs_written == written);
 209
 210    return copy;
 211 }
 212
 213 bool
 214 fs_visitor::opt_cse_local(bblock_t *block)
 215 {
 216    bool progress = false;
 217    exec_list aeb;
 218
 219    void *cse_ctx = ralloc_context(NULL);
 220
 221    int ip = block->start_ip;
 222    foreach_inst_in_block(fs_inst, inst, block) {
 223       /* Skip some cases. */
 224       if (is_expression(this, inst) && !inst->is_partial_write() &&
 225           (inst->dst.file != HW_REG || inst->dst.is_null()))
 226       {
 227          bool found = false;
 228          bool negate = false;
 229
 230          foreach_in_list_use_after(aeb_entry, entry, &aeb) {
 231             /* Match current instruction's expression against those in AEB. */
 232             if (!(entry->generator->dst.is_null() && !inst->dst.is_null()) &&
 233                 instructions_match(inst, entry->generator, &negate)) {
 234                found = true;
 235                progress = true;
 236                break;
 237             }
 238          }
 239
 240          if (!found) {
 241             if (inst->opcode != BRW_OPCODE_MOV ||
 242                 (inst->opcode == BRW_OPCODE_MOV &&
 243                  inst->src[0].file == IMM &&
 244                  inst->src[0].type == BRW_REGISTER_TYPE_VF)) {
 245                /* Our first sighting of this expression.  Create an entry. */
 246                aeb_entry *entry = ralloc(cse_ctx, aeb_entry);
 247                entry->tmp = reg_undef;
 248                entry->generator = inst;
 249                aeb.push_tail(entry);
 250             }
 251          } else {
 252             /* This is at least our second sighting of this expression.
 253              * If we don't have a temporary already, make one.
 254              */
 255             bool no_existing_temp = entry->tmp.file == BAD_FILE;
 256             if (no_existing_temp && !entry->generator->dst.is_null()) {
 257                int written = entry->generator->regs_written;
 258                assert((written * 8) % entry->generator->dst.width == 0);
 259
 260                entry->tmp = fs_reg(GRF, alloc.allocate(written),
 261                                    entry->generator->dst.type,
 262                                    entry->generator->dst.width);
 263
 264                fs_inst *copy = create_copy_instr(this, entry->generator,
 265                                                  entry->tmp, false);
 266                entry->generator->insert_after(block, copy);
 267
 268                entry->generator->dst = entry->tmp;
 269             }
 270
 271             /* dest <- temp */
 272             if (!inst->dst.is_null()) {
 273                assert(inst->regs_written == entry->generator->regs_written);
 274                assert(inst->dst.width == entry->generator->dst.width);
 275                assert(inst->dst.type == entry->tmp.type);
 276
 277                fs_inst *copy = create_copy_instr(this, inst,
 278                                                  entry->tmp, negate);
 279                inst->insert_before(block, copy);
 280             }
 281
 282             /* Set our iterator so that next time through the loop inst->next
 283              * will get the instruction in the basic block after the one we've
 284              * removed.
 285              */
 286             fs_inst *prev = (fs_inst *)inst->prev;
 287
 288             inst->remove(block);
 289             inst = prev;
 290          }
 291       }
 292
 293       foreach_in_list_safe(aeb_entry, entry, &aeb) {
 294          /* Kill all AEB entries that write a different value to or read from
 295           * the flag register if we just wrote it.
 296           */
 297          if (inst->writes_flag()) {
 298             bool negate; /* dummy */
 299             if (entry->generator->reads_flag() ||
 300                 (entry->generator->writes_flag() &&
 301                  !instructions_match(inst, entry->generator, &negate))) {
 302                entry->remove();
 303                ralloc_free(entry);
 304                continue;
 305             }
 306          }
 307
 308          for (int i = 0; i < entry->generator->sources; i++) {
 309             fs_reg *src_reg = &entry->generator->src[i];
 310
 311             /* Kill all AEB entries that use the destination we just
 312              * overwrote.
 313              */
 314             if (inst->overwrites_reg(entry->generator->src[i])) {
 315                entry->remove();
 316                ralloc_free(entry);
 317                break;
 318             }
 319
 320             /* Kill any AEB entries using registers that don't get reused any
 321              * more -- a sure sign they'll fail operands_match().
 322              */
 323             if (src_reg->file == GRF && virtual_grf_end[src_reg->reg] < ip) {
 324                entry->remove();
 325                ralloc_free(entry);
 326                break;
 327             }
 328          }
 329       }
 330
 331       ip++;
 332    }
 333
 334    ralloc_free(cse_ctx);
 335
 336    return progress;
 337 }
 338
 339 bool
 340 fs_visitor::opt_cse()
 341 {
 342    bool progress = false;
 343
 344    calculate_live_intervals();
 345
 346    foreach_block (block, cfg) {
 347       progress = opt_cse_local(block) || progress;
 348    }
 349
 350    if (progress)
 351       invalidate_live_intervals();
 352
 353    return progress;
 354 }