2 * Copyright © 2012 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
27 /** @file brw_fs_cse.cpp
29 * Support for local common subexpression elimination.
31 * See Muchnick's Advanced Compiler Design and Implementation, section
36 struct aeb_entry
: public exec_node
{
37 /** The instruction that generates the expression value. */
40 /** The temporary where the value is stored. */
46 is_expression(const fs_inst
*const inst
)
48 switch (inst
->opcode
) {
70 case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD
:
71 case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7
:
72 case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD
:
73 case FS_OPCODE_CINTERP
:
74 case FS_OPCODE_LINTERP
:
76 case SHADER_OPCODE_RCP
:
77 case SHADER_OPCODE_RSQ
:
78 case SHADER_OPCODE_SQRT
:
79 case SHADER_OPCODE_EXP2
:
80 case SHADER_OPCODE_LOG2
:
81 case SHADER_OPCODE_POW
:
82 case SHADER_OPCODE_INT_QUOTIENT
:
83 case SHADER_OPCODE_INT_REMAINDER
:
84 case SHADER_OPCODE_SIN
:
85 case SHADER_OPCODE_COS
:
86 return inst
->mlen
== 0;
93 is_expression_commutative(enum opcode op
)
108 operands_match(fs_inst
*a
, fs_inst
*b
)
113 if (!is_expression_commutative(a
->opcode
)) {
115 for (int i
= 0; i
< a
->sources
; i
++) {
116 if (!xs
[i
].equals(ys
[i
])) {
123 return (xs
[0].equals(ys
[0]) && xs
[1].equals(ys
[1])) ||
124 (xs
[1].equals(ys
[0]) && xs
[0].equals(ys
[1]));
129 instructions_match(fs_inst
*a
, fs_inst
*b
)
131 return a
->opcode
== b
->opcode
&&
132 a
->saturate
== b
->saturate
&&
133 a
->predicate
== b
->predicate
&&
134 a
->predicate_inverse
== b
->predicate_inverse
&&
135 a
->conditional_mod
== b
->conditional_mod
&&
136 a
->dst
.type
== b
->dst
.type
&&
137 a
->sources
== b
->sources
&&
138 operands_match(a
, b
);
142 fs_visitor::opt_cse_local(bblock_t
*block
, exec_list
*aeb
)
144 bool progress
= false;
146 void *cse_ctx
= ralloc_context(NULL
);
148 int ip
= block
->start_ip
;
149 for (fs_inst
*inst
= (fs_inst
*)block
->start
;
150 inst
!= block
->end
->next
;
151 inst
= (fs_inst
*) inst
->next
) {
153 /* Skip some cases. */
154 if (is_expression(inst
) && !inst
->is_partial_write() &&
155 (inst
->dst
.file
!= HW_REG
|| inst
->dst
.is_null()))
160 foreach_list(entry_node
, aeb
) {
161 entry
= (aeb_entry
*) entry_node
;
163 /* Match current instruction's expression against those in AEB. */
164 if (instructions_match(inst
, entry
->generator
)) {
172 /* Our first sighting of this expression. Create an entry. */
173 aeb_entry
*entry
= ralloc(cse_ctx
, aeb_entry
);
174 entry
->tmp
= reg_undef
;
175 entry
->generator
= inst
;
176 aeb
->push_tail(entry
);
178 /* This is at least our second sighting of this expression.
179 * If we don't have a temporary already, make one.
181 bool no_existing_temp
= entry
->tmp
.file
== BAD_FILE
;
182 if (no_existing_temp
&& !entry
->generator
->dst
.is_null()) {
183 int written
= entry
->generator
->regs_written
;
185 fs_reg orig_dst
= entry
->generator
->dst
;
186 fs_reg tmp
= fs_reg(GRF
, virtual_grf_alloc(written
),
189 entry
->generator
->dst
= tmp
;
191 for (int i
= 0; i
< written
; i
++) {
192 fs_inst
*copy
= MOV(orig_dst
, tmp
);
193 copy
->force_writemask_all
=
194 entry
->generator
->force_writemask_all
;
195 entry
->generator
->insert_after(copy
);
197 orig_dst
.reg_offset
++;
203 if (!inst
->dst
.is_null()) {
204 int written
= inst
->regs_written
;
205 assert(written
== entry
->generator
->regs_written
);
206 assert(inst
->dst
.type
== entry
->tmp
.type
);
207 fs_reg dst
= inst
->dst
;
208 fs_reg tmp
= entry
->tmp
;
209 fs_inst
*copy
= NULL
;
210 for (int i
= 0; i
< written
; i
++) {
211 copy
= MOV(dst
, tmp
);
212 copy
->force_writemask_all
= inst
->force_writemask_all
;
213 inst
->insert_before(copy
);
220 /* Set our iterator so that next time through the loop inst->next
221 * will get the instruction in the basic block after the one we've
224 fs_inst
*prev
= (fs_inst
*)inst
->prev
;
228 /* Appending an instruction may have changed our bblock end. */
229 if (inst
== block
->end
) {
237 foreach_list_safe(entry_node
, aeb
) {
238 aeb_entry
*entry
= (aeb_entry
*)entry_node
;
240 /* Kill all AEB entries that write a different value to or read from
241 * the flag register if we just wrote it.
243 if (inst
->writes_flag()) {
244 if (entry
->generator
->reads_flag() ||
245 (entry
->generator
->writes_flag() &&
246 !instructions_match(inst
, entry
->generator
))) {
253 for (int i
= 0; i
< entry
->generator
->sources
; i
++) {
254 fs_reg
*src_reg
= &entry
->generator
->src
[i
];
256 /* Kill all AEB entries that use the destination we just
259 if (inst
->overwrites_reg(entry
->generator
->src
[i
])) {
265 /* Kill any AEB entries using registers that don't get reused any
266 * more -- a sure sign they'll fail operands_match().
268 if (src_reg
->file
== GRF
&& virtual_grf_end
[src_reg
->reg
] < ip
) {
279 ralloc_free(cse_ctx
);
282 invalidate_live_intervals();
288 fs_visitor::opt_cse()
290 bool progress
= false;
292 calculate_live_intervals();
294 cfg_t
cfg(&instructions
);
296 for (int b
= 0; b
< cfg
.num_blocks
; b
++) {
297 bblock_t
*block
= cfg
.blocks
[b
];
300 progress
= opt_cse_local(block
, &aeb
) || progress
;