i965/fs_cse: Factor out code to create copy instructions
[mesa.git] / src / mesa / drivers / dri / i965 / brw_fs_cse.cpp
1 /*
2 * Copyright © 2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "brw_fs.h"
25 #include "brw_cfg.h"
26
27 /** @file brw_fs_cse.cpp
28 *
29 * Support for local common subexpression elimination.
30 *
31 * See Muchnick's Advanced Compiler Design and Implementation, section
32 * 13.1 (p378).
33 */
34
35 namespace {
36 struct aeb_entry : public exec_node {
37 /** The instruction that generates the expression value. */
38 fs_inst *generator;
39
40 /** The temporary where the value is stored. */
41 fs_reg tmp;
42 };
43 }
44
45 static bool
46 is_copy_payload(const fs_inst *inst)
47 {
48 const int reg = inst->src[0].reg;
49 if (inst->src[0].reg_offset != 0)
50 return false;
51
52 for (int i = 1; i < inst->sources; i++) {
53 if (inst->src[i].reg != reg ||
54 inst->src[i].reg_offset != i) {
55 return false;
56 }
57 }
58 return true;
59 }
60
61 static bool
62 is_expression(const fs_inst *const inst)
63 {
64 switch (inst->opcode) {
65 case BRW_OPCODE_MOV:
66 case BRW_OPCODE_SEL:
67 case BRW_OPCODE_NOT:
68 case BRW_OPCODE_AND:
69 case BRW_OPCODE_OR:
70 case BRW_OPCODE_XOR:
71 case BRW_OPCODE_SHR:
72 case BRW_OPCODE_SHL:
73 case BRW_OPCODE_ASR:
74 case BRW_OPCODE_CMP:
75 case BRW_OPCODE_CMPN:
76 case BRW_OPCODE_ADD:
77 case BRW_OPCODE_MUL:
78 case BRW_OPCODE_FRC:
79 case BRW_OPCODE_RNDU:
80 case BRW_OPCODE_RNDD:
81 case BRW_OPCODE_RNDE:
82 case BRW_OPCODE_RNDZ:
83 case BRW_OPCODE_LINE:
84 case BRW_OPCODE_PLN:
85 case BRW_OPCODE_MAD:
86 case BRW_OPCODE_LRP:
87 case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
88 case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7:
89 case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD:
90 case FS_OPCODE_CINTERP:
91 case FS_OPCODE_LINTERP:
92 case SHADER_OPCODE_FIND_LIVE_CHANNEL:
93 case SHADER_OPCODE_BROADCAST:
94 return true;
95 case SHADER_OPCODE_RCP:
96 case SHADER_OPCODE_RSQ:
97 case SHADER_OPCODE_SQRT:
98 case SHADER_OPCODE_EXP2:
99 case SHADER_OPCODE_LOG2:
100 case SHADER_OPCODE_POW:
101 case SHADER_OPCODE_INT_QUOTIENT:
102 case SHADER_OPCODE_INT_REMAINDER:
103 case SHADER_OPCODE_SIN:
104 case SHADER_OPCODE_COS:
105 return inst->mlen < 2;
106 case SHADER_OPCODE_LOAD_PAYLOAD:
107 return !is_copy_payload(inst);
108 default:
109 return inst->is_send_from_grf() && !inst->has_side_effects();
110 }
111 }
112
113 static bool
114 operands_match(const fs_inst *a, const fs_inst *b, bool *negate)
115 {
116 fs_reg *xs = a->src;
117 fs_reg *ys = b->src;
118
119 if (a->opcode == BRW_OPCODE_MAD) {
120 return xs[0].equals(ys[0]) &&
121 ((xs[1].equals(ys[1]) && xs[2].equals(ys[2])) ||
122 (xs[2].equals(ys[1]) && xs[1].equals(ys[2])));
123 } else if (a->opcode == BRW_OPCODE_MUL && a->dst.type == BRW_REGISTER_TYPE_F) {
124 bool xs0_negate = xs[0].negate;
125 bool xs1_negate = xs[1].file == IMM ? xs[1].fixed_hw_reg.dw1.f < 0.0f
126 : xs[1].negate;
127 bool ys0_negate = ys[0].negate;
128 bool ys1_negate = ys[1].file == IMM ? ys[1].fixed_hw_reg.dw1.f < 0.0f
129 : ys[1].negate;
130 float xs1_imm = xs[1].fixed_hw_reg.dw1.f;
131 float ys1_imm = ys[1].fixed_hw_reg.dw1.f;
132
133 xs[0].negate = false;
134 xs[1].negate = false;
135 ys[0].negate = false;
136 ys[1].negate = false;
137 xs[1].fixed_hw_reg.dw1.f = fabsf(xs[1].fixed_hw_reg.dw1.f);
138 ys[1].fixed_hw_reg.dw1.f = fabsf(ys[1].fixed_hw_reg.dw1.f);
139
140 bool ret = (xs[0].equals(ys[0]) && xs[1].equals(ys[1])) ||
141 (xs[1].equals(ys[0]) && xs[0].equals(ys[1]));
142
143 xs[0].negate = xs0_negate;
144 xs[1].negate = xs[1].file == IMM ? false : xs1_negate;
145 ys[0].negate = ys0_negate;
146 ys[1].negate = ys[1].file == IMM ? false : ys1_negate;
147 xs[1].fixed_hw_reg.dw1.f = xs1_imm;
148 ys[1].fixed_hw_reg.dw1.f = ys1_imm;
149
150 *negate = (xs0_negate != xs1_negate) != (ys0_negate != ys1_negate);
151 return ret;
152 } else if (!a->is_commutative()) {
153 bool match = true;
154 for (int i = 0; i < a->sources; i++) {
155 if (!xs[i].equals(ys[i])) {
156 match = false;
157 break;
158 }
159 }
160 return match;
161 } else {
162 return (xs[0].equals(ys[0]) && xs[1].equals(ys[1])) ||
163 (xs[1].equals(ys[0]) && xs[0].equals(ys[1]));
164 }
165 }
166
167 static bool
168 instructions_match(fs_inst *a, fs_inst *b, bool *negate)
169 {
170 return a->opcode == b->opcode &&
171 a->saturate == b->saturate &&
172 a->predicate == b->predicate &&
173 a->predicate_inverse == b->predicate_inverse &&
174 a->conditional_mod == b->conditional_mod &&
175 a->dst.type == b->dst.type &&
176 a->sources == b->sources &&
177 (a->is_tex() ? (a->offset == b->offset &&
178 a->mlen == b->mlen &&
179 a->regs_written == b->regs_written &&
180 a->base_mrf == b->base_mrf &&
181 a->eot == b->eot &&
182 a->header_present == b->header_present &&
183 a->shadow_compare == b->shadow_compare)
184 : true) &&
185 operands_match(a, b, negate);
186 }
187
188 static fs_inst *
189 create_copy_instr(fs_visitor *v, fs_inst *inst, fs_reg src, bool negate)
190 {
191 int written = inst->regs_written;
192 int dst_width = inst->dst.width / 8;
193 fs_reg dst = inst->dst;
194 fs_inst *copy;
195
196 if (written > dst_width) {
197 fs_reg *sources = ralloc_array(v->mem_ctx, fs_reg, written / dst_width);
198 for (int i = 0; i < written / dst_width; i++)
199 sources[i] = offset(src, i);
200 copy = v->LOAD_PAYLOAD(dst, sources, written / dst_width);
201 } else {
202 copy = v->MOV(dst, src);
203 copy->force_writemask_all = inst->force_writemask_all;
204 copy->src[0].negate = negate;
205 }
206 assert(copy->regs_written == written);
207
208 return copy;
209 }
210
211 bool
212 fs_visitor::opt_cse_local(bblock_t *block)
213 {
214 bool progress = false;
215 exec_list aeb;
216
217 void *cse_ctx = ralloc_context(NULL);
218
219 int ip = block->start_ip;
220 foreach_inst_in_block(fs_inst, inst, block) {
221 /* Skip some cases. */
222 if (is_expression(inst) && !inst->is_partial_write() &&
223 (inst->dst.file != HW_REG || inst->dst.is_null()))
224 {
225 bool found = false;
226 bool negate = false;
227
228 foreach_in_list_use_after(aeb_entry, entry, &aeb) {
229 /* Match current instruction's expression against those in AEB. */
230 if (!(entry->generator->dst.is_null() && !inst->dst.is_null()) &&
231 instructions_match(inst, entry->generator, &negate)) {
232 found = true;
233 progress = true;
234 break;
235 }
236 }
237
238 if (!found) {
239 if (inst->opcode != BRW_OPCODE_MOV ||
240 (inst->opcode == BRW_OPCODE_MOV &&
241 inst->src[0].file == IMM &&
242 inst->src[0].type == BRW_REGISTER_TYPE_VF)) {
243 /* Our first sighting of this expression. Create an entry. */
244 aeb_entry *entry = ralloc(cse_ctx, aeb_entry);
245 entry->tmp = reg_undef;
246 entry->generator = inst;
247 aeb.push_tail(entry);
248 }
249 } else {
250 /* This is at least our second sighting of this expression.
251 * If we don't have a temporary already, make one.
252 */
253 bool no_existing_temp = entry->tmp.file == BAD_FILE;
254 if (no_existing_temp && !entry->generator->dst.is_null()) {
255 int written = entry->generator->regs_written;
256 assert((written * 8) % entry->generator->dst.width == 0);
257
258 entry->tmp = fs_reg(GRF, alloc.allocate(written),
259 entry->generator->dst.type,
260 entry->generator->dst.width);
261
262 fs_inst *copy = create_copy_instr(this, entry->generator,
263 entry->tmp, false);
264 entry->generator->insert_after(block, copy);
265
266 entry->generator->dst = entry->tmp;
267 }
268
269 /* dest <- temp */
270 if (!inst->dst.is_null()) {
271 assert(inst->regs_written == entry->generator->regs_written);
272 assert(inst->dst.width == entry->generator->dst.width);
273 assert(inst->dst.type == entry->tmp.type);
274
275 fs_inst *copy = create_copy_instr(this, inst,
276 entry->tmp, negate);
277 inst->insert_before(block, copy);
278 }
279
280 /* Set our iterator so that next time through the loop inst->next
281 * will get the instruction in the basic block after the one we've
282 * removed.
283 */
284 fs_inst *prev = (fs_inst *)inst->prev;
285
286 inst->remove(block);
287 inst = prev;
288 }
289 }
290
291 foreach_in_list_safe(aeb_entry, entry, &aeb) {
292 /* Kill all AEB entries that write a different value to or read from
293 * the flag register if we just wrote it.
294 */
295 if (inst->writes_flag()) {
296 bool negate; /* dummy */
297 if (entry->generator->reads_flag() ||
298 (entry->generator->writes_flag() &&
299 !instructions_match(inst, entry->generator, &negate))) {
300 entry->remove();
301 ralloc_free(entry);
302 continue;
303 }
304 }
305
306 for (int i = 0; i < entry->generator->sources; i++) {
307 fs_reg *src_reg = &entry->generator->src[i];
308
309 /* Kill all AEB entries that use the destination we just
310 * overwrote.
311 */
312 if (inst->overwrites_reg(entry->generator->src[i])) {
313 entry->remove();
314 ralloc_free(entry);
315 break;
316 }
317
318 /* Kill any AEB entries using registers that don't get reused any
319 * more -- a sure sign they'll fail operands_match().
320 */
321 if (src_reg->file == GRF && virtual_grf_end[src_reg->reg] < ip) {
322 entry->remove();
323 ralloc_free(entry);
324 break;
325 }
326 }
327 }
328
329 ip++;
330 }
331
332 ralloc_free(cse_ctx);
333
334 return progress;
335 }
336
337 bool
338 fs_visitor::opt_cse()
339 {
340 bool progress = false;
341
342 calculate_live_intervals();
343
344 foreach_block (block, cfg) {
345 progress = opt_cse_local(block) || progress;
346 }
347
348 if (progress)
349 invalidate_live_intervals();
350
351 return progress;
352 }