src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #include "brw_cfg.h"
  29 #include "brw_fs_live_variables.h"
  30
  31 using namespace brw;
  32
  33 /** @file brw_fs_live_variables.cpp
  34  *
  35  * Support for computing at the basic block level which variables
  36  * (virtual GRFs in our case) are live at entry and exit.
  37  *
  38  * See Muchnik's Advanced Compiler Design and Implementation, section
  39  * 14.1 (p444).
  40  */
  41
  42 /**
  43  * Sets up the use[] and def[] bitsets.
  44  *
  45  * The basic-block-level live variable analysis needs to know which
  46  * variables get used before they're completely defined, and which
  47  * variables are completely defined before they're used.
  48  */
  49 void
  50 fs_live_variables::setup_def_use()
  51 {
  52    int ip = 0;
  53
  54    for (int b = 0; b < cfg->num_blocks; b++) {
  55       bblock_t *block = cfg->blocks[b];
  56
  57       assert(ip == block->start_ip);
  58       if (b > 0)
  59          assert(cfg->blocks[b - 1]->end_ip == ip - 1);
  60
  61       for (fs_inst *inst = (fs_inst *)block->start;
  62            inst != block->end->next;
  63            inst = (fs_inst *)inst->next) {
  64
  65          /* Set use[] for this instruction */
  66          for (unsigned int i = 0; i < 3; i++) {
  67             if (inst->src[i].file == GRF) {
  68                int reg = inst->src[i].reg;
  69
  70                if (!BITSET_TEST(bd[b].def, reg))
  71                   BITSET_SET(bd[b].use, reg);
  72             }
  73          }
  74
  75          /* Check for unconditional writes to whole registers. These
  76           * are the things that screen off preceding definitions of a
  77           * variable, and thus qualify for being in def[].
  78           */
  79          if (inst->dst.file == GRF &&
  80              inst->regs_written == v->virtual_grf_sizes[inst->dst.reg] &&
  81              !inst->predicate &&
  82              !inst->force_uncompressed &&
  83              !inst->force_sechalf) {
  84             int reg = inst->dst.reg;
  85             if (!BITSET_TEST(bd[b].use, reg))
  86                BITSET_SET(bd[b].def, reg);
  87          }
  88
  89          ip++;
  90       }
  91    }
  92 }
  93
  94 /**
  95  * The algorithm incrementally sets bits in liveout and livein,
  96  * propagating it through control flow.  It will eventually terminate
  97  * because it only ever adds bits, and stops when no bits are added in
  98  * a pass.
  99  */
 100 void
 101 fs_live_variables::compute_live_variables()
 102 {
 103    bool cont = true;
 104
 105    while (cont) {
 106       cont = false;
 107
 108       for (int b = 0; b < cfg->num_blocks; b++) {
 109          /* Update livein */
 110          for (int i = 0; i < bitset_words; i++) {
 111             BITSET_WORD new_livein = (bd[b].use[i] |
 112                                       (bd[b].liveout[i] & ~bd[b].def[i]));
 113             if (new_livein & ~bd[b].livein[i]) {
 114                bd[b].livein[i] |= new_livein;
 115                cont = true;
 116             }
 117          }
 118
 119          /* Update liveout */
 120          foreach_list(block_node, &cfg->blocks[b]->children) {
 121             bblock_link *link = (bblock_link *)block_node;
 122             bblock_t *block = link->block;
 123
 124             for (int i = 0; i < bitset_words; i++) {
 125                BITSET_WORD new_liveout = (bd[block->block_num].livein[i] &
 126                                           ~bd[b].liveout[i]);
 127                if (new_liveout) {
 128                   bd[b].liveout[i] |= new_liveout;
 129                   cont = true;
 130                }
 131             }
 132          }
 133       }
 134    }
 135 }
 136
 137 fs_live_variables::fs_live_variables(fs_visitor *v, cfg_t *cfg)
 138    : v(v), cfg(cfg)
 139 {
 140    mem_ctx = ralloc_context(cfg->mem_ctx);
 141
 142    num_vars = v->virtual_grf_count;
 143    bd = rzalloc_array(mem_ctx, struct block_data, cfg->num_blocks);
 144
 145    bitset_words = (ALIGN(v->virtual_grf_count, BITSET_WORDBITS) /
 146                    BITSET_WORDBITS);
 147    for (int i = 0; i < cfg->num_blocks; i++) {
 148       bd[i].def = rzalloc_array(mem_ctx, BITSET_WORD, bitset_words);
 149       bd[i].use = rzalloc_array(mem_ctx, BITSET_WORD, bitset_words);
 150       bd[i].livein = rzalloc_array(mem_ctx, BITSET_WORD, bitset_words);
 151       bd[i].liveout = rzalloc_array(mem_ctx, BITSET_WORD, bitset_words);
 152    }
 153
 154    setup_def_use();
 155    compute_live_variables();
 156 }
 157
 158 fs_live_variables::~fs_live_variables()
 159 {
 160    ralloc_free(mem_ctx);
 161 }
 162
 163 #define MAX_INSTRUCTION (1 << 30)
 164
 165 void
 166 fs_visitor::calculate_live_intervals()
 167 {
 168    int num_vars = this->virtual_grf_count;
 169
 170    if (this->live_intervals_valid)
 171       return;
 172
 173    int *def = ralloc_array(mem_ctx, int, num_vars);
 174    int *use = ralloc_array(mem_ctx, int, num_vars);
 175    ralloc_free(this->virtual_grf_def);
 176    ralloc_free(this->virtual_grf_use);
 177    this->virtual_grf_def = def;
 178    this->virtual_grf_use = use;
 179
 180    for (int i = 0; i < num_vars; i++) {
 181       def[i] = MAX_INSTRUCTION;
 182       use[i] = -1;
 183    }
 184
 185    /* Start by setting up the intervals with no knowledge of control
 186     * flow.
 187     */
 188    int ip = 0;
 189    foreach_list(node, &this->instructions) {
 190       fs_inst *inst = (fs_inst *)node;
 191
 192       for (unsigned int i = 0; i < 3; i++) {
 193          if (inst->src[i].file == GRF) {
 194             int reg = inst->src[i].reg;
 195
 196             use[reg] = ip;
 197
 198             /* In most cases, a register can be written over safely by the
 199              * same instruction that is its last use.  For a single
 200              * instruction, the sources are dereferenced before writing of the
 201              * destination starts (naturally).  This gets more complicated for
 202              * simd16, because the instruction:
 203              *
 204              * mov(16)      g4<1>F      g4<8,8,1>F   g6<8,8,1>F
 205              *
 206              * is actually decoded in hardware as:
 207              *
 208              * mov(8)       g4<1>F      g4<8,8,1>F   g6<8,8,1>F
 209              * mov(8)       g5<1>F      g5<8,8,1>F   g7<8,8,1>F
 210              *
 211              * Which is safe.  However, if we have uniform accesses
 212              * happening, we get into trouble:
 213              *
 214              * mov(8)       g4<1>F      g4<0,1,0>F   g6<8,8,1>F
 215              * mov(8)       g5<1>F      g4<0,1,0>F   g7<8,8,1>F
 216              *
 217              * Now our destination for the first instruction overwrote the
 218              * second instruction's src0, and we get garbage for those 8
 219              * pixels.  There's a similar issue for the pre-gen6
 220              * pixel_x/pixel_y, which are registers of 16-bit values and thus
 221              * would get stomped by the first decode as well.
 222              */
 223             if (dispatch_width == 16 && (inst->src[i].smear ||
 224                                          (this->pixel_x.reg == reg ||
 225                                           this->pixel_y.reg == reg))) {
 226                use[reg]++;
 227             }
 228          }
 229       }
 230
 231       if (inst->dst.file == GRF) {
 232          int reg = inst->dst.reg;
 233
 234          def[reg] = MIN2(def[reg], ip);
 235       }
 236
 237       ip++;
 238    }
 239
 240    /* Now, extend those intervals using our analysis of control flow. */
 241    cfg_t cfg(this);
 242    fs_live_variables livevars(this, &cfg);
 243
 244    for (int b = 0; b < cfg.num_blocks; b++) {
 245       for (int i = 0; i < num_vars; i++) {
 246          if (BITSET_TEST(livevars.bd[b].livein, i)) {
 247             def[i] = MIN2(def[i], cfg.blocks[b]->start_ip);
 248             use[i] = MAX2(use[i], cfg.blocks[b]->start_ip);
 249          }
 250
 251          if (BITSET_TEST(livevars.bd[b].liveout, i)) {
 252             def[i] = MIN2(def[i], cfg.blocks[b]->end_ip);
 253             use[i] = MAX2(use[i], cfg.blocks[b]->end_ip);
 254          }
 255       }
 256    }
 257
 258    this->live_intervals_valid = true;
 259
 260    /* Note in the non-control-flow code above, that we only take def[] as the
 261     * first store, and use[] as the last use.  We use this in dead code
 262     * elimination, to determine when a store never gets used.  However, we
 263     * also use these arrays to answer the virtual_grf_interferes() question
 264     * (live interval analysis), which is used for register coalescing and
 265     * register allocation.
 266     *
 267     * So, there's a conflict over what the array should mean: if use[]
 268     * considers a def after the last use, then the dead code elimination pass
 269     * never does anything (and it's an important pass!).  But if we don't
 270     * include dead code, then virtual_grf_interferes() lies and we'll do
 271     * horrible things like coalesce the register that is dead-code-written
 272     * into another register that was live across the dead write (causing the
 273     * use of the second register to take the dead write's source value instead
 274     * of the coalesced MOV's source value).
 275     *
 276     * To resolve the conflict, immediately after calculating live intervals,
 277     * detect dead code, nuke it, and if we changed anything, calculate again
 278     * before returning to the caller.  Now we happen to produce def[] and
 279     * use[] arrays that will work for virtual_grf_interferes().
 280     */
 281    if (dead_code_eliminate())
 282       calculate_live_intervals();
 283 }
 284
 285 bool
 286 fs_visitor::virtual_grf_interferes(int a, int b)
 287 {
 288    int a_def = this->virtual_grf_def[a], a_use = this->virtual_grf_use[a];
 289    int b_def = this->virtual_grf_def[b], b_use = this->virtual_grf_use[b];
 290
 291    /* If there's dead code (def but not use), it would break our test
 292     * unless we consider it used.
 293     */
 294    if ((a_use == -1 && a_def != MAX_INSTRUCTION) ||
 295        (b_use == -1 && b_def != MAX_INSTRUCTION)) {
 296       return true;
 297    }
 298
 299    int start = MAX2(a_def, b_def);
 300    int end = MIN2(a_use, b_use);
 301
 302    return start < end;
 303 }