41176c742364800360125877f8de4f356ff144c5
2 * Copyright © 2012 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
29 #include "brw_fs_live_variables.h"
33 #define MAX_INSTRUCTION (1 << 30)
35 /** @file brw_fs_live_variables.cpp
37 * Support for calculating liveness information about virtual GRFs.
39 * This produces a live interval for each whole virtual GRF. We could
40 * choose to expose per-component live intervals for VGRFs of size > 1,
41 * but we currently do not. It is easier for the consumers of this
42 * information to work with whole VGRFs.
44 * However, we internally track use/def information at the per-component
45 * (reg_offset) level for greater accuracy. Large VGRFs may be accessed
46 * piecemeal over many (possibly non-adjacent) instructions. In this case,
47 * examining a single instruction is insufficient to decide whether a whole
48 * VGRF is ultimately used or defined. Tracking individual components
49 * allows us to easily assemble this information.
51 * See Muchnik's Advanced Compiler Design and Implementation, section
56 fs_live_variables::setup_one_read(bblock_t
*block
, fs_inst
*inst
,
59 int var
= var_from_vgrf
[reg
.reg
] + reg
.reg_offset
;
61 /* In most cases, a register can be written over safely by the
62 * same instruction that is its last use. For a single
63 * instruction, the sources are dereferenced before writing of the
64 * destination starts (naturally). This gets more complicated for
65 * simd16, because the instruction:
67 * mov(16) g4<1>F g4<8,8,1>F g6<8,8,1>F
69 * is actually decoded in hardware as:
71 * mov(8) g4<1>F g4<8,8,1>F g6<8,8,1>F
72 * mov(8) g5<1>F g5<8,8,1>F g7<8,8,1>F
74 * Which is safe. However, if we have uniform accesses
75 * happening, we get into trouble:
77 * mov(8) g4<1>F g4<0,1,0>F g6<8,8,1>F
78 * mov(8) g5<1>F g4<0,1,0>F g7<8,8,1>F
80 * Now our destination for the first instruction overwrote the
81 * second instruction's src0, and we get garbage for those 8
82 * pixels. There's a similar issue for the pre-gen6
83 * pixel_x/pixel_y, which are registers of 16-bit values and thus
84 * would get stomped by the first decode as well.
87 if (v
->dispatch_width
== 16 && (reg
.smear
!= -1 ||
88 (v
->pixel_x
.reg
== reg
.reg
||
89 v
->pixel_y
.reg
== reg
.reg
))) {
93 start
[var
] = MIN2(start
[var
], ip
);
94 end
[var
] = MAX2(end
[var
], end_ip
);
96 /* The use[] bitset marks when the block makes use of a variable (VGRF
97 * channel) without having completely defined that variable within the
100 if (!BITSET_TEST(bd
[block
->block_num
].def
, var
))
101 BITSET_SET(bd
[block
->block_num
].use
, var
);
105 fs_live_variables::setup_one_write(bblock_t
*block
, fs_inst
*inst
,
108 int var
= var_from_vgrf
[reg
.reg
] + reg
.reg_offset
;
110 start
[var
] = MIN2(start
[var
], ip
);
111 end
[var
] = MAX2(end
[var
], ip
);
113 /* The def[] bitset marks when an initialization in a block completely
114 * screens off previous updates of that variable (VGRF channel).
116 if (inst
->dst
.file
== GRF
&& !inst
->is_partial_write()) {
117 if (!BITSET_TEST(bd
[block
->block_num
].use
, var
))
118 BITSET_SET(bd
[block
->block_num
].def
, var
);
123 * Sets up the use[] and def[] bitsets.
125 * The basic-block-level live variable analysis needs to know which
126 * variables get used before they're completely defined, and which
127 * variables are completely defined before they're used.
129 * These are tracked at the per-component level, rather than whole VGRFs.
132 fs_live_variables::setup_def_use()
136 for (int b
= 0; b
< cfg
->num_blocks
; b
++) {
137 bblock_t
*block
= cfg
->blocks
[b
];
139 assert(ip
== block
->start_ip
);
141 assert(cfg
->blocks
[b
- 1]->end_ip
== ip
- 1);
143 for (fs_inst
*inst
= (fs_inst
*)block
->start
;
144 inst
!= block
->end
->next
;
145 inst
= (fs_inst
*)inst
->next
) {
147 /* Set use[] for this instruction */
148 for (unsigned int i
= 0; i
< 3; i
++) {
149 fs_reg reg
= inst
->src
[i
];
155 /* We don't know how many components are read in a send-from-grf,
156 * so just assume "all of them."
158 if (inst
->is_send_from_grf())
159 regs_read
= v
->virtual_grf_sizes
[reg
.reg
];
161 for (int i
= 0; i
< regs_read
; i
++) {
162 setup_one_read(block
, inst
, ip
, reg
);
167 /* Set def[] for this instruction */
168 if (inst
->dst
.file
== GRF
) {
169 fs_reg reg
= inst
->dst
;
170 for (int j
= 0; j
< inst
->regs_written
; j
++) {
171 setup_one_write(block
, inst
, ip
, reg
);
182 * The algorithm incrementally sets bits in liveout and livein,
183 * propagating it through control flow. It will eventually terminate
184 * because it only ever adds bits, and stops when no bits are added in
188 fs_live_variables::compute_live_variables()
195 for (int b
= 0; b
< cfg
->num_blocks
; b
++) {
197 for (int i
= 0; i
< bitset_words
; i
++) {
198 BITSET_WORD new_livein
= (bd
[b
].use
[i
] |
199 (bd
[b
].liveout
[i
] & ~bd
[b
].def
[i
]));
200 if (new_livein
& ~bd
[b
].livein
[i
]) {
201 bd
[b
].livein
[i
] |= new_livein
;
207 foreach_list(block_node
, &cfg
->blocks
[b
]->children
) {
208 bblock_link
*link
= (bblock_link
*)block_node
;
209 bblock_t
*block
= link
->block
;
211 for (int i
= 0; i
< bitset_words
; i
++) {
212 BITSET_WORD new_liveout
= (bd
[block
->block_num
].livein
[i
] &
215 bd
[b
].liveout
[i
] |= new_liveout
;
225 * Extend the start/end ranges for each variable to account for the
226 * new information calculated from control flow.
229 fs_live_variables::compute_start_end()
231 for (int b
= 0; b
< cfg
->num_blocks
; b
++) {
232 for (int i
= 0; i
< num_vars
; i
++) {
233 if (BITSET_TEST(bd
[b
].livein
, i
)) {
234 start
[i
] = MIN2(start
[i
], cfg
->blocks
[b
]->start_ip
);
235 end
[i
] = MAX2(end
[i
], cfg
->blocks
[b
]->start_ip
);
238 if (BITSET_TEST(bd
[b
].liveout
, i
)) {
239 start
[i
] = MIN2(start
[i
], cfg
->blocks
[b
]->end_ip
);
240 end
[i
] = MAX2(end
[i
], cfg
->blocks
[b
]->end_ip
);
247 fs_live_variables::fs_live_variables(fs_visitor
*v
, cfg_t
*cfg
)
252 num_vgrfs
= v
->virtual_grf_count
;
254 var_from_vgrf
= rzalloc_array(mem_ctx
, int, num_vgrfs
);
255 for (int i
= 0; i
< num_vgrfs
; i
++) {
256 var_from_vgrf
[i
] = num_vars
;
257 num_vars
+= v
->virtual_grf_sizes
[i
];
260 vgrf_from_var
= rzalloc_array(mem_ctx
, int, num_vars
);
261 for (int i
= 0; i
< num_vgrfs
; i
++) {
262 for (int j
= 0; j
< v
->virtual_grf_sizes
[i
]; j
++) {
263 vgrf_from_var
[var_from_vgrf
[i
] + j
] = i
;
267 start
= ralloc_array(mem_ctx
, int, num_vars
);
268 end
= rzalloc_array(mem_ctx
, int, num_vars
);
269 for (int i
= 0; i
< num_vars
; i
++) {
270 start
[i
] = MAX_INSTRUCTION
;
274 bd
= rzalloc_array(mem_ctx
, struct block_data
, cfg
->num_blocks
);
276 bitset_words
= BITSET_WORDS(num_vars
);
277 for (int i
= 0; i
< cfg
->num_blocks
; i
++) {
278 bd
[i
].def
= rzalloc_array(mem_ctx
, BITSET_WORD
, bitset_words
);
279 bd
[i
].use
= rzalloc_array(mem_ctx
, BITSET_WORD
, bitset_words
);
280 bd
[i
].livein
= rzalloc_array(mem_ctx
, BITSET_WORD
, bitset_words
);
281 bd
[i
].liveout
= rzalloc_array(mem_ctx
, BITSET_WORD
, bitset_words
);
285 compute_live_variables();
289 fs_live_variables::~fs_live_variables()
291 ralloc_free(mem_ctx
);
295 fs_visitor::invalidate_live_intervals()
297 ralloc_free(live_intervals
);
298 live_intervals
= NULL
;
302 * Compute the live intervals for each virtual GRF.
304 * This uses the per-component use/def data, but combines it to produce
305 * information about whole VGRFs.
308 fs_visitor::calculate_live_intervals()
310 if (this->live_intervals
)
313 int num_vgrfs
= this->virtual_grf_count
;
314 ralloc_free(this->virtual_grf_start
);
315 ralloc_free(this->virtual_grf_end
);
316 virtual_grf_start
= ralloc_array(mem_ctx
, int, num_vgrfs
);
317 virtual_grf_end
= ralloc_array(mem_ctx
, int, num_vgrfs
);
319 for (int i
= 0; i
< num_vgrfs
; i
++) {
320 virtual_grf_start
[i
] = MAX_INSTRUCTION
;
321 virtual_grf_end
[i
] = -1;
325 this->live_intervals
= new(mem_ctx
) fs_live_variables(this, &cfg
);
327 /* Merge the per-component live ranges to whole VGRF live ranges. */
328 for (int i
= 0; i
< live_intervals
->num_vars
; i
++) {
329 int vgrf
= live_intervals
->vgrf_from_var
[i
];
330 virtual_grf_start
[vgrf
] = MIN2(virtual_grf_start
[vgrf
],
331 live_intervals
->start
[i
]);
332 virtual_grf_end
[vgrf
] = MAX2(virtual_grf_end
[vgrf
],
333 live_intervals
->end
[i
]);
338 fs_visitor::virtual_grf_interferes(int a
, int b
)
340 return !(virtual_grf_end
[a
] <= virtual_grf_start
[b
] ||
341 virtual_grf_end
[b
] <= virtual_grf_start
[a
]);