2 * Copyright © 2012 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
29 #include "brw_fs_live_variables.h"
33 #define MAX_INSTRUCTION (1 << 30)
35 /** @file brw_fs_live_variables.cpp
37 * Support for calculating liveness information about virtual GRFs.
39 * This produces a live interval for each whole virtual GRF. We could
40 * choose to expose per-component live intervals for VGRFs of size > 1,
41 * but we currently do not. It is easier for the consumers of this
42 * information to work with whole VGRFs.
44 * However, we internally track use/def information at the per-component
45 * (reg_offset) level for greater accuracy. Large VGRFs may be accessed
46 * piecemeal over many (possibly non-adjacent) instructions. In this case,
47 * examining a single instruction is insufficient to decide whether a whole
48 * VGRF is ultimately used or defined. Tracking individual components
49 * allows us to easily assemble this information.
51 * See Muchnick's Advanced Compiler Design and Implementation, section
56 fs_live_variables::setup_one_read(struct block_data
*bd
, fs_inst
*inst
,
57 int ip
, const fs_reg
®
)
59 int var
= var_from_reg(reg
);
60 assert(var
< num_vars
);
62 start
[var
] = MIN2(start
[var
], ip
);
63 end
[var
] = MAX2(end
[var
], ip
);
65 /* The use[] bitset marks when the block makes use of a variable (VGRF
66 * channel) without having completely defined that variable within the
69 if (!BITSET_TEST(bd
->def
, var
))
70 BITSET_SET(bd
->use
, var
);
74 fs_live_variables::setup_one_write(struct block_data
*bd
, fs_inst
*inst
,
75 int ip
, const fs_reg
®
)
77 int var
= var_from_reg(reg
);
78 assert(var
< num_vars
);
80 start
[var
] = MIN2(start
[var
], ip
);
81 end
[var
] = MAX2(end
[var
], ip
);
83 /* The def[] bitset marks when an initialization in a block completely
84 * screens off previous updates of that variable (VGRF channel).
86 if (inst
->dst
.file
== VGRF
&& !inst
->is_partial_write()) {
87 if (!BITSET_TEST(bd
->use
, var
))
88 BITSET_SET(bd
->def
, var
);
93 * Sets up the use[] and def[] bitsets.
95 * The basic-block-level live variable analysis needs to know which
96 * variables get used before they're completely defined, and which
97 * variables are completely defined before they're used.
99 * These are tracked at the per-component level, rather than whole VGRFs.
102 fs_live_variables::setup_def_use()
106 foreach_block (block
, cfg
) {
107 assert(ip
== block
->start_ip
);
109 assert(cfg
->blocks
[block
->num
- 1]->end_ip
== ip
- 1);
111 struct block_data
*bd
= &block_data
[block
->num
];
113 foreach_inst_in_block(fs_inst
, inst
, block
) {
114 /* Set use[] for this instruction */
115 for (unsigned int i
= 0; i
< inst
->sources
; i
++) {
116 fs_reg reg
= inst
->src
[i
];
118 if (reg
.file
!= VGRF
)
121 for (int j
= 0; j
< inst
->regs_read(i
); j
++) {
122 setup_one_read(bd
, inst
, ip
, reg
);
126 if (inst
->reads_flag()) {
127 /* The vertical combination predicates read f0.0 and f0.1. */
128 if (inst
->predicate
== BRW_PREDICATE_ALIGN1_ANYV
||
129 inst
->predicate
== BRW_PREDICATE_ALIGN1_ALLV
) {
130 assert(inst
->flag_subreg
== 0);
131 if (!BITSET_TEST(bd
->flag_def
, 1)) {
132 BITSET_SET(bd
->flag_use
, 1);
135 if (!BITSET_TEST(bd
->flag_def
, inst
->flag_subreg
)) {
136 BITSET_SET(bd
->flag_use
, inst
->flag_subreg
);
140 /* Set def[] for this instruction */
141 if (inst
->dst
.file
== VGRF
) {
142 fs_reg reg
= inst
->dst
;
143 for (int j
= 0; j
< inst
->regs_written
; j
++) {
144 setup_one_write(bd
, inst
, ip
, reg
);
148 if (inst
->writes_flag()) {
149 if (!BITSET_TEST(bd
->flag_use
, inst
->flag_subreg
)) {
150 BITSET_SET(bd
->flag_def
, inst
->flag_subreg
);
160 * The algorithm incrementally sets bits in liveout and livein,
161 * propagating it through control flow. It will eventually terminate
162 * because it only ever adds bits, and stops when no bits are added in
166 fs_live_variables::compute_live_variables()
173 foreach_block_reverse (block
, cfg
) {
174 struct block_data
*bd
= &block_data
[block
->num
];
177 foreach_list_typed(bblock_link
, child_link
, link
, &block
->children
) {
178 struct block_data
*child_bd
= &block_data
[child_link
->block
->num
];
180 for (int i
= 0; i
< bitset_words
; i
++) {
181 BITSET_WORD new_liveout
= (child_bd
->livein
[i
] &
184 bd
->liveout
[i
] |= new_liveout
;
188 BITSET_WORD new_liveout
= (child_bd
->flag_livein
[0] &
189 ~bd
->flag_liveout
[0]);
191 bd
->flag_liveout
[0] |= new_liveout
;
197 for (int i
= 0; i
< bitset_words
; i
++) {
198 BITSET_WORD new_livein
= (bd
->use
[i
] |
201 if (new_livein
& ~bd
->livein
[i
]) {
202 bd
->livein
[i
] |= new_livein
;
206 BITSET_WORD new_livein
= (bd
->flag_use
[0] |
207 (bd
->flag_liveout
[0] &
209 if (new_livein
& ~bd
->flag_livein
[0]) {
210 bd
->flag_livein
[0] |= new_livein
;
218 * Extend the start/end ranges for each variable to account for the
219 * new information calculated from control flow.
222 fs_live_variables::compute_start_end()
224 foreach_block (block
, cfg
) {
225 struct block_data
*bd
= &block_data
[block
->num
];
227 for (int i
= 0; i
< num_vars
; i
++) {
228 if (BITSET_TEST(bd
->livein
, i
)) {
229 start
[i
] = MIN2(start
[i
], block
->start_ip
);
230 end
[i
] = MAX2(end
[i
], block
->start_ip
);
233 if (BITSET_TEST(bd
->liveout
, i
)) {
234 start
[i
] = MIN2(start
[i
], block
->end_ip
);
235 end
[i
] = MAX2(end
[i
], block
->end_ip
);
241 fs_live_variables::fs_live_variables(fs_visitor
*v
, const cfg_t
*cfg
)
244 mem_ctx
= ralloc_context(NULL
);
246 num_vgrfs
= v
->alloc
.count
;
248 var_from_vgrf
= rzalloc_array(mem_ctx
, int, num_vgrfs
);
249 for (int i
= 0; i
< num_vgrfs
; i
++) {
250 var_from_vgrf
[i
] = num_vars
;
251 num_vars
+= v
->alloc
.sizes
[i
];
254 vgrf_from_var
= rzalloc_array(mem_ctx
, int, num_vars
);
255 for (int i
= 0; i
< num_vgrfs
; i
++) {
256 for (unsigned j
= 0; j
< v
->alloc
.sizes
[i
]; j
++) {
257 vgrf_from_var
[var_from_vgrf
[i
] + j
] = i
;
261 start
= ralloc_array(mem_ctx
, int, num_vars
);
262 end
= rzalloc_array(mem_ctx
, int, num_vars
);
263 for (int i
= 0; i
< num_vars
; i
++) {
264 start
[i
] = MAX_INSTRUCTION
;
268 block_data
= rzalloc_array(mem_ctx
, struct block_data
, cfg
->num_blocks
);
270 bitset_words
= BITSET_WORDS(num_vars
);
271 for (int i
= 0; i
< cfg
->num_blocks
; i
++) {
272 block_data
[i
].def
= rzalloc_array(mem_ctx
, BITSET_WORD
, bitset_words
);
273 block_data
[i
].use
= rzalloc_array(mem_ctx
, BITSET_WORD
, bitset_words
);
274 block_data
[i
].livein
= rzalloc_array(mem_ctx
, BITSET_WORD
, bitset_words
);
275 block_data
[i
].liveout
= rzalloc_array(mem_ctx
, BITSET_WORD
, bitset_words
);
277 block_data
[i
].flag_def
[0] = 0;
278 block_data
[i
].flag_use
[0] = 0;
279 block_data
[i
].flag_livein
[0] = 0;
280 block_data
[i
].flag_liveout
[0] = 0;
284 compute_live_variables();
288 fs_live_variables::~fs_live_variables()
290 ralloc_free(mem_ctx
);
294 fs_visitor::invalidate_live_intervals()
296 ralloc_free(live_intervals
);
297 live_intervals
= NULL
;
301 * Compute the live intervals for each virtual GRF.
303 * This uses the per-component use/def data, but combines it to produce
304 * information about whole VGRFs.
307 fs_visitor::calculate_live_intervals()
309 if (this->live_intervals
)
312 int num_vgrfs
= this->alloc
.count
;
313 ralloc_free(this->virtual_grf_start
);
314 ralloc_free(this->virtual_grf_end
);
315 virtual_grf_start
= ralloc_array(mem_ctx
, int, num_vgrfs
);
316 virtual_grf_end
= ralloc_array(mem_ctx
, int, num_vgrfs
);
318 for (int i
= 0; i
< num_vgrfs
; i
++) {
319 virtual_grf_start
[i
] = MAX_INSTRUCTION
;
320 virtual_grf_end
[i
] = -1;
323 this->live_intervals
= new(mem_ctx
) fs_live_variables(this, cfg
);
325 /* Merge the per-component live ranges to whole VGRF live ranges. */
326 for (int i
= 0; i
< live_intervals
->num_vars
; i
++) {
327 int vgrf
= live_intervals
->vgrf_from_var
[i
];
328 virtual_grf_start
[vgrf
] = MIN2(virtual_grf_start
[vgrf
],
329 live_intervals
->start
[i
]);
330 virtual_grf_end
[vgrf
] = MAX2(virtual_grf_end
[vgrf
],
331 live_intervals
->end
[i
]);
336 fs_live_variables::vars_interfere(int a
, int b
)
338 return !(end
[b
] <= start
[a
] ||
343 fs_visitor::virtual_grf_interferes(int a
, int b
)
345 return !(virtual_grf_end
[a
] <= virtual_grf_start
[b
] ||
346 virtual_grf_end
[b
] <= virtual_grf_start
[a
]);