src/mesa/drivers/dri/i965/brw_fs_register_coalesce.cpp

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 /** @file brw_fs_register_coalesce.cpp
  25  *
  26  * Implements register coalescing: Checks if the two registers involved in a
  27  * raw move don't interfere, in which case they can both be stored in the same
  28  * place and the MOV removed.
  29  *
  30  * To do this, all uses of the source of the MOV in the shader are replaced
  31  * with the destination of the MOV. For example:
  32  *
  33  * add vgrf3:F, vgrf1:F, vgrf2:F
  34  * mov vgrf4:F, vgrf3:F
  35  * mul vgrf5:F, vgrf5:F, vgrf4:F
  36  *
  37  * becomes
  38  *
  39  * add vgrf4:F, vgrf1:F, vgrf2:F
  40  * mul vgrf5:F, vgrf5:F, vgrf4:F
  41  */
  42
  43 #include "brw_fs.h"
  44 #include "brw_fs_live_variables.h"
  45
  46 static bool
  47 is_coalesce_candidate(const fs_inst *inst, const int *virtual_grf_sizes)
  48 {
  49    if (inst->opcode != BRW_OPCODE_MOV ||
  50        inst->is_partial_write() ||
  51        inst->saturate ||
  52        inst->src[0].file != GRF ||
  53        inst->src[0].negate ||
  54        inst->src[0].abs ||
  55        !inst->src[0].is_contiguous() ||
  56        inst->dst.file != GRF ||
  57        inst->dst.type != inst->src[0].type) {
  58       return false;
  59    }
  60
  61    if (virtual_grf_sizes[inst->src[0].reg] >
  62        virtual_grf_sizes[inst->dst.reg])
  63       return false;
  64
  65    return true;
  66 }
  67
  68 static bool
  69 can_coalesce_vars(brw::fs_live_variables *live_intervals,
  70                   const exec_list *instructions, const fs_inst *inst,
  71                   int var_to, int var_from)
  72 {
  73    if (live_intervals->vars_interfere(var_from, var_to) &&
  74        !inst->dst.equals(inst->src[0])) {
  75
  76       /* We know that the live ranges of A (var_from) and B (var_to)
  77        * interfere because of the ->vars_interfere() call above. If the end
  78        * of B's live range is after the end of A's range, then we know two
  79        * things:
  80        *  - the start of B's live range must be in A's live range (since we
  81        *    already know the two ranges interfere, this is the only remaining
  82        *    possibility)
  83        *  - the interference isn't of the form we're looking for (where B is
  84        *    entirely inside A)
  85        */
  86       if (live_intervals->end[var_to] > live_intervals->end[var_from])
  87          return false;
  88
  89       int scan_ip = -1;
  90
  91       foreach_list(n, instructions) {
  92          fs_inst *scan_inst = (fs_inst *)n;
  93          scan_ip++;
  94
  95          if (scan_inst->is_control_flow())
  96             return false;
  97
  98          if (scan_ip <= live_intervals->start[var_to])
  99             continue;
 100
 101          if (scan_ip > live_intervals->end[var_to])
 102             break;
 103
 104          if (scan_inst->dst.equals(inst->dst) ||
 105              scan_inst->dst.equals(inst->src[0]))
 106             return false;
 107       }
 108    }
 109
 110    return true;
 111 }
 112
 113 bool
 114 fs_visitor::register_coalesce()
 115 {
 116    bool progress = false;
 117
 118    calculate_live_intervals();
 119
 120    int src_size = 0;
 121    int channels_remaining = 0;
 122    int reg_from = -1, reg_to = -1;
 123    int reg_to_offset[MAX_SAMPLER_MESSAGE_SIZE];
 124    fs_inst *mov[MAX_SAMPLER_MESSAGE_SIZE];
 125
 126    foreach_list(node, &this->instructions) {
 127       fs_inst *inst = (fs_inst *)node;
 128
 129       if (!is_coalesce_candidate(inst, virtual_grf_sizes))
 130          continue;
 131
 132       int var_from = live_intervals->var_from_reg(&inst->src[0]);
 133       int var_to = live_intervals->var_from_reg(&inst->dst);
 134
 135       if (!can_coalesce_vars(live_intervals, &instructions, inst, var_to, var_from))
 136          continue;
 137
 138       if (reg_from != inst->src[0].reg) {
 139          reg_from = inst->src[0].reg;
 140
 141          src_size = virtual_grf_sizes[inst->src[0].reg];
 142          assert(src_size <= MAX_SAMPLER_MESSAGE_SIZE);
 143
 144          channels_remaining = src_size;
 145          memset(mov, 0, sizeof(mov));
 146
 147          reg_to = inst->dst.reg;
 148       }
 149
 150       if (reg_to != inst->dst.reg)
 151          continue;
 152
 153       const int offset = inst->src[0].reg_offset;
 154       reg_to_offset[offset] = inst->dst.reg_offset;
 155       mov[offset] = inst;
 156       channels_remaining--;
 157
 158       if (channels_remaining)
 159          continue;
 160
 161       bool removed = false;
 162       for (int i = 0; i < src_size; i++) {
 163          if (mov[i]) {
 164             removed = true;
 165
 166             mov[i]->opcode = BRW_OPCODE_NOP;
 167             mov[i]->conditional_mod = BRW_CONDITIONAL_NONE;
 168             mov[i]->dst = reg_undef;
 169             mov[i]->src[0] = reg_undef;
 170             mov[i]->src[1] = reg_undef;
 171             mov[i]->src[2] = reg_undef;
 172          }
 173       }
 174
 175       foreach_list(node, &this->instructions) {
 176          fs_inst *scan_inst = (fs_inst *)node;
 177
 178          for (int i = 0; i < src_size; i++) {
 179             if (mov[i]) {
 180                if (scan_inst->dst.file == GRF &&
 181                    scan_inst->dst.reg == reg_from &&
 182                    scan_inst->dst.reg_offset == i) {
 183                   scan_inst->dst.reg = reg_to;
 184                   scan_inst->dst.reg_offset = reg_to_offset[i];
 185                }
 186                for (int j = 0; j < 3; j++) {
 187                   if (scan_inst->src[j].file == GRF &&
 188                       scan_inst->src[j].reg == reg_from &&
 189                       scan_inst->src[j].reg_offset == i) {
 190                      scan_inst->src[j].reg = reg_to;
 191                      scan_inst->src[j].reg_offset = reg_to_offset[i];
 192                   }
 193                }
 194             }
 195          }
 196       }
 197
 198       if (removed) {
 199          live_intervals->start[var_to] = MIN2(live_intervals->start[var_to],
 200                                               live_intervals->start[var_from]);
 201          live_intervals->end[var_to] = MAX2(live_intervals->end[var_to],
 202                                             live_intervals->end[var_from]);
 203          reg_from = -1;
 204       }
 205    }
 206
 207    foreach_list_safe(node, &this->instructions) {
 208       fs_inst *inst = (fs_inst *)node;
 209
 210       if (inst->opcode == BRW_OPCODE_NOP) {
 211          inst->remove();
 212          progress = true;
 213       }
 214    }
 215
 216    if (progress)
 217       invalidate_live_intervals();
 218
 219    return progress;
 220 }