i965/nir/vec4: Add get_nir_dst() and get_nir_src() methods
[mesa.git] / src / mesa / drivers / dri / i965 / brw_fs_surface_builder.cpp
1 /*
2 * Copyright © 2013-2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "brw_fs_surface_builder.h"
25 #include "brw_fs.h"
26
27 using namespace brw;
28
29 namespace brw {
30 namespace surface_access {
31 namespace {
32 /**
33 * Generate a logical send opcode for a surface message and return
34 * the result.
35 */
36 fs_reg
37 emit_send(const fs_builder &bld, enum opcode opcode,
38 const fs_reg &addr, const fs_reg &src, const fs_reg &surface,
39 unsigned dims, unsigned arg, unsigned rsize,
40 brw_predicate pred = BRW_PREDICATE_NONE)
41 {
42 /* Reduce the dynamically uniform surface index to a single
43 * scalar.
44 */
45 const fs_reg usurface = bld.emit_uniformize(surface);
46 const fs_reg srcs[] = {
47 addr, src, usurface, fs_reg(dims), fs_reg(arg)
48 };
49 const fs_reg dst = bld.vgrf(BRW_REGISTER_TYPE_UD, rsize);
50 fs_inst *inst = bld.emit(opcode, dst, srcs, ARRAY_SIZE(srcs));
51
52 inst->regs_written = rsize * bld.dispatch_width() / 8;
53 inst->predicate = pred;
54 return dst;
55 }
56 }
57
58 /**
59 * Emit an untyped surface read opcode. \p dims determines the number
60 * of components of the address and \p size the number of components of
61 * the returned value.
62 */
63 fs_reg
64 emit_untyped_read(const fs_builder &bld,
65 const fs_reg &surface, const fs_reg &addr,
66 unsigned dims, unsigned size,
67 brw_predicate pred)
68 {
69 return emit_send(bld, SHADER_OPCODE_UNTYPED_SURFACE_READ_LOGICAL,
70 addr, fs_reg(), surface, dims, size, size, pred);
71 }
72
73 /**
74 * Emit an untyped surface write opcode. \p dims determines the number
75 * of components of the address and \p size the number of components of
76 * the argument.
77 */
78 void
79 emit_untyped_write(const fs_builder &bld, const fs_reg &surface,
80 const fs_reg &addr, const fs_reg &src,
81 unsigned dims, unsigned size,
82 brw_predicate pred)
83 {
84 emit_send(bld, SHADER_OPCODE_UNTYPED_SURFACE_WRITE_LOGICAL,
85 addr, src, surface, dims, size, 0, pred);
86 }
87
88 /**
89 * Emit an untyped surface atomic opcode. \p dims determines the number
90 * of components of the address and \p rsize the number of components of
91 * the returned value (either zero or one).
92 */
93 fs_reg
94 emit_untyped_atomic(const fs_builder &bld,
95 const fs_reg &surface, const fs_reg &addr,
96 const fs_reg &src0, const fs_reg &src1,
97 unsigned dims, unsigned rsize, unsigned op,
98 brw_predicate pred)
99 {
100 /* FINISHME: Factor out this frequently recurring pattern into a
101 * helper function.
102 */
103 const unsigned n = (src0.file != BAD_FILE) + (src1.file != BAD_FILE);
104 const fs_reg srcs[] = { src0, src1 };
105 const fs_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_UD, n);
106 bld.LOAD_PAYLOAD(tmp, srcs, n, 0);
107
108 return emit_send(bld, SHADER_OPCODE_UNTYPED_ATOMIC_LOGICAL,
109 addr, tmp, surface, dims, op, rsize, pred);
110 }
111
112 /**
113 * Emit a typed surface read opcode. \p dims determines the number of
114 * components of the address and \p size the number of components of the
115 * returned value.
116 */
117 fs_reg
118 emit_typed_read(const fs_builder &bld, const fs_reg &surface,
119 const fs_reg &addr, unsigned dims, unsigned size)
120 {
121 return emit_send(bld, SHADER_OPCODE_TYPED_SURFACE_READ_LOGICAL,
122 addr, fs_reg(), surface, dims, size, size);
123 }
124
125 /**
126 * Emit a typed surface write opcode. \p dims determines the number of
127 * components of the address and \p size the number of components of the
128 * argument.
129 */
130 void
131 emit_typed_write(const fs_builder &bld, const fs_reg &surface,
132 const fs_reg &addr, const fs_reg &src,
133 unsigned dims, unsigned size)
134 {
135 emit_send(bld, SHADER_OPCODE_TYPED_SURFACE_WRITE_LOGICAL,
136 addr, src, surface, dims, size, 0);
137 }
138
139 /**
140 * Emit a typed surface atomic opcode. \p dims determines the number of
141 * components of the address and \p rsize the number of components of
142 * the returned value (either zero or one).
143 */
144 fs_reg
145 emit_typed_atomic(const fs_builder &bld, const fs_reg &surface,
146 const fs_reg &addr,
147 const fs_reg &src0, const fs_reg &src1,
148 unsigned dims, unsigned rsize, unsigned op,
149 brw_predicate pred)
150 {
151 /* FINISHME: Factor out this frequently recurring pattern into a
152 * helper function.
153 */
154 const unsigned n = (src0.file != BAD_FILE) + (src1.file != BAD_FILE);
155 const fs_reg srcs[] = { src0, src1 };
156 const fs_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_UD, n);
157 bld.LOAD_PAYLOAD(tmp, srcs, n, 0);
158
159 return emit_send(bld, SHADER_OPCODE_TYPED_ATOMIC_LOGICAL,
160 addr, tmp, surface, dims, op, rsize);
161 }
162 }
163 }