i965/fs: Implement texelFetch() on Gen4.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_gs.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32 #include "main/glheader.h"
33 #include "main/macros.h"
34 #include "main/enums.h"
35
36 #include "intel_batchbuffer.h"
37
38 #include "brw_defines.h"
39 #include "brw_context.h"
40 #include "brw_eu.h"
41 #include "brw_util.h"
42 #include "brw_state.h"
43 #include "brw_gs.h"
44
45 #include "glsl/ralloc.h"
46
47 static void compile_gs_prog( struct brw_context *brw,
48 struct brw_gs_prog_key *key )
49 {
50 struct intel_context *intel = &brw->intel;
51 struct brw_gs_compile c;
52 const GLuint *program;
53 void *mem_ctx;
54 GLuint program_size;
55
56 /* Gen6: VF has already converted into polygon, and LINELOOP is
57 * converted to LINESTRIP at the beginning of the 3D pipeline.
58 */
59 if (intel->gen >= 6)
60 return;
61
62 memset(&c, 0, sizeof(c));
63
64 c.key = *key;
65 /* The geometry shader needs to access the entire VUE. */
66 struct brw_vue_map vue_map;
67 brw_compute_vue_map(&vue_map, intel, c.key.nr_userclip, c.key.attrs);
68 c.nr_regs = (vue_map.num_slots + 1)/2;
69
70 mem_ctx = NULL;
71
72 /* Begin the compilation:
73 */
74 brw_init_compile(brw, &c.func, mem_ctx);
75
76 c.func.single_program_flow = 1;
77
78 /* For some reason the thread is spawned with only 4 channels
79 * unmasked.
80 */
81 brw_set_mask_control(&c.func, BRW_MASK_DISABLE);
82
83
84 /* Note that primitives which don't require a GS program have
85 * already been weeded out by this stage:
86 */
87
88 switch (key->primitive) {
89 case GL_QUADS:
90 brw_gs_quads( &c, key );
91 break;
92 case GL_QUAD_STRIP:
93 brw_gs_quad_strip( &c, key );
94 break;
95 case GL_LINE_LOOP:
96 brw_gs_lines( &c );
97 break;
98 default:
99 ralloc_free(mem_ctx);
100 return;
101 }
102
103 /* get the program
104 */
105 program = brw_get_program(&c.func, &program_size);
106
107 if (unlikely(INTEL_DEBUG & DEBUG_GS)) {
108 int i;
109
110 printf("gs:\n");
111 for (i = 0; i < program_size / sizeof(struct brw_instruction); i++)
112 brw_disasm(stdout, &((struct brw_instruction *)program)[i],
113 intel->gen);
114 printf("\n");
115 }
116
117 brw_upload_cache(&brw->cache, BRW_GS_PROG,
118 &c.key, sizeof(c.key),
119 program, program_size,
120 &c.prog_data, sizeof(c.prog_data),
121 &brw->gs.prog_offset, &brw->gs.prog_data);
122 ralloc_free(mem_ctx);
123 }
124
125 static const GLenum gs_prim[GL_POLYGON+1] = {
126 GL_POINTS,
127 GL_LINES,
128 GL_LINE_LOOP,
129 GL_LINES,
130 GL_TRIANGLES,
131 GL_TRIANGLES,
132 GL_TRIANGLES,
133 GL_QUADS,
134 GL_QUAD_STRIP,
135 GL_TRIANGLES
136 };
137
138 static void populate_key( struct brw_context *brw,
139 struct brw_gs_prog_key *key )
140 {
141 struct gl_context *ctx = &brw->intel.ctx;
142 struct intel_context *intel = &brw->intel;
143
144 memset(key, 0, sizeof(*key));
145
146 /* CACHE_NEW_VS_PROG */
147 key->attrs = brw->vs.prog_data->outputs_written;
148
149 /* BRW_NEW_PRIMITIVE */
150 key->primitive = gs_prim[brw->primitive];
151
152 /* _NEW_LIGHT */
153 key->pv_first = (ctx->Light.ProvokingVertex == GL_FIRST_VERTEX_CONVENTION);
154 if (key->primitive == GL_QUADS && ctx->Light.ShadeModel != GL_FLAT) {
155 /* Provide consistent primitive order with brw_set_prim's
156 * optimization of single quads to trifans.
157 */
158 key->pv_first = GL_TRUE;
159 }
160
161 /* _NEW_TRANSFORM */
162 key->nr_userclip = brw_count_bits(ctx->Transform.ClipPlanesEnabled);
163
164 key->need_gs_prog = (intel->gen >= 6)
165 ? 0
166 : (brw->primitive == GL_QUADS ||
167 brw->primitive == GL_QUAD_STRIP ||
168 brw->primitive == GL_LINE_LOOP);
169 }
170
171 /* Calculate interpolants for triangle and line rasterization.
172 */
173 static void prepare_gs_prog(struct brw_context *brw)
174 {
175 struct brw_gs_prog_key key;
176 /* Populate the key:
177 */
178 populate_key(brw, &key);
179
180 if (brw->gs.prog_active != key.need_gs_prog) {
181 brw->state.dirty.cache |= CACHE_NEW_GS_PROG;
182 brw->gs.prog_active = key.need_gs_prog;
183 }
184
185 if (brw->gs.prog_active) {
186 if (!brw_search_cache(&brw->cache, BRW_GS_PROG,
187 &key, sizeof(key),
188 &brw->gs.prog_offset, &brw->gs.prog_data)) {
189 compile_gs_prog( brw, &key );
190 }
191 }
192 }
193
194
195 const struct brw_tracked_state brw_gs_prog = {
196 .dirty = {
197 .mesa = (_NEW_LIGHT |
198 _NEW_TRANSFORM),
199 .brw = BRW_NEW_PRIMITIVE,
200 .cache = CACHE_NEW_VS_PROG
201 },
202 .prepare = prepare_gs_prog
203 };