src/mesa/drivers/dri/i965/brw_gs.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32 #include "main/glheader.h"
  33 #include "main/macros.h"
  34 #include "main/enums.h"
  35
  36 #include "intel_batchbuffer.h"
  37
  38 #include "brw_defines.h"
  39 #include "brw_context.h"
  40 #include "brw_eu.h"
  41 #include "brw_util.h"
  42 #include "brw_state.h"
  43 #include "brw_gs.h"
  44
  45
  46
  47 static void compile_gs_prog( struct brw_context *brw,
  48                              struct brw_gs_prog_key *key )
  49 {
  50    struct intel_context *intel = &brw->intel;
  51    struct brw_gs_compile c;
  52    const GLuint *program;
  53    GLuint program_size;
  54
  55    memset(&c, 0, sizeof(c));
  56
  57    c.key = *key;
  58    /* Need to locate the two positions present in vertex + header.
  59     * These are currently hardcoded:
  60     */
  61    c.nr_attrs = brw_count_bits(c.key.attrs);
  62
  63    if (intel->gen >= 5)
  64        c.nr_regs = (c.nr_attrs + 1) / 2 + 3;  /* are vertices packed, or reg-aligned? */
  65    else
  66        c.nr_regs = (c.nr_attrs + 1) / 2 + 1;  /* are vertices packed, or reg-aligned? */
  67
  68    c.nr_bytes = c.nr_regs * REG_SIZE;
  69
  70
  71    /* Begin the compilation:
  72     */
  73    brw_init_compile(brw, &c.func);
  74
  75    c.func.single_program_flow = 1;
  76
  77    /* For some reason the thread is spawned with only 4 channels
  78     * unmasked.
  79     */
  80    brw_set_mask_control(&c.func, BRW_MASK_DISABLE);
  81
  82
  83    /* Note that primitives which don't require a GS program have
  84     * already been weeded out by this stage:
  85     */
  86
  87    /* Gen6: VF has already converted into polygon, and LINELOOP is
  88     * converted to LINESTRIP at the beginning of the 3D pipeline.
  89     */
  90    if (intel->gen == 6)
  91       return;
  92
  93    switch (key->primitive) {
  94    case GL_QUADS:
  95       brw_gs_quads( &c, key );
  96       break;
  97    case GL_QUAD_STRIP:
  98       brw_gs_quad_strip( &c, key );
  99       break;
 100    case GL_LINE_LOOP:
 101       brw_gs_lines( &c );
 102       break;
 103    default:
 104       return;
 105    }
 106
 107    /* get the program
 108     */
 109    program = brw_get_program(&c.func, &program_size);
 110
 111    if (unlikely(INTEL_DEBUG & DEBUG_GS)) {
 112       int i;
 113
 114       printf("gs:\n");
 115       for (i = 0; i < program_size / sizeof(struct brw_instruction); i++)
 116          brw_disasm(stdout, &((struct brw_instruction *)program)[i],
 117                     intel->gen);
 118       printf("\n");
 119     }
 120
 121    /* Upload
 122     */
 123    drm_intel_bo_unreference(brw->gs.prog_bo);
 124    brw->gs.prog_bo = brw_upload_cache_with_auxdata(&brw->cache, BRW_GS_PROG,
 125                                                    &c.key, sizeof(c.key),
 126                                                    NULL, 0,
 127                                                    program, program_size,
 128                                                    &c.prog_data,
 129                                                    sizeof(c.prog_data),
 130                                                    &brw->gs.prog_data);
 131 }
 132
 133 static const GLenum gs_prim[GL_POLYGON+1] = {
 134    GL_POINTS,
 135    GL_LINES,
 136    GL_LINE_LOOP,
 137    GL_LINES,
 138    GL_TRIANGLES,
 139    GL_TRIANGLES,
 140    GL_TRIANGLES,
 141    GL_QUADS,
 142    GL_QUAD_STRIP,
 143    GL_TRIANGLES
 144 };
 145
 146 static void populate_key( struct brw_context *brw,
 147                           struct brw_gs_prog_key *key )
 148 {
 149    struct gl_context *ctx = &brw->intel.ctx;
 150    struct intel_context *intel = &brw->intel;
 151
 152    memset(key, 0, sizeof(*key));
 153
 154    /* CACHE_NEW_VS_PROG */
 155    key->attrs = brw->vs.prog_data->outputs_written;
 156
 157    /* BRW_NEW_PRIMITIVE */
 158    key->primitive = gs_prim[brw->primitive];
 159
 160    /* _NEW_LIGHT */
 161    key->pv_first = (ctx->Light.ProvokingVertex == GL_FIRST_VERTEX_CONVENTION);
 162    if (key->primitive == GL_QUADS && ctx->Light.ShadeModel != GL_FLAT) {
 163       /* Provide consistent primitive order with brw_set_prim's
 164        * optimization of single quads to trifans.
 165        */
 166       key->pv_first = GL_TRUE;
 167    }
 168
 169    key->need_gs_prog = (intel->gen == 6)
 170       ? 0
 171       : (brw->primitive == GL_QUADS ||
 172          brw->primitive == GL_QUAD_STRIP ||
 173          brw->primitive == GL_LINE_LOOP);
 174 }
 175
 176 /* Calculate interpolants for triangle and line rasterization.
 177  */
 178 static void prepare_gs_prog(struct brw_context *brw)
 179 {
 180    struct brw_gs_prog_key key;
 181    /* Populate the key:
 182     */
 183    populate_key(brw, &key);
 184
 185    if (brw->gs.prog_active != key.need_gs_prog) {
 186       brw->state.dirty.cache |= CACHE_NEW_GS_PROG;
 187       brw->gs.prog_active = key.need_gs_prog;
 188    }
 189
 190    drm_intel_bo_unreference(brw->gs.prog_bo);
 191    brw->gs.prog_bo = NULL;
 192
 193    if (brw->gs.prog_active) {
 194       brw->gs.prog_bo = brw_search_cache(&brw->cache, BRW_GS_PROG,
 195                                          &key, sizeof(key),
 196                                          NULL, 0,
 197                                          &brw->gs.prog_data);
 198       if (brw->gs.prog_bo == NULL)
 199          compile_gs_prog( brw, &key );
 200    }
 201 }
 202
 203
 204 const struct brw_tracked_state brw_gs_prog = {
 205    .dirty = {
 206       .mesa  = _NEW_LIGHT,
 207       .brw   = BRW_NEW_PRIMITIVE,
 208       .cache = CACHE_NEW_VS_PROG
 209    },
 210    .prepare = prepare_gs_prog
 211 };