26c91e4c76acea56ab8b6ac01c1cadfa276f5431
[mesa.git] / src / mesa / drivers / dri / i965 / brw_gs.c
1 /*
2 * Copyright © 2013 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24 /**
25 * \file brw_vec4_gs.c
26 *
27 * State atom for client-programmable geometry shaders, and support code.
28 */
29
30 #include "brw_gs.h"
31 #include "brw_context.h"
32 #include "brw_vec4_gs_visitor.h"
33 #include "brw_state.h"
34 #include "brw_ff_gs.h"
35 #include "brw_nir.h"
36
37 static void
38 assign_gs_binding_table_offsets(const struct brw_device_info *devinfo,
39 const struct gl_shader_program *shader_prog,
40 const struct gl_program *prog,
41 struct brw_gs_prog_data *prog_data)
42 {
43 /* In gen6 we reserve the first BRW_MAX_SOL_BINDINGS entries for transform
44 * feedback surfaces.
45 */
46 uint32_t reserved = devinfo->gen == 6 ? BRW_MAX_SOL_BINDINGS : 0;
47
48 brw_assign_common_binding_table_offsets(MESA_SHADER_GEOMETRY, devinfo,
49 shader_prog, prog,
50 &prog_data->base.base,
51 reserved);
52 }
53
54 bool
55 brw_codegen_gs_prog(struct brw_context *brw,
56 struct gl_shader_program *prog,
57 struct brw_geometry_program *gp,
58 struct brw_gs_prog_key *key)
59 {
60 struct brw_stage_state *stage_state = &brw->gs.base;
61 struct brw_gs_compile c;
62 memset(&c, 0, sizeof(c));
63 c.key = *key;
64 c.gp = gp;
65
66 c.prog_data.include_primitive_id =
67 (gp->program.Base.InputsRead & VARYING_BIT_PRIMITIVE_ID) != 0;
68
69 c.prog_data.invocations = gp->program.Invocations;
70
71 assign_gs_binding_table_offsets(brw->intelScreen->devinfo, prog,
72 &gp->program.Base, &c.prog_data);
73
74 /* Allocate the references to the uniforms that will end up in the
75 * prog_data associated with the compiled program, and which will be freed
76 * by the state cache.
77 *
78 * Note: param_count needs to be num_uniform_components * 4, since we add
79 * padding around uniform values below vec4 size, so the worst case is that
80 * every uniform is a float which gets padded to the size of a vec4.
81 */
82 struct gl_shader *gs = prog->_LinkedShaders[MESA_SHADER_GEOMETRY];
83 int param_count = gp->program.Base.nir->num_uniforms * 4;
84
85 c.prog_data.base.base.param =
86 rzalloc_array(NULL, const gl_constant_value *, param_count);
87 c.prog_data.base.base.pull_param =
88 rzalloc_array(NULL, const gl_constant_value *, param_count);
89 c.prog_data.base.base.image_param =
90 rzalloc_array(NULL, struct brw_image_param, gs->NumImages);
91 c.prog_data.base.base.nr_params = param_count;
92 c.prog_data.base.base.nr_image_params = gs->NumImages;
93
94 brw_nir_setup_glsl_uniforms(gp->program.Base.nir, prog, &gp->program.Base,
95 &c.prog_data.base.base, false);
96
97 if (brw->gen >= 8) {
98 c.prog_data.static_vertex_count = !gp->program.Base.nir ? -1 :
99 nir_gs_count_vertices(gp->program.Base.nir);
100 }
101
102 if (brw->gen >= 7) {
103 if (gp->program.OutputType == GL_POINTS) {
104 /* When the output type is points, the geometry shader may output data
105 * to multiple streams, and EndPrimitive() has no effect. So we
106 * configure the hardware to interpret the control data as stream ID.
107 */
108 c.prog_data.control_data_format = GEN7_GS_CONTROL_DATA_FORMAT_GSCTL_SID;
109
110 /* We only have to emit control bits if we are using streams */
111 if (prog->Geom.UsesStreams)
112 c.control_data_bits_per_vertex = 2;
113 else
114 c.control_data_bits_per_vertex = 0;
115 } else {
116 /* When the output type is triangle_strip or line_strip, EndPrimitive()
117 * may be used to terminate the current strip and start a new one
118 * (similar to primitive restart), and outputting data to multiple
119 * streams is not supported. So we configure the hardware to interpret
120 * the control data as EndPrimitive information (a.k.a. "cut bits").
121 */
122 c.prog_data.control_data_format = GEN7_GS_CONTROL_DATA_FORMAT_GSCTL_CUT;
123
124 /* We only need to output control data if the shader actually calls
125 * EndPrimitive().
126 */
127 c.control_data_bits_per_vertex = gp->program.UsesEndPrimitive ? 1 : 0;
128 }
129 } else {
130 /* There are no control data bits in gen6. */
131 c.control_data_bits_per_vertex = 0;
132
133 /* If it is using transform feedback, enable it */
134 if (prog->TransformFeedback.NumVarying)
135 c.prog_data.gen6_xfb_enabled = true;
136 else
137 c.prog_data.gen6_xfb_enabled = false;
138 }
139 c.control_data_header_size_bits =
140 gp->program.VerticesOut * c.control_data_bits_per_vertex;
141
142 /* 1 HWORD = 32 bytes = 256 bits */
143 c.prog_data.control_data_header_size_hwords =
144 ALIGN(c.control_data_header_size_bits, 256) / 256;
145
146 GLbitfield64 outputs_written = gp->program.Base.OutputsWritten;
147
148 brw_compute_vue_map(brw->intelScreen->devinfo,
149 &c.prog_data.base.vue_map, outputs_written,
150 prog ? prog->SeparateShader : false);
151
152 /* Compute the output vertex size.
153 *
154 * From the Ivy Bridge PRM, Vol2 Part1 7.2.1.1 STATE_GS - Output Vertex
155 * Size (p168):
156 *
157 * [0,62] indicating [1,63] 16B units
158 *
159 * Specifies the size of each vertex stored in the GS output entry
160 * (following any Control Header data) as a number of 128-bit units
161 * (minus one).
162 *
163 * Programming Restrictions: The vertex size must be programmed as a
164 * multiple of 32B units with the following exception: Rendering is
165 * disabled (as per SOL stage state) and the vertex size output by the
166 * GS thread is 16B.
167 *
168 * If rendering is enabled (as per SOL state) the vertex size must be
169 * programmed as a multiple of 32B units. In other words, the only time
170 * software can program a vertex size with an odd number of 16B units
171 * is when rendering is disabled.
172 *
173 * Note: B=bytes in the above text.
174 *
175 * It doesn't seem worth the extra trouble to optimize the case where the
176 * vertex size is 16B (especially since this would require special-casing
177 * the GEN assembly that writes to the URB). So we just set the vertex
178 * size to a multiple of 32B (2 vec4's) in all cases.
179 *
180 * The maximum output vertex size is 62*16 = 992 bytes (31 hwords). We
181 * budget that as follows:
182 *
183 * 512 bytes for varyings (a varying component is 4 bytes and
184 * gl_MaxGeometryOutputComponents = 128)
185 * 16 bytes overhead for VARYING_SLOT_PSIZ (each varying slot is 16
186 * bytes)
187 * 16 bytes overhead for gl_Position (we allocate it a slot in the VUE
188 * even if it's not used)
189 * 32 bytes overhead for gl_ClipDistance (we allocate it 2 VUE slots
190 * whenever clip planes are enabled, even if the shader doesn't
191 * write to gl_ClipDistance)
192 * 16 bytes overhead since the VUE size must be a multiple of 32 bytes
193 * (see below)--this causes up to 1 VUE slot to be wasted
194 * 400 bytes available for varying packing overhead
195 *
196 * Worst-case varying packing overhead is 3/4 of a varying slot (12 bytes)
197 * per interpolation type, so this is plenty.
198 *
199 */
200 unsigned output_vertex_size_bytes = c.prog_data.base.vue_map.num_slots * 16;
201 assert(brw->gen == 6 ||
202 output_vertex_size_bytes <= GEN7_MAX_GS_OUTPUT_VERTEX_SIZE_BYTES);
203 c.prog_data.output_vertex_size_hwords =
204 ALIGN(output_vertex_size_bytes, 32) / 32;
205
206 /* Compute URB entry size. The maximum allowed URB entry size is 32k.
207 * That divides up as follows:
208 *
209 * 64 bytes for the control data header (cut indices or StreamID bits)
210 * 4096 bytes for varyings (a varying component is 4 bytes and
211 * gl_MaxGeometryTotalOutputComponents = 1024)
212 * 4096 bytes overhead for VARYING_SLOT_PSIZ (each varying slot is 16
213 * bytes/vertex and gl_MaxGeometryOutputVertices is 256)
214 * 4096 bytes overhead for gl_Position (we allocate it a slot in the VUE
215 * even if it's not used)
216 * 8192 bytes overhead for gl_ClipDistance (we allocate it 2 VUE slots
217 * whenever clip planes are enabled, even if the shader doesn't
218 * write to gl_ClipDistance)
219 * 4096 bytes overhead since the VUE size must be a multiple of 32
220 * bytes (see above)--this causes up to 1 VUE slot to be wasted
221 * 8128 bytes available for varying packing overhead
222 *
223 * Worst-case varying packing overhead is 3/4 of a varying slot per
224 * interpolation type, which works out to 3072 bytes, so this would allow
225 * us to accommodate 2 interpolation types without any danger of running
226 * out of URB space.
227 *
228 * In practice, the risk of running out of URB space is very small, since
229 * the above figures are all worst-case, and most of them scale with the
230 * number of output vertices. So we'll just calculate the amount of space
231 * we need, and if it's too large, fail to compile.
232 *
233 * The above is for gen7+ where we have a single URB entry that will hold
234 * all the output. In gen6, we will have to allocate URB entries for every
235 * vertex we emit, so our URB entries only need to be large enough to hold
236 * a single vertex. Also, gen6 does not have a control data header.
237 */
238 unsigned output_size_bytes;
239 if (brw->gen >= 7) {
240 output_size_bytes =
241 c.prog_data.output_vertex_size_hwords * 32 * gp->program.VerticesOut;
242 output_size_bytes += 32 * c.prog_data.control_data_header_size_hwords;
243 } else {
244 output_size_bytes = c.prog_data.output_vertex_size_hwords * 32;
245 }
246
247 /* Broadwell stores "Vertex Count" as a full 8 DWord (32 byte) URB output,
248 * which comes before the control header.
249 */
250 if (brw->gen >= 8)
251 output_size_bytes += 32;
252
253 assert(output_size_bytes >= 1);
254 int max_output_size_bytes = GEN7_MAX_GS_URB_ENTRY_SIZE_BYTES;
255 if (brw->gen == 6)
256 max_output_size_bytes = GEN6_MAX_GS_URB_ENTRY_SIZE_BYTES;
257 if (output_size_bytes > max_output_size_bytes)
258 return false;
259
260
261 /* URB entry sizes are stored as a multiple of 64 bytes in gen7+ and
262 * a multiple of 128 bytes in gen6.
263 */
264 if (brw->gen >= 7)
265 c.prog_data.base.urb_entry_size = ALIGN(output_size_bytes, 64) / 64;
266 else
267 c.prog_data.base.urb_entry_size = ALIGN(output_size_bytes, 128) / 128;
268
269 c.prog_data.output_topology =
270 get_hw_prim_for_gl_prim(gp->program.OutputType);
271
272 /* The GLSL linker will have already matched up GS inputs and the outputs
273 * of prior stages. The driver does extend VS outputs in some cases, but
274 * only for legacy OpenGL or Gen4-5 hardware, neither of which offer
275 * geometry shader support. So we can safely ignore that.
276 *
277 * For SSO pipelines, we use a fixed VUE map layout based on variable
278 * locations, so we can rely on rendezvous-by-location making this work.
279 *
280 * However, we need to ignore VARYING_SLOT_PRIMITIVE_ID, as it's not
281 * written by previous stages and shows up via payload magic.
282 */
283 GLbitfield64 inputs_read =
284 gp->program.Base.InputsRead & ~VARYING_BIT_PRIMITIVE_ID;
285 brw_compute_vue_map(brw->intelScreen->devinfo,
286 &c.input_vue_map, inputs_read,
287 prog->SeparateShader);
288
289 /* GS inputs are read from the VUE 256 bits (2 vec4's) at a time, so we
290 * need to program a URB read length of ceiling(num_slots / 2).
291 */
292 c.prog_data.base.urb_read_length = (c.input_vue_map.num_slots + 1) / 2;
293
294 if (unlikely(INTEL_DEBUG & DEBUG_GS))
295 brw_dump_ir("geometry", prog, gs, NULL);
296
297 void *mem_ctx = ralloc_context(NULL);
298 unsigned program_size;
299 const unsigned *program =
300 brw_gs_emit(brw, prog, &c, mem_ctx, &program_size);
301 if (program == NULL) {
302 ralloc_free(mem_ctx);
303 return false;
304 }
305
306 /* Scratch space is used for register spilling */
307 if (c.prog_data.base.base.total_scratch) {
308 brw_get_scratch_bo(brw, &stage_state->scratch_bo,
309 c.prog_data.base.base.total_scratch *
310 brw->max_gs_threads);
311 }
312
313 brw_upload_cache(&brw->cache, BRW_CACHE_GS_PROG,
314 &c.key, sizeof(c.key),
315 program, program_size,
316 &c.prog_data, sizeof(c.prog_data),
317 &stage_state->prog_offset, &brw->gs.prog_data);
318 ralloc_free(mem_ctx);
319
320 return true;
321 }
322
323 static bool
324 brw_gs_state_dirty(struct brw_context *brw)
325 {
326 return brw_state_dirty(brw,
327 _NEW_TEXTURE,
328 BRW_NEW_GEOMETRY_PROGRAM |
329 BRW_NEW_TRANSFORM_FEEDBACK);
330 }
331
332 static void
333 brw_gs_populate_key(struct brw_context *brw,
334 struct brw_gs_prog_key *key)
335 {
336 struct gl_context *ctx = &brw->ctx;
337 struct brw_stage_state *stage_state = &brw->gs.base;
338 struct brw_geometry_program *gp =
339 (struct brw_geometry_program *) brw->geometry_program;
340 struct gl_program *prog = &gp->program.Base;
341
342 memset(key, 0, sizeof(*key));
343
344 key->program_string_id = gp->id;
345
346 /* _NEW_TEXTURE */
347 brw_populate_sampler_prog_key_data(ctx, prog, stage_state->sampler_count,
348 &key->tex);
349 }
350
351 void
352 brw_upload_gs_prog(struct brw_context *brw)
353 {
354 struct gl_context *ctx = &brw->ctx;
355 struct gl_shader_program **current = ctx->_Shader->CurrentProgram;
356 struct brw_stage_state *stage_state = &brw->gs.base;
357 struct brw_gs_prog_key key;
358 /* BRW_NEW_GEOMETRY_PROGRAM */
359 struct brw_geometry_program *gp =
360 (struct brw_geometry_program *) brw->geometry_program;
361
362 if (!brw_gs_state_dirty(brw))
363 return;
364
365 if (gp == NULL) {
366 /* No geometry shader. Vertex data just passes straight through. */
367 if (brw->gen == 6 &&
368 (brw->ctx.NewDriverState & BRW_NEW_TRANSFORM_FEEDBACK)) {
369 gen6_brw_upload_ff_gs_prog(brw);
370 return;
371 }
372
373 /* Other state atoms had better not try to access prog_data, since
374 * there's no GS program.
375 */
376 brw->gs.prog_data = NULL;
377 brw->gs.base.prog_data = NULL;
378
379 return;
380 }
381
382 brw_gs_populate_key(brw, &key);
383
384 if (!brw_search_cache(&brw->cache, BRW_CACHE_GS_PROG,
385 &key, sizeof(key),
386 &stage_state->prog_offset, &brw->gs.prog_data)) {
387 bool success = brw_codegen_gs_prog(brw, current[MESA_SHADER_GEOMETRY],
388 gp, &key);
389 assert(success);
390 (void)success;
391 }
392 brw->gs.base.prog_data = &brw->gs.prog_data->base.base;
393 }
394
395 bool
396 brw_gs_precompile(struct gl_context *ctx,
397 struct gl_shader_program *shader_prog,
398 struct gl_program *prog)
399 {
400 struct brw_context *brw = brw_context(ctx);
401 struct brw_gs_prog_key key;
402 uint32_t old_prog_offset = brw->gs.base.prog_offset;
403 struct brw_gs_prog_data *old_prog_data = brw->gs.prog_data;
404 bool success;
405
406 struct gl_geometry_program *gp = (struct gl_geometry_program *) prog;
407 struct brw_geometry_program *bgp = brw_geometry_program(gp);
408
409 memset(&key, 0, sizeof(key));
410
411 brw_setup_tex_for_precompile(brw, &key.tex, prog);
412 key.program_string_id = bgp->id;
413
414 success = brw_codegen_gs_prog(brw, shader_prog, bgp, &key);
415
416 brw->gs.base.prog_offset = old_prog_offset;
417 brw->gs.prog_data = old_prog_data;
418
419 return success;
420 }