469a6fbcc7f43789e7f28b30f019c75afa175130
[mesa.git] / src / mesa / drivers / dri / i965 / brw_gs.c
1 /*
2 * Copyright © 2013 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24 /**
25 * \file brw_vec4_gs.c
26 *
27 * State atom for client-programmable geometry shaders, and support code.
28 */
29
30 #include "brw_gs.h"
31 #include "brw_context.h"
32 #include "brw_vec4_gs_visitor.h"
33 #include "brw_state.h"
34 #include "brw_ff_gs.h"
35 #include "brw_nir.h"
36
37 static void
38 assign_gs_binding_table_offsets(const struct brw_device_info *devinfo,
39 const struct gl_shader_program *shader_prog,
40 const struct gl_program *prog,
41 struct brw_gs_prog_data *prog_data)
42 {
43 /* In gen6 we reserve the first BRW_MAX_SOL_BINDINGS entries for transform
44 * feedback surfaces.
45 */
46 uint32_t reserved = devinfo->gen == 6 ? BRW_MAX_SOL_BINDINGS : 0;
47
48 brw_assign_common_binding_table_offsets(MESA_SHADER_GEOMETRY, devinfo,
49 shader_prog, prog,
50 &prog_data->base.base,
51 reserved);
52 }
53
54 bool
55 brw_codegen_gs_prog(struct brw_context *brw,
56 struct gl_shader_program *prog,
57 struct brw_geometry_program *gp,
58 struct brw_gs_prog_key *key)
59 {
60 struct gl_shader *shader = prog->_LinkedShaders[MESA_SHADER_GEOMETRY];
61 struct brw_stage_state *stage_state = &brw->gs.base;
62 struct brw_gs_compile c;
63 memset(&c, 0, sizeof(c));
64 c.key = *key;
65 c.gp = gp;
66
67 c.prog_data.include_primitive_id =
68 (gp->program.Base.InputsRead & VARYING_BIT_PRIMITIVE_ID) != 0;
69
70 c.prog_data.invocations = gp->program.Invocations;
71
72 assign_gs_binding_table_offsets(brw->intelScreen->devinfo, prog,
73 &gp->program.Base, &c.prog_data);
74
75 /* Allocate the references to the uniforms that will end up in the
76 * prog_data associated with the compiled program, and which will be freed
77 * by the state cache.
78 *
79 * Note: param_count needs to be num_uniform_components * 4, since we add
80 * padding around uniform values below vec4 size, so the worst case is that
81 * every uniform is a float which gets padded to the size of a vec4.
82 */
83 struct gl_shader *gs = prog->_LinkedShaders[MESA_SHADER_GEOMETRY];
84 int param_count = gp->program.Base.nir->num_uniforms * 4;
85
86 c.prog_data.base.base.param =
87 rzalloc_array(NULL, const gl_constant_value *, param_count);
88 c.prog_data.base.base.pull_param =
89 rzalloc_array(NULL, const gl_constant_value *, param_count);
90 c.prog_data.base.base.image_param =
91 rzalloc_array(NULL, struct brw_image_param, gs->NumImages);
92 c.prog_data.base.base.nr_params = param_count;
93 c.prog_data.base.base.nr_image_params = gs->NumImages;
94
95 brw_nir_setup_glsl_uniforms(gp->program.Base.nir, prog, &gp->program.Base,
96 &c.prog_data.base.base, false);
97
98 if (brw->gen >= 8) {
99 c.prog_data.static_vertex_count = !gp->program.Base.nir ? -1 :
100 nir_gs_count_vertices(gp->program.Base.nir);
101 }
102
103 if (brw->gen >= 7) {
104 if (gp->program.OutputType == GL_POINTS) {
105 /* When the output type is points, the geometry shader may output data
106 * to multiple streams, and EndPrimitive() has no effect. So we
107 * configure the hardware to interpret the control data as stream ID.
108 */
109 c.prog_data.control_data_format = GEN7_GS_CONTROL_DATA_FORMAT_GSCTL_SID;
110
111 /* We only have to emit control bits if we are using streams */
112 if (prog->Geom.UsesStreams)
113 c.control_data_bits_per_vertex = 2;
114 else
115 c.control_data_bits_per_vertex = 0;
116 } else {
117 /* When the output type is triangle_strip or line_strip, EndPrimitive()
118 * may be used to terminate the current strip and start a new one
119 * (similar to primitive restart), and outputting data to multiple
120 * streams is not supported. So we configure the hardware to interpret
121 * the control data as EndPrimitive information (a.k.a. "cut bits").
122 */
123 c.prog_data.control_data_format = GEN7_GS_CONTROL_DATA_FORMAT_GSCTL_CUT;
124
125 /* We only need to output control data if the shader actually calls
126 * EndPrimitive().
127 */
128 c.control_data_bits_per_vertex = gp->program.UsesEndPrimitive ? 1 : 0;
129 }
130 } else {
131 /* There are no control data bits in gen6. */
132 c.control_data_bits_per_vertex = 0;
133
134 /* If it is using transform feedback, enable it */
135 if (prog->TransformFeedback.NumVarying)
136 c.prog_data.gen6_xfb_enabled = true;
137 else
138 c.prog_data.gen6_xfb_enabled = false;
139 }
140 c.control_data_header_size_bits =
141 gp->program.VerticesOut * c.control_data_bits_per_vertex;
142
143 /* 1 HWORD = 32 bytes = 256 bits */
144 c.prog_data.control_data_header_size_hwords =
145 ALIGN(c.control_data_header_size_bits, 256) / 256;
146
147 GLbitfield64 outputs_written = gp->program.Base.OutputsWritten;
148
149 brw_compute_vue_map(brw->intelScreen->devinfo,
150 &c.prog_data.base.vue_map, outputs_written,
151 prog ? prog->SeparateShader : false);
152
153 /* Compute the output vertex size.
154 *
155 * From the Ivy Bridge PRM, Vol2 Part1 7.2.1.1 STATE_GS - Output Vertex
156 * Size (p168):
157 *
158 * [0,62] indicating [1,63] 16B units
159 *
160 * Specifies the size of each vertex stored in the GS output entry
161 * (following any Control Header data) as a number of 128-bit units
162 * (minus one).
163 *
164 * Programming Restrictions: The vertex size must be programmed as a
165 * multiple of 32B units with the following exception: Rendering is
166 * disabled (as per SOL stage state) and the vertex size output by the
167 * GS thread is 16B.
168 *
169 * If rendering is enabled (as per SOL state) the vertex size must be
170 * programmed as a multiple of 32B units. In other words, the only time
171 * software can program a vertex size with an odd number of 16B units
172 * is when rendering is disabled.
173 *
174 * Note: B=bytes in the above text.
175 *
176 * It doesn't seem worth the extra trouble to optimize the case where the
177 * vertex size is 16B (especially since this would require special-casing
178 * the GEN assembly that writes to the URB). So we just set the vertex
179 * size to a multiple of 32B (2 vec4's) in all cases.
180 *
181 * The maximum output vertex size is 62*16 = 992 bytes (31 hwords). We
182 * budget that as follows:
183 *
184 * 512 bytes for varyings (a varying component is 4 bytes and
185 * gl_MaxGeometryOutputComponents = 128)
186 * 16 bytes overhead for VARYING_SLOT_PSIZ (each varying slot is 16
187 * bytes)
188 * 16 bytes overhead for gl_Position (we allocate it a slot in the VUE
189 * even if it's not used)
190 * 32 bytes overhead for gl_ClipDistance (we allocate it 2 VUE slots
191 * whenever clip planes are enabled, even if the shader doesn't
192 * write to gl_ClipDistance)
193 * 16 bytes overhead since the VUE size must be a multiple of 32 bytes
194 * (see below)--this causes up to 1 VUE slot to be wasted
195 * 400 bytes available for varying packing overhead
196 *
197 * Worst-case varying packing overhead is 3/4 of a varying slot (12 bytes)
198 * per interpolation type, so this is plenty.
199 *
200 */
201 unsigned output_vertex_size_bytes = c.prog_data.base.vue_map.num_slots * 16;
202 assert(brw->gen == 6 ||
203 output_vertex_size_bytes <= GEN7_MAX_GS_OUTPUT_VERTEX_SIZE_BYTES);
204 c.prog_data.output_vertex_size_hwords =
205 ALIGN(output_vertex_size_bytes, 32) / 32;
206
207 /* Compute URB entry size. The maximum allowed URB entry size is 32k.
208 * That divides up as follows:
209 *
210 * 64 bytes for the control data header (cut indices or StreamID bits)
211 * 4096 bytes for varyings (a varying component is 4 bytes and
212 * gl_MaxGeometryTotalOutputComponents = 1024)
213 * 4096 bytes overhead for VARYING_SLOT_PSIZ (each varying slot is 16
214 * bytes/vertex and gl_MaxGeometryOutputVertices is 256)
215 * 4096 bytes overhead for gl_Position (we allocate it a slot in the VUE
216 * even if it's not used)
217 * 8192 bytes overhead for gl_ClipDistance (we allocate it 2 VUE slots
218 * whenever clip planes are enabled, even if the shader doesn't
219 * write to gl_ClipDistance)
220 * 4096 bytes overhead since the VUE size must be a multiple of 32
221 * bytes (see above)--this causes up to 1 VUE slot to be wasted
222 * 8128 bytes available for varying packing overhead
223 *
224 * Worst-case varying packing overhead is 3/4 of a varying slot per
225 * interpolation type, which works out to 3072 bytes, so this would allow
226 * us to accommodate 2 interpolation types without any danger of running
227 * out of URB space.
228 *
229 * In practice, the risk of running out of URB space is very small, since
230 * the above figures are all worst-case, and most of them scale with the
231 * number of output vertices. So we'll just calculate the amount of space
232 * we need, and if it's too large, fail to compile.
233 *
234 * The above is for gen7+ where we have a single URB entry that will hold
235 * all the output. In gen6, we will have to allocate URB entries for every
236 * vertex we emit, so our URB entries only need to be large enough to hold
237 * a single vertex. Also, gen6 does not have a control data header.
238 */
239 unsigned output_size_bytes;
240 if (brw->gen >= 7) {
241 output_size_bytes =
242 c.prog_data.output_vertex_size_hwords * 32 * gp->program.VerticesOut;
243 output_size_bytes += 32 * c.prog_data.control_data_header_size_hwords;
244 } else {
245 output_size_bytes = c.prog_data.output_vertex_size_hwords * 32;
246 }
247
248 /* Broadwell stores "Vertex Count" as a full 8 DWord (32 byte) URB output,
249 * which comes before the control header.
250 */
251 if (brw->gen >= 8)
252 output_size_bytes += 32;
253
254 assert(output_size_bytes >= 1);
255 int max_output_size_bytes = GEN7_MAX_GS_URB_ENTRY_SIZE_BYTES;
256 if (brw->gen == 6)
257 max_output_size_bytes = GEN6_MAX_GS_URB_ENTRY_SIZE_BYTES;
258 if (output_size_bytes > max_output_size_bytes)
259 return false;
260
261
262 /* URB entry sizes are stored as a multiple of 64 bytes in gen7+ and
263 * a multiple of 128 bytes in gen6.
264 */
265 if (brw->gen >= 7)
266 c.prog_data.base.urb_entry_size = ALIGN(output_size_bytes, 64) / 64;
267 else
268 c.prog_data.base.urb_entry_size = ALIGN(output_size_bytes, 128) / 128;
269
270 c.prog_data.output_topology =
271 get_hw_prim_for_gl_prim(gp->program.OutputType);
272
273 /* The GLSL linker will have already matched up GS inputs and the outputs
274 * of prior stages. The driver does extend VS outputs in some cases, but
275 * only for legacy OpenGL or Gen4-5 hardware, neither of which offer
276 * geometry shader support. So we can safely ignore that.
277 *
278 * For SSO pipelines, we use a fixed VUE map layout based on variable
279 * locations, so we can rely on rendezvous-by-location making this work.
280 *
281 * However, we need to ignore VARYING_SLOT_PRIMITIVE_ID, as it's not
282 * written by previous stages and shows up via payload magic.
283 */
284 GLbitfield64 inputs_read =
285 gp->program.Base.InputsRead & ~VARYING_BIT_PRIMITIVE_ID;
286 brw_compute_vue_map(brw->intelScreen->devinfo,
287 &c.input_vue_map, inputs_read,
288 prog->SeparateShader);
289
290 /* GS inputs are read from the VUE 256 bits (2 vec4's) at a time, so we
291 * need to program a URB read length of ceiling(num_slots / 2).
292 */
293 c.prog_data.base.urb_read_length = (c.input_vue_map.num_slots + 1) / 2;
294
295 if (unlikely(INTEL_DEBUG & DEBUG_GS))
296 brw_dump_ir("geometry", prog, gs, NULL);
297
298 int st_index = -1;
299 if (INTEL_DEBUG & DEBUG_SHADER_TIME)
300 st_index = brw_get_shader_time_index(brw, prog, NULL, ST_GS);
301
302 void *mem_ctx = ralloc_context(NULL);
303 unsigned program_size;
304 char *error_str;
305 const unsigned *program =
306 brw_gs_emit(brw->intelScreen->compiler, brw, &c,
307 shader->Program->nir, prog,
308 mem_ctx, st_index, &program_size, &error_str);
309 if (program == NULL) {
310 ralloc_free(mem_ctx);
311 return false;
312 }
313
314 /* Scratch space is used for register spilling */
315 if (c.prog_data.base.base.total_scratch) {
316 brw_get_scratch_bo(brw, &stage_state->scratch_bo,
317 c.prog_data.base.base.total_scratch *
318 brw->max_gs_threads);
319 }
320
321 brw_upload_cache(&brw->cache, BRW_CACHE_GS_PROG,
322 &c.key, sizeof(c.key),
323 program, program_size,
324 &c.prog_data, sizeof(c.prog_data),
325 &stage_state->prog_offset, &brw->gs.prog_data);
326 ralloc_free(mem_ctx);
327
328 return true;
329 }
330
331 static bool
332 brw_gs_state_dirty(struct brw_context *brw)
333 {
334 return brw_state_dirty(brw,
335 _NEW_TEXTURE,
336 BRW_NEW_GEOMETRY_PROGRAM |
337 BRW_NEW_TRANSFORM_FEEDBACK);
338 }
339
340 static void
341 brw_gs_populate_key(struct brw_context *brw,
342 struct brw_gs_prog_key *key)
343 {
344 struct gl_context *ctx = &brw->ctx;
345 struct brw_stage_state *stage_state = &brw->gs.base;
346 struct brw_geometry_program *gp =
347 (struct brw_geometry_program *) brw->geometry_program;
348 struct gl_program *prog = &gp->program.Base;
349
350 memset(key, 0, sizeof(*key));
351
352 key->program_string_id = gp->id;
353
354 /* _NEW_TEXTURE */
355 brw_populate_sampler_prog_key_data(ctx, prog, stage_state->sampler_count,
356 &key->tex);
357 }
358
359 void
360 brw_upload_gs_prog(struct brw_context *brw)
361 {
362 struct gl_context *ctx = &brw->ctx;
363 struct gl_shader_program **current = ctx->_Shader->CurrentProgram;
364 struct brw_stage_state *stage_state = &brw->gs.base;
365 struct brw_gs_prog_key key;
366 /* BRW_NEW_GEOMETRY_PROGRAM */
367 struct brw_geometry_program *gp =
368 (struct brw_geometry_program *) brw->geometry_program;
369
370 if (!brw_gs_state_dirty(brw))
371 return;
372
373 if (gp == NULL) {
374 /* No geometry shader. Vertex data just passes straight through. */
375 if (brw->gen == 6 &&
376 (brw->ctx.NewDriverState & BRW_NEW_TRANSFORM_FEEDBACK)) {
377 gen6_brw_upload_ff_gs_prog(brw);
378 return;
379 }
380
381 /* Other state atoms had better not try to access prog_data, since
382 * there's no GS program.
383 */
384 brw->gs.prog_data = NULL;
385 brw->gs.base.prog_data = NULL;
386
387 return;
388 }
389
390 brw_gs_populate_key(brw, &key);
391
392 if (!brw_search_cache(&brw->cache, BRW_CACHE_GS_PROG,
393 &key, sizeof(key),
394 &stage_state->prog_offset, &brw->gs.prog_data)) {
395 bool success = brw_codegen_gs_prog(brw, current[MESA_SHADER_GEOMETRY],
396 gp, &key);
397 assert(success);
398 (void)success;
399 }
400 brw->gs.base.prog_data = &brw->gs.prog_data->base.base;
401 }
402
403 bool
404 brw_gs_precompile(struct gl_context *ctx,
405 struct gl_shader_program *shader_prog,
406 struct gl_program *prog)
407 {
408 struct brw_context *brw = brw_context(ctx);
409 struct brw_gs_prog_key key;
410 uint32_t old_prog_offset = brw->gs.base.prog_offset;
411 struct brw_gs_prog_data *old_prog_data = brw->gs.prog_data;
412 bool success;
413
414 struct gl_geometry_program *gp = (struct gl_geometry_program *) prog;
415 struct brw_geometry_program *bgp = brw_geometry_program(gp);
416
417 memset(&key, 0, sizeof(key));
418
419 brw_setup_tex_for_precompile(brw, &key.tex, prog);
420 key.program_string_id = bgp->id;
421
422 success = brw_codegen_gs_prog(brw, shader_prog, bgp, &key);
423
424 brw->gs.base.prog_offset = old_prog_offset;
425 brw->gs.prog_data = old_prog_data;
426
427 return success;
428 }