3 * Copyright © 2011-2015 Intel Corporation
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
28 #include "brw_shader.h"
29 #include "brw_context.h"
36 swizzle_for_size(int size
);
38 class src_reg
: public backend_reg
41 DECLARE_RALLOC_CXX_OPERATORS(src_reg
)
45 src_reg(register_file file
, int reg
, const glsl_type
*type
);
50 src_reg(uint8_t vf
[4]);
51 src_reg(uint8_t vf0
, uint8_t vf1
, uint8_t vf2
, uint8_t vf3
);
52 src_reg(struct brw_reg reg
);
54 bool equals(const src_reg
&r
) const;
56 src_reg(class vec4_visitor
*v
, const struct glsl_type
*type
);
57 src_reg(class vec4_visitor
*v
, const struct glsl_type
*type
, int size
);
59 explicit src_reg(dst_reg reg
);
61 GLuint swizzle
; /**< BRW_SWIZZLE_XYZW macros from brw_reg.h. */
67 retype(src_reg reg
, enum brw_reg_type type
)
69 reg
.fixed_hw_reg
.type
= reg
.type
= type
;
74 offset(src_reg reg
, unsigned delta
)
76 assert(delta
== 0 || (reg
.file
!= HW_REG
&& reg
.file
!= IMM
));
77 reg
.reg_offset
+= delta
;
82 * Reswizzle a given source register.
86 swizzle(src_reg reg
, unsigned swizzle
)
88 assert(reg
.file
!= HW_REG
);
89 reg
.swizzle
= BRW_SWIZZLE4(
90 BRW_GET_SWZ(reg
.swizzle
, BRW_GET_SWZ(swizzle
, 0)),
91 BRW_GET_SWZ(reg
.swizzle
, BRW_GET_SWZ(swizzle
, 1)),
92 BRW_GET_SWZ(reg
.swizzle
, BRW_GET_SWZ(swizzle
, 2)),
93 BRW_GET_SWZ(reg
.swizzle
, BRW_GET_SWZ(swizzle
, 3)));
100 assert(reg
.file
!= HW_REG
&& reg
.file
!= IMM
);
101 reg
.negate
= !reg
.negate
;
105 class dst_reg
: public backend_reg
108 DECLARE_RALLOC_CXX_OPERATORS(dst_reg
)
113 dst_reg(register_file file
, int reg
);
114 dst_reg(register_file file
, int reg
, const glsl_type
*type
, int writemask
);
115 dst_reg(struct brw_reg reg
);
116 dst_reg(class vec4_visitor
*v
, const struct glsl_type
*type
);
118 explicit dst_reg(src_reg reg
);
120 bool equals(const dst_reg
&r
) const;
122 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
127 static inline dst_reg
128 retype(dst_reg reg
, enum brw_reg_type type
)
130 reg
.fixed_hw_reg
.type
= reg
.type
= type
;
134 static inline dst_reg
135 offset(dst_reg reg
, unsigned delta
)
137 assert(delta
== 0 || (reg
.file
!= HW_REG
&& reg
.file
!= IMM
));
138 reg
.reg_offset
+= delta
;
142 static inline dst_reg
143 writemask(dst_reg reg
, unsigned mask
)
145 assert(reg
.file
!= HW_REG
&& reg
.file
!= IMM
);
146 assert((reg
.writemask
& mask
) != 0);
147 reg
.writemask
&= mask
;
151 class vec4_instruction
: public backend_instruction
{
153 DECLARE_RALLOC_CXX_OPERATORS(vec4_instruction
)
155 vec4_instruction(enum opcode opcode
,
156 const dst_reg
&dst
= dst_reg(),
157 const src_reg
&src0
= src_reg(),
158 const src_reg
&src1
= src_reg(),
159 const src_reg
&src2
= src_reg());
161 struct brw_reg
get_dst(void);
162 struct brw_reg
get_src(const struct brw_vue_prog_data
*prog_data
, int i
);
167 enum brw_urb_write_flags urb_write_flags
;
169 unsigned sol_binding
; /**< gen6: SOL binding table index */
170 bool sol_final_write
; /**< gen6: send commit message */
171 unsigned sol_vertex
; /**< gen6: used for setting dst index in SVB header */
173 bool is_send_from_grf();
174 unsigned regs_read(unsigned arg
) const;
175 bool can_reswizzle(int dst_writemask
, int swizzle
, int swizzle_mask
);
176 void reswizzle(int dst_writemask
, int swizzle
);
177 bool can_do_source_mods(struct brw_context
*brw
);
181 return predicate
|| opcode
== VS_OPCODE_UNPACK_FLAGS_SIMD4X2
;
186 return (conditional_mod
&& (opcode
!= BRW_OPCODE_SEL
&&
187 opcode
!= BRW_OPCODE_IF
&&
188 opcode
!= BRW_OPCODE_WHILE
));
192 } /* namespace brw */