src/mesa/drivers/dri/i965/brw_link.cpp

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "brw_context.h"
  25 #include "compiler/brw_nir.h"
  26 #include "brw_program.h"
  27 #include "compiler/glsl/ir.h"
  28 #include "compiler/glsl/ir_optimization.h"
  29 #include "compiler/glsl/program.h"
  30 #include "program/program.h"
  31 #include "main/shaderapi.h"
  32 #include "main/shaderobj.h"
  33 #include "main/uniforms.h"
  34
  35 /**
  36  * Performs a compile of the shader stages even when we don't know
  37  * what non-orthogonal state will be set, in the hope that it reflects
  38  * the eventual NOS used, and thus allows us to produce link failures.
  39  */
  40 static bool
  41 brw_shader_precompile(struct gl_context *ctx,
  42                       struct gl_shader_program *sh_prog)
  43 {
  44    struct gl_linked_shader *vs = sh_prog->_LinkedShaders[MESA_SHADER_VERTEX];
  45    struct gl_linked_shader *tcs = sh_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL];
  46    struct gl_linked_shader *tes = sh_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL];
  47    struct gl_linked_shader *gs = sh_prog->_LinkedShaders[MESA_SHADER_GEOMETRY];
  48    struct gl_linked_shader *fs = sh_prog->_LinkedShaders[MESA_SHADER_FRAGMENT];
  49    struct gl_linked_shader *cs = sh_prog->_LinkedShaders[MESA_SHADER_COMPUTE];
  50
  51    if (fs && !brw_fs_precompile(ctx, fs->Program))
  52       return false;
  53
  54    if (gs && !brw_gs_precompile(ctx, gs->Program))
  55       return false;
  56
  57    if (tes && !brw_tes_precompile(ctx, sh_prog, tes->Program))
  58       return false;
  59
  60    if (tcs && !brw_tcs_precompile(ctx, sh_prog, tcs->Program))
  61       return false;
  62
  63    if (vs && !brw_vs_precompile(ctx, vs->Program))
  64       return false;
  65
  66    if (cs && !brw_cs_precompile(ctx, cs->Program))
  67       return false;
  68
  69    return true;
  70 }
  71
  72 static void
  73 brw_lower_packing_builtins(struct brw_context *brw,
  74                            exec_list *ir)
  75 {
  76    /* Gens < 7 don't have instructions to convert to or from half-precision,
  77     * and Gens < 6 don't expose that functionality.
  78     */
  79    if (brw->gen != 6)
  80       return;
  81
  82    lower_packing_builtins(ir, LOWER_PACK_HALF_2x16 | LOWER_UNPACK_HALF_2x16);
  83 }
  84
  85 static void
  86 process_glsl_ir(struct brw_context *brw,
  87                 struct gl_shader_program *shader_prog,
  88                 struct gl_linked_shader *shader)
  89 {
  90    struct gl_context *ctx = &brw->ctx;
  91    const struct gl_shader_compiler_options *options =
  92       &ctx->Const.ShaderCompilerOptions[shader->Stage];
  93
  94    /* Temporary memory context for any new IR. */
  95    void *mem_ctx = ralloc_context(NULL);
  96
  97    ralloc_adopt(mem_ctx, shader->ir);
  98
  99    lower_blend_equation_advanced(shader);
 100
 101    /* lower_packing_builtins() inserts arithmetic instructions, so it
 102     * must precede lower_instructions().
 103     */
 104    brw_lower_packing_builtins(brw, shader->ir);
 105    do_mat_op_to_vec(shader->ir);
 106
 107    unsigned instructions_to_lower = (DIV_TO_MUL_RCP |
 108                                      SUB_TO_ADD_NEG |
 109                                      EXP_TO_EXP2 |
 110                                      LOG_TO_LOG2 |
 111                                      DFREXP_DLDEXP_TO_ARITH);
 112    if (brw->gen < 7) {
 113       instructions_to_lower |= BIT_COUNT_TO_MATH |
 114                                EXTRACT_TO_SHIFTS |
 115                                INSERT_TO_SHIFTS |
 116                                REVERSE_TO_SHIFTS;
 117    }
 118
 119    lower_instructions(shader->ir, instructions_to_lower);
 120
 121    /* Pre-gen6 HW can only nest if-statements 16 deep.  Beyond this,
 122     * if-statements need to be flattened.
 123     */
 124    if (brw->gen < 6)
 125       lower_if_to_cond_assign(shader->Stage, shader->ir, 16);
 126
 127    do_lower_texture_projection(shader->ir);
 128    do_vec_index_to_cond_assign(shader->ir);
 129    lower_vector_insert(shader->ir, true);
 130    lower_offset_arrays(shader->ir);
 131    lower_noise(shader->ir);
 132    lower_quadop_vector(shader->ir, false);
 133
 134    validate_ir_tree(shader->ir);
 135
 136    /* Now that we've finished altering the linked IR, reparent any live IR back
 137     * to the permanent memory context, and free the temporary one (discarding any
 138     * junk we optimized away).
 139     */
 140    reparent_ir(shader->ir, shader->ir);
 141    ralloc_free(mem_ctx);
 142
 143    if (ctx->_Shader->Flags & GLSL_DUMP) {
 144       fprintf(stderr, "\n");
 145       if (shader->ir) {
 146          fprintf(stderr, "GLSL IR for linked %s program %d:\n",
 147                  _mesa_shader_stage_to_string(shader->Stage),
 148                  shader_prog->Name);
 149          _mesa_print_ir(stderr, shader->ir, NULL);
 150       } else {
 151          fprintf(stderr, "No GLSL IR for linked %s program %d (shader may be "
 152                  "from cache)\n", _mesa_shader_stage_to_string(shader->Stage),
 153                  shader_prog->Name);
 154       }
 155       fprintf(stderr, "\n");
 156    }
 157 }
 158
 159 static void
 160 unify_interfaces(struct shader_info **infos)
 161 {
 162    struct shader_info *prev_info = NULL;
 163
 164    for (unsigned i = MESA_SHADER_VERTEX; i < MESA_SHADER_FRAGMENT; i++) {
 165       if (!infos[i])
 166          continue;
 167
 168       if (prev_info) {
 169          prev_info->outputs_written |= infos[i]->inputs_read &
 170             ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
 171          infos[i]->inputs_read |= prev_info->outputs_written &
 172             ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
 173
 174          prev_info->patch_outputs_written |= infos[i]->patch_inputs_read;
 175          infos[i]->patch_inputs_read |= prev_info->patch_outputs_written;
 176       }
 177       prev_info = infos[i];
 178    }
 179 }
 180
 181 extern "C" GLboolean
 182 brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
 183 {
 184    struct brw_context *brw = brw_context(ctx);
 185    const struct brw_compiler *compiler = brw->screen->compiler;
 186    unsigned int stage;
 187    struct shader_info *infos[MESA_SHADER_STAGES] = { 0, };
 188
 189    for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
 190       struct gl_linked_shader *shader = shProg->_LinkedShaders[stage];
 191       if (!shader)
 192          continue;
 193
 194       struct gl_program *prog = shader->Program;
 195       prog->Parameters = _mesa_new_parameter_list();
 196
 197       process_glsl_ir(brw, shProg, shader);
 198
 199       _mesa_copy_linked_program_data(shProg, shader);
 200
 201       prog->ShadowSamplers = shader->shadow_samplers;
 202       _mesa_update_shader_textures_used(shProg, prog);
 203
 204       bool debug_enabled =
 205          (INTEL_DEBUG & intel_debug_flag_for_shader_stage(shader->Stage));
 206
 207       if (debug_enabled && shader->ir) {
 208          fprintf(stderr, "GLSL IR for native %s shader %d:\n",
 209                  _mesa_shader_stage_to_string(shader->Stage), shProg->Name);
 210          _mesa_print_ir(stderr, shader->ir, NULL);
 211          fprintf(stderr, "\n\n");
 212       }
 213
 214       prog->nir = brw_create_nir(brw, shProg, prog, (gl_shader_stage) stage,
 215                                  compiler->scalar_stage[stage]);
 216       infos[stage] = prog->nir->info;
 217
 218       /* Make a pass over the IR to add state references for any built-in
 219        * uniforms that are used.  This has to be done now (during linking).
 220        * Code generation doesn't happen until the first time this shader is
 221        * used for rendering.  Waiting until then to generate the parameters is
 222        * too late.  At that point, the values for the built-in uniforms won't
 223        * get sent to the shader.
 224        */
 225       nir_foreach_variable(var, &prog->nir->uniforms) {
 226          if (strncmp(var->name, "gl_", 3) == 0) {
 227             const nir_state_slot *const slots = var->state_slots;
 228             assert(var->state_slots != NULL);
 229
 230             for (unsigned int i = 0; i < var->num_state_slots; i++) {
 231                _mesa_add_state_reference(prog->Parameters,
 232                                          (gl_state_index *)slots[i].tokens);
 233             }
 234          }
 235       }
 236    }
 237
 238    /* The linker tries to dead code eliminate unused varying components,
 239     * and make sure interfaces match.  But it isn't able to do so in all
 240     * cases.  So, explicitly make the interfaces match by OR'ing together
 241     * the inputs_read/outputs_written bitfields of adjacent stages.
 242     */
 243    if (!shProg->SeparateShader)
 244       unify_interfaces(infos);
 245
 246    if ((ctx->_Shader->Flags & GLSL_DUMP) && shProg->Name != 0) {
 247       for (unsigned i = 0; i < shProg->NumShaders; i++) {
 248          const struct gl_shader *sh = shProg->Shaders[i];
 249          if (!sh)
 250             continue;
 251
 252          fprintf(stderr, "GLSL %s shader %d source for linked program %d:\n",
 253                  _mesa_shader_stage_to_string(sh->Stage),
 254                  i, shProg->Name);
 255          fprintf(stderr, "%s", sh->Source);
 256          fprintf(stderr, "\n");
 257       }
 258    }
 259
 260    if (brw->precompile && !brw_shader_precompile(ctx, shProg))
 261       return false;
 262
 263    build_program_resource_list(ctx, shProg);
 264
 265    for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
 266       struct gl_linked_shader *shader = shProg->_LinkedShaders[stage];
 267       if (!shader)
 268          continue;
 269
 270       /* The GLSL IR won't be needed anymore. */
 271       ralloc_free(shader->ir);
 272       shader->ir = NULL;
 273    }
 274
 275    return true;
 276 }