i965/draw: Account for BaseInstance in VBO bounds
[mesa.git] / src / mesa / drivers / dri / i965 / brw_link.cpp
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "brw_context.h"
25 #include "brw_shader.h"
26 #include "brw_fs.h"
27 #include "brw_nir.h"
28 #include "brw_program.h"
29 #include "compiler/glsl/ir.h"
30 #include "compiler/glsl/ir_optimization.h"
31 #include "compiler/glsl/program.h"
32 #include "program/program.h"
33 #include "main/shaderapi.h"
34 #include "main/uniforms.h"
35
36 /**
37 * Performs a compile of the shader stages even when we don't know
38 * what non-orthogonal state will be set, in the hope that it reflects
39 * the eventual NOS used, and thus allows us to produce link failures.
40 */
41 static bool
42 brw_shader_precompile(struct gl_context *ctx,
43 struct gl_shader_program *sh_prog)
44 {
45 struct gl_shader *vs = sh_prog->_LinkedShaders[MESA_SHADER_VERTEX];
46 struct gl_shader *tcs = sh_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL];
47 struct gl_shader *tes = sh_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL];
48 struct gl_shader *gs = sh_prog->_LinkedShaders[MESA_SHADER_GEOMETRY];
49 struct gl_shader *fs = sh_prog->_LinkedShaders[MESA_SHADER_FRAGMENT];
50 struct gl_shader *cs = sh_prog->_LinkedShaders[MESA_SHADER_COMPUTE];
51
52 if (fs && !brw_fs_precompile(ctx, sh_prog, fs->Program))
53 return false;
54
55 if (gs && !brw_gs_precompile(ctx, sh_prog, gs->Program))
56 return false;
57
58 if (tes && !brw_tes_precompile(ctx, sh_prog, tes->Program))
59 return false;
60
61 if (tcs && !brw_tcs_precompile(ctx, sh_prog, tcs->Program))
62 return false;
63
64 if (vs && !brw_vs_precompile(ctx, sh_prog, vs->Program))
65 return false;
66
67 if (cs && !brw_cs_precompile(ctx, sh_prog, cs->Program))
68 return false;
69
70 return true;
71 }
72
73 static void
74 brw_lower_packing_builtins(struct brw_context *brw,
75 gl_shader_stage shader_type,
76 exec_list *ir)
77 {
78 /* Gens < 7 don't have instructions to convert to or from half-precision,
79 * and Gens < 6 don't expose that functionality.
80 */
81 if (brw->gen != 6)
82 return;
83
84 lower_packing_builtins(ir, LOWER_PACK_HALF_2x16 | LOWER_UNPACK_HALF_2x16);
85 }
86
87 static void
88 process_glsl_ir(gl_shader_stage stage,
89 struct brw_context *brw,
90 struct gl_shader_program *shader_prog,
91 struct gl_shader *shader)
92 {
93 struct gl_context *ctx = &brw->ctx;
94 const struct brw_compiler *compiler = brw->intelScreen->compiler;
95 const struct gl_shader_compiler_options *options =
96 &ctx->Const.ShaderCompilerOptions[shader->Stage];
97
98 /* Temporary memory context for any new IR. */
99 void *mem_ctx = ralloc_context(NULL);
100
101 ralloc_adopt(mem_ctx, shader->ir);
102
103 /* lower_packing_builtins() inserts arithmetic instructions, so it
104 * must precede lower_instructions().
105 */
106 brw_lower_packing_builtins(brw, shader->Stage, shader->ir);
107 do_mat_op_to_vec(shader->ir);
108 lower_instructions(shader->ir,
109 DIV_TO_MUL_RCP |
110 SUB_TO_ADD_NEG |
111 EXP_TO_EXP2 |
112 LOG_TO_LOG2 |
113 DFREXP_DLDEXP_TO_ARITH |
114 CARRY_TO_ARITH |
115 BORROW_TO_ARITH);
116
117 /* Pre-gen6 HW can only nest if-statements 16 deep. Beyond this,
118 * if-statements need to be flattened.
119 */
120 if (brw->gen < 6)
121 lower_if_to_cond_assign(shader->ir, 16);
122
123 do_lower_texture_projection(shader->ir);
124 brw_lower_texture_gradients(brw, shader->ir);
125 do_vec_index_to_cond_assign(shader->ir);
126 lower_vector_insert(shader->ir, true);
127 lower_offset_arrays(shader->ir);
128 brw_do_lower_unnormalized_offset(shader->ir);
129 lower_noise(shader->ir);
130 lower_quadop_vector(shader->ir, false);
131
132 bool lowered_variable_indexing =
133 lower_variable_index_to_cond_assign((gl_shader_stage)stage,
134 shader->ir,
135 options->EmitNoIndirectInput,
136 options->EmitNoIndirectOutput,
137 options->EmitNoIndirectTemp,
138 options->EmitNoIndirectUniform);
139
140 if (unlikely(brw->perf_debug && lowered_variable_indexing)) {
141 perf_debug("Unsupported form of variable indexing in %s; falling "
142 "back to very inefficient code generation\n",
143 _mesa_shader_stage_to_abbrev(shader->Stage));
144 }
145
146 bool progress;
147 do {
148 progress = false;
149
150 if (compiler->scalar_stage[shader->Stage]) {
151 if (shader->Stage == MESA_SHADER_VERTEX ||
152 shader->Stage == MESA_SHADER_FRAGMENT)
153 brw_do_channel_expressions(shader->ir);
154 brw_do_vector_splitting(shader->ir);
155 }
156
157 progress = do_lower_jumps(shader->ir, true, true,
158 true, /* main return */
159 false, /* continue */
160 false /* loops */
161 ) || progress;
162
163 progress = do_common_optimization(shader->ir, true, true,
164 options, ctx->Const.NativeIntegers) || progress;
165 } while (progress);
166
167 validate_ir_tree(shader->ir);
168
169 /* Now that we've finished altering the linked IR, reparent any live IR back
170 * to the permanent memory context, and free the temporary one (discarding any
171 * junk we optimized away).
172 */
173 reparent_ir(shader->ir, shader->ir);
174 ralloc_free(mem_ctx);
175
176 if (ctx->_Shader->Flags & GLSL_DUMP) {
177 fprintf(stderr, "\n");
178 fprintf(stderr, "GLSL IR for linked %s program %d:\n",
179 _mesa_shader_stage_to_string(shader->Stage),
180 shader_prog->Name);
181 _mesa_print_ir(stderr, shader->ir, NULL);
182 fprintf(stderr, "\n");
183 }
184 }
185
186 extern "C" GLboolean
187 brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
188 {
189 struct brw_context *brw = brw_context(ctx);
190 const struct brw_compiler *compiler = brw->intelScreen->compiler;
191 unsigned int stage;
192
193 for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
194 struct gl_shader *shader = shProg->_LinkedShaders[stage];
195 if (!shader)
196 continue;
197
198 struct gl_program *prog =
199 ctx->Driver.NewProgram(ctx, _mesa_shader_stage_to_program(stage),
200 shader->Name);
201 if (!prog)
202 return false;
203 prog->Parameters = _mesa_new_parameter_list();
204
205 _mesa_copy_linked_program_data((gl_shader_stage) stage, shProg, prog);
206
207 process_glsl_ir((gl_shader_stage) stage, brw, shProg, shader);
208
209 /* Make a pass over the IR to add state references for any built-in
210 * uniforms that are used. This has to be done now (during linking).
211 * Code generation doesn't happen until the first time this shader is
212 * used for rendering. Waiting until then to generate the parameters is
213 * too late. At that point, the values for the built-in uniforms won't
214 * get sent to the shader.
215 */
216 foreach_in_list(ir_instruction, node, shader->ir) {
217 ir_variable *var = node->as_variable();
218
219 if ((var == NULL) || (var->data.mode != ir_var_uniform)
220 || (strncmp(var->name, "gl_", 3) != 0))
221 continue;
222
223 const ir_state_slot *const slots = var->get_state_slots();
224 assert(slots != NULL);
225
226 for (unsigned int i = 0; i < var->get_num_state_slots(); i++) {
227 _mesa_add_state_reference(prog->Parameters,
228 (gl_state_index *) slots[i].tokens);
229 }
230 }
231
232 do_set_program_inouts(shader->ir, prog, shader->Stage);
233
234 prog->SamplersUsed = shader->active_samplers;
235 prog->ShadowSamplers = shader->shadow_samplers;
236 _mesa_update_shader_textures_used(shProg, prog);
237
238 _mesa_reference_program(ctx, &shader->Program, prog);
239
240 brw_add_texrect_params(prog);
241
242 prog->nir = brw_create_nir(brw, shProg, prog, (gl_shader_stage) stage,
243 compiler->scalar_stage[stage]);
244
245 _mesa_reference_program(ctx, &prog, NULL);
246 }
247
248 if ((ctx->_Shader->Flags & GLSL_DUMP) && shProg->Name != 0) {
249 for (unsigned i = 0; i < shProg->NumShaders; i++) {
250 const struct gl_shader *sh = shProg->Shaders[i];
251 if (!sh)
252 continue;
253
254 fprintf(stderr, "GLSL %s shader %d source for linked program %d:\n",
255 _mesa_shader_stage_to_string(sh->Stage),
256 i, shProg->Name);
257 fprintf(stderr, "%s", sh->Source);
258 fprintf(stderr, "\n");
259 }
260 }
261
262 if (brw->precompile && !brw_shader_precompile(ctx, shProg))
263 return false;
264
265 build_program_resource_list(ctx, shProg);
266 return true;
267 }