i965/miptree: Replace is_lossless_compressed with mt->aux_usage checks
[mesa.git] / src / mesa / drivers / dri / i965 / brw_link.cpp
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "brw_context.h"
25 #include "compiler/brw_nir.h"
26 #include "brw_program.h"
27 #include "compiler/glsl/ir.h"
28 #include "compiler/glsl/ir_optimization.h"
29 #include "compiler/glsl/program.h"
30 #include "program/program.h"
31 #include "main/mtypes.h"
32 #include "main/shaderapi.h"
33 #include "main/shaderobj.h"
34 #include "main/uniforms.h"
35
36 /**
37 * Performs a compile of the shader stages even when we don't know
38 * what non-orthogonal state will be set, in the hope that it reflects
39 * the eventual NOS used, and thus allows us to produce link failures.
40 */
41 static bool
42 brw_shader_precompile(struct gl_context *ctx,
43 struct gl_shader_program *sh_prog)
44 {
45 struct gl_linked_shader *vs = sh_prog->_LinkedShaders[MESA_SHADER_VERTEX];
46 struct gl_linked_shader *tcs = sh_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL];
47 struct gl_linked_shader *tes = sh_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL];
48 struct gl_linked_shader *gs = sh_prog->_LinkedShaders[MESA_SHADER_GEOMETRY];
49 struct gl_linked_shader *fs = sh_prog->_LinkedShaders[MESA_SHADER_FRAGMENT];
50 struct gl_linked_shader *cs = sh_prog->_LinkedShaders[MESA_SHADER_COMPUTE];
51
52 if (fs && !brw_fs_precompile(ctx, fs->Program))
53 return false;
54
55 if (gs && !brw_gs_precompile(ctx, gs->Program))
56 return false;
57
58 if (tes && !brw_tes_precompile(ctx, sh_prog, tes->Program))
59 return false;
60
61 if (tcs && !brw_tcs_precompile(ctx, sh_prog, tcs->Program))
62 return false;
63
64 if (vs && !brw_vs_precompile(ctx, vs->Program))
65 return false;
66
67 if (cs && !brw_cs_precompile(ctx, cs->Program))
68 return false;
69
70 return true;
71 }
72
73 static void
74 brw_lower_packing_builtins(struct brw_context *brw,
75 exec_list *ir)
76 {
77 /* Gens < 7 don't have instructions to convert to or from half-precision,
78 * and Gens < 6 don't expose that functionality.
79 */
80 if (brw->gen != 6)
81 return;
82
83 lower_packing_builtins(ir, LOWER_PACK_HALF_2x16 | LOWER_UNPACK_HALF_2x16);
84 }
85
86 static void
87 process_glsl_ir(struct brw_context *brw,
88 struct gl_shader_program *shader_prog,
89 struct gl_linked_shader *shader)
90 {
91 struct gl_context *ctx = &brw->ctx;
92
93 /* Temporary memory context for any new IR. */
94 void *mem_ctx = ralloc_context(NULL);
95
96 ralloc_adopt(mem_ctx, shader->ir);
97
98 lower_blend_equation_advanced(shader);
99
100 /* lower_packing_builtins() inserts arithmetic instructions, so it
101 * must precede lower_instructions().
102 */
103 brw_lower_packing_builtins(brw, shader->ir);
104 do_mat_op_to_vec(shader->ir);
105
106 unsigned instructions_to_lower = (DIV_TO_MUL_RCP |
107 SUB_TO_ADD_NEG |
108 EXP_TO_EXP2 |
109 LOG_TO_LOG2 |
110 DFREXP_DLDEXP_TO_ARITH);
111 if (brw->gen < 7) {
112 instructions_to_lower |= BIT_COUNT_TO_MATH |
113 EXTRACT_TO_SHIFTS |
114 INSERT_TO_SHIFTS |
115 REVERSE_TO_SHIFTS;
116 }
117
118 lower_instructions(shader->ir, instructions_to_lower);
119
120 /* Pre-gen6 HW can only nest if-statements 16 deep. Beyond this,
121 * if-statements need to be flattened.
122 */
123 if (brw->gen < 6)
124 lower_if_to_cond_assign(shader->Stage, shader->ir, 16);
125
126 do_lower_texture_projection(shader->ir);
127 do_vec_index_to_cond_assign(shader->ir);
128 lower_vector_insert(shader->ir, true);
129 lower_offset_arrays(shader->ir);
130 lower_noise(shader->ir);
131 lower_quadop_vector(shader->ir, false);
132
133 validate_ir_tree(shader->ir);
134
135 /* Now that we've finished altering the linked IR, reparent any live IR back
136 * to the permanent memory context, and free the temporary one (discarding any
137 * junk we optimized away).
138 */
139 reparent_ir(shader->ir, shader->ir);
140 ralloc_free(mem_ctx);
141
142 if (ctx->_Shader->Flags & GLSL_DUMP) {
143 fprintf(stderr, "\n");
144 if (shader->ir) {
145 fprintf(stderr, "GLSL IR for linked %s program %d:\n",
146 _mesa_shader_stage_to_string(shader->Stage),
147 shader_prog->Name);
148 _mesa_print_ir(stderr, shader->ir, NULL);
149 } else {
150 fprintf(stderr, "No GLSL IR for linked %s program %d (shader may be "
151 "from cache)\n", _mesa_shader_stage_to_string(shader->Stage),
152 shader_prog->Name);
153 }
154 fprintf(stderr, "\n");
155 }
156 }
157
158 static void
159 unify_interfaces(struct shader_info **infos)
160 {
161 struct shader_info *prev_info = NULL;
162
163 for (unsigned i = MESA_SHADER_VERTEX; i < MESA_SHADER_FRAGMENT; i++) {
164 if (!infos[i])
165 continue;
166
167 if (prev_info) {
168 prev_info->outputs_written |= infos[i]->inputs_read &
169 ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
170 infos[i]->inputs_read |= prev_info->outputs_written &
171 ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
172
173 prev_info->patch_outputs_written |= infos[i]->patch_inputs_read;
174 infos[i]->patch_inputs_read |= prev_info->patch_outputs_written;
175 }
176 prev_info = infos[i];
177 }
178 }
179
180 static void
181 update_xfb_info(struct gl_transform_feedback_info *xfb_info)
182 {
183 if (!xfb_info)
184 return;
185
186 for (unsigned i = 0; i < xfb_info->NumOutputs; i++) {
187 struct gl_transform_feedback_output *output = &xfb_info->Outputs[i];
188
189 /* The VUE header contains three scalar fields packed together:
190 * - gl_PointSize is stored in VARYING_SLOT_PSIZ.w
191 * - gl_Layer is stored in VARYING_SLOT_PSIZ.y
192 * - gl_ViewportIndex is stored in VARYING_SLOT_PSIZ.z
193 */
194 switch (output->OutputRegister) {
195 case VARYING_SLOT_LAYER:
196 assert(output->NumComponents == 1);
197 output->OutputRegister = VARYING_SLOT_PSIZ;
198 output->ComponentOffset = 1;
199 break;
200 case VARYING_SLOT_VIEWPORT:
201 assert(output->NumComponents == 1);
202 output->OutputRegister = VARYING_SLOT_PSIZ;
203 output->ComponentOffset = 2;
204 break;
205 case VARYING_SLOT_PSIZ:
206 assert(output->NumComponents == 1);
207 output->ComponentOffset = 3;
208 break;
209 }
210 }
211 }
212
213 extern "C" GLboolean
214 brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
215 {
216 struct brw_context *brw = brw_context(ctx);
217 const struct brw_compiler *compiler = brw->screen->compiler;
218 unsigned int stage;
219 struct shader_info *infos[MESA_SHADER_STAGES] = { 0, };
220
221 for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
222 struct gl_linked_shader *shader = shProg->_LinkedShaders[stage];
223 if (!shader)
224 continue;
225
226 struct gl_program *prog = shader->Program;
227 prog->Parameters = _mesa_new_parameter_list();
228
229 process_glsl_ir(brw, shProg, shader);
230
231 _mesa_copy_linked_program_data(shProg, shader);
232
233 prog->ShadowSamplers = shader->shadow_samplers;
234 _mesa_update_shader_textures_used(shProg, prog);
235
236 update_xfb_info(prog->sh.LinkedTransformFeedback);
237
238 bool debug_enabled =
239 (INTEL_DEBUG & intel_debug_flag_for_shader_stage(shader->Stage));
240
241 if (debug_enabled && shader->ir) {
242 fprintf(stderr, "GLSL IR for native %s shader %d:\n",
243 _mesa_shader_stage_to_string(shader->Stage), shProg->Name);
244 _mesa_print_ir(stderr, shader->ir, NULL);
245 fprintf(stderr, "\n\n");
246 }
247
248 prog->nir = brw_create_nir(brw, shProg, prog, (gl_shader_stage) stage,
249 compiler->scalar_stage[stage]);
250 infos[stage] = &prog->nir->info;
251
252 /* Make a pass over the IR to add state references for any built-in
253 * uniforms that are used. This has to be done now (during linking).
254 * Code generation doesn't happen until the first time this shader is
255 * used for rendering. Waiting until then to generate the parameters is
256 * too late. At that point, the values for the built-in uniforms won't
257 * get sent to the shader.
258 */
259 nir_foreach_variable(var, &prog->nir->uniforms) {
260 if (strncmp(var->name, "gl_", 3) == 0) {
261 const nir_state_slot *const slots = var->state_slots;
262 assert(var->state_slots != NULL);
263
264 for (unsigned int i = 0; i < var->num_state_slots; i++) {
265 _mesa_add_state_reference(prog->Parameters,
266 (gl_state_index *)slots[i].tokens);
267 }
268 }
269 }
270 }
271
272 /* The linker tries to dead code eliminate unused varying components,
273 * and make sure interfaces match. But it isn't able to do so in all
274 * cases. So, explicitly make the interfaces match by OR'ing together
275 * the inputs_read/outputs_written bitfields of adjacent stages.
276 */
277 if (!shProg->SeparateShader)
278 unify_interfaces(infos);
279
280 if ((ctx->_Shader->Flags & GLSL_DUMP) && shProg->Name != 0) {
281 for (unsigned i = 0; i < shProg->NumShaders; i++) {
282 const struct gl_shader *sh = shProg->Shaders[i];
283 if (!sh)
284 continue;
285
286 fprintf(stderr, "GLSL %s shader %d source for linked program %d:\n",
287 _mesa_shader_stage_to_string(sh->Stage),
288 i, shProg->Name);
289 fprintf(stderr, "%s", sh->Source);
290 fprintf(stderr, "\n");
291 }
292 }
293
294 if (brw->precompile && !brw_shader_precompile(ctx, shProg))
295 return false;
296
297 build_program_resource_list(ctx, shProg);
298
299 for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
300 struct gl_linked_shader *shader = shProg->_LinkedShaders[stage];
301 if (!shader)
302 continue;
303
304 /* The GLSL IR won't be needed anymore. */
305 ralloc_free(shader->ir);
306 shader->ir = NULL;
307 }
308
309 return true;
310 }