src/mesa/drivers/dri/i965/brw_link.cpp

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "brw_context.h"
  25 #include "compiler/brw_nir.h"
  26 #include "brw_program.h"
  27 #include "compiler/glsl/ir.h"
  28 #include "compiler/glsl/ir_optimization.h"
  29 #include "compiler/glsl/program.h"
  30 #include "compiler/nir/nir_serialize.h"
  31 #include "program/program.h"
  32 #include "main/mtypes.h"
  33 #include "main/shaderapi.h"
  34 #include "main/shaderobj.h"
  35 #include "main/uniforms.h"
  36
  37 /**
  38  * Performs a compile of the shader stages even when we don't know
  39  * what non-orthogonal state will be set, in the hope that it reflects
  40  * the eventual NOS used, and thus allows us to produce link failures.
  41  */
  42 static bool
  43 brw_shader_precompile(struct gl_context *ctx,
  44                       struct gl_shader_program *sh_prog)
  45 {
  46    struct gl_linked_shader *vs = sh_prog->_LinkedShaders[MESA_SHADER_VERTEX];
  47    struct gl_linked_shader *tcs = sh_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL];
  48    struct gl_linked_shader *tes = sh_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL];
  49    struct gl_linked_shader *gs = sh_prog->_LinkedShaders[MESA_SHADER_GEOMETRY];
  50    struct gl_linked_shader *fs = sh_prog->_LinkedShaders[MESA_SHADER_FRAGMENT];
  51    struct gl_linked_shader *cs = sh_prog->_LinkedShaders[MESA_SHADER_COMPUTE];
  52
  53    if (fs && !brw_fs_precompile(ctx, fs->Program))
  54       return false;
  55
  56    if (gs && !brw_gs_precompile(ctx, gs->Program))
  57       return false;
  58
  59    if (tes && !brw_tes_precompile(ctx, sh_prog, tes->Program))
  60       return false;
  61
  62    if (tcs && !brw_tcs_precompile(ctx, sh_prog, tcs->Program))
  63       return false;
  64
  65    if (vs && !brw_vs_precompile(ctx, vs->Program))
  66       return false;
  67
  68    if (cs && !brw_cs_precompile(ctx, cs->Program))
  69       return false;
  70
  71    return true;
  72 }
  73
  74 static void
  75 brw_lower_packing_builtins(struct brw_context *brw,
  76                            exec_list *ir)
  77 {
  78    const struct gen_device_info *devinfo = &brw->screen->devinfo;
  79
  80    /* Gens < 7 don't have instructions to convert to or from half-precision,
  81     * and Gens < 6 don't expose that functionality.
  82     */
  83    if (devinfo->gen != 6)
  84       return;
  85
  86    lower_packing_builtins(ir, LOWER_PACK_HALF_2x16 | LOWER_UNPACK_HALF_2x16);
  87 }
  88
  89 static void
  90 process_glsl_ir(struct brw_context *brw,
  91                 struct gl_shader_program *shader_prog,
  92                 struct gl_linked_shader *shader)
  93 {
  94    const struct gen_device_info *devinfo = &brw->screen->devinfo;
  95    struct gl_context *ctx = &brw->ctx;
  96
  97    /* Temporary memory context for any new IR. */
  98    void *mem_ctx = ralloc_context(NULL);
  99
 100    ralloc_adopt(mem_ctx, shader->ir);
 101
 102    lower_blend_equation_advanced(shader);
 103
 104    /* lower_packing_builtins() inserts arithmetic instructions, so it
 105     * must precede lower_instructions().
 106     */
 107    brw_lower_packing_builtins(brw, shader->ir);
 108    do_mat_op_to_vec(shader->ir);
 109
 110    unsigned instructions_to_lower = (DIV_TO_MUL_RCP |
 111                                      SUB_TO_ADD_NEG |
 112                                      EXP_TO_EXP2 |
 113                                      LOG_TO_LOG2 |
 114                                      DFREXP_DLDEXP_TO_ARITH);
 115    if (devinfo->gen < 7) {
 116       instructions_to_lower |= BIT_COUNT_TO_MATH |
 117                                EXTRACT_TO_SHIFTS |
 118                                INSERT_TO_SHIFTS |
 119                                REVERSE_TO_SHIFTS;
 120    }
 121
 122    lower_instructions(shader->ir, instructions_to_lower);
 123
 124    /* Pre-gen6 HW can only nest if-statements 16 deep.  Beyond this,
 125     * if-statements need to be flattened.
 126     */
 127    if (devinfo->gen < 6)
 128       lower_if_to_cond_assign(shader->Stage, shader->ir, 16);
 129
 130    do_lower_texture_projection(shader->ir);
 131    do_vec_index_to_cond_assign(shader->ir);
 132    lower_vector_insert(shader->ir, true);
 133    lower_offset_arrays(shader->ir);
 134    lower_noise(shader->ir);
 135    lower_quadop_vector(shader->ir, false);
 136
 137    validate_ir_tree(shader->ir);
 138
 139    /* Now that we've finished altering the linked IR, reparent any live IR back
 140     * to the permanent memory context, and free the temporary one (discarding any
 141     * junk we optimized away).
 142     */
 143    reparent_ir(shader->ir, shader->ir);
 144    ralloc_free(mem_ctx);
 145
 146    if (ctx->_Shader->Flags & GLSL_DUMP) {
 147       fprintf(stderr, "\n");
 148       if (shader->ir) {
 149          fprintf(stderr, "GLSL IR for linked %s program %d:\n",
 150                  _mesa_shader_stage_to_string(shader->Stage),
 151                  shader_prog->Name);
 152          _mesa_print_ir(stderr, shader->ir, NULL);
 153       } else {
 154          fprintf(stderr, "No GLSL IR for linked %s program %d (shader may be "
 155                  "from cache)\n", _mesa_shader_stage_to_string(shader->Stage),
 156                  shader_prog->Name);
 157       }
 158       fprintf(stderr, "\n");
 159    }
 160 }
 161
 162 static void
 163 unify_interfaces(struct shader_info **infos)
 164 {
 165    struct shader_info *prev_info = NULL;
 166
 167    for (unsigned i = MESA_SHADER_VERTEX; i < MESA_SHADER_FRAGMENT; i++) {
 168       if (!infos[i])
 169          continue;
 170
 171       if (prev_info) {
 172          prev_info->outputs_written |= infos[i]->inputs_read &
 173             ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
 174          infos[i]->inputs_read |= prev_info->outputs_written &
 175             ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
 176
 177          prev_info->patch_outputs_written |= infos[i]->patch_inputs_read;
 178          infos[i]->patch_inputs_read |= prev_info->patch_outputs_written;
 179       }
 180       prev_info = infos[i];
 181    }
 182 }
 183
 184 static void
 185 update_xfb_info(struct gl_transform_feedback_info *xfb_info,
 186                 struct shader_info *info)
 187 {
 188    if (!xfb_info)
 189       return;
 190
 191    for (unsigned i = 0; i < xfb_info->NumOutputs; i++) {
 192       struct gl_transform_feedback_output *output = &xfb_info->Outputs[i];
 193
 194       /* The VUE header contains three scalar fields packed together:
 195        * - gl_PointSize is stored in VARYING_SLOT_PSIZ.w
 196        * - gl_Layer is stored in VARYING_SLOT_PSIZ.y
 197        * - gl_ViewportIndex is stored in VARYING_SLOT_PSIZ.z
 198        */
 199       switch (output->OutputRegister) {
 200       case VARYING_SLOT_LAYER:
 201          assert(output->NumComponents == 1);
 202          output->OutputRegister = VARYING_SLOT_PSIZ;
 203          output->ComponentOffset = 1;
 204          break;
 205       case VARYING_SLOT_VIEWPORT:
 206          assert(output->NumComponents == 1);
 207          output->OutputRegister = VARYING_SLOT_PSIZ;
 208          output->ComponentOffset = 2;
 209          break;
 210       case VARYING_SLOT_PSIZ:
 211          assert(output->NumComponents == 1);
 212          output->ComponentOffset = 3;
 213          break;
 214       }
 215
 216       info->outputs_written |= 1ull << output->OutputRegister;
 217    }
 218 }
 219
 220 extern "C" GLboolean
 221 brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
 222 {
 223    struct brw_context *brw = brw_context(ctx);
 224    const struct brw_compiler *compiler = brw->screen->compiler;
 225    unsigned int stage;
 226    struct shader_info *infos[MESA_SHADER_STAGES] = { 0, };
 227
 228    if (shProg->data->LinkStatus == linking_skipped)
 229       return GL_TRUE;
 230
 231    for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
 232       struct gl_linked_shader *shader = shProg->_LinkedShaders[stage];
 233       if (!shader)
 234          continue;
 235
 236       struct gl_program *prog = shader->Program;
 237       prog->Parameters = _mesa_new_parameter_list();
 238
 239       process_glsl_ir(brw, shProg, shader);
 240
 241       _mesa_copy_linked_program_data(shProg, shader);
 242
 243       prog->ShadowSamplers = shader->shadow_samplers;
 244       _mesa_update_shader_textures_used(shProg, prog);
 245
 246       bool debug_enabled =
 247          (INTEL_DEBUG & intel_debug_flag_for_shader_stage(shader->Stage));
 248
 249       if (debug_enabled && shader->ir) {
 250          fprintf(stderr, "GLSL IR for native %s shader %d:\n",
 251                  _mesa_shader_stage_to_string(shader->Stage), shProg->Name);
 252          _mesa_print_ir(stderr, shader->ir, NULL);
 253          fprintf(stderr, "\n\n");
 254       }
 255
 256       prog->nir = brw_create_nir(brw, shProg, prog, (gl_shader_stage) stage,
 257                                  compiler->scalar_stage[stage]);
 258    }
 259
 260    /* Determine first and last stage. */
 261    unsigned first = MESA_SHADER_STAGES;
 262    unsigned last = 0;
 263    for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
 264       if (!shProg->_LinkedShaders[i])
 265          continue;
 266       if (first == MESA_SHADER_STAGES)
 267          first = i;
 268       last = i;
 269    }
 270
 271    /* Linking the stages in the opposite order (from fragment to vertex)
 272     * ensures that inter-shader outputs written to in an earlier stage
 273     * are eliminated if they are (transitively) not used in a later
 274     * stage.
 275     */
 276     if (first != last) {
 277        int next = last;
 278        for (int i = next - 1; i >= 0; i--) {
 279           if (shProg->_LinkedShaders[i] == NULL)
 280              continue;
 281
 282             nir_shader *producer = shProg->_LinkedShaders[i]->Program->nir;
 283             nir_shader *consumer = shProg->_LinkedShaders[next]->Program->nir;
 284
 285             NIR_PASS_V(producer, nir_remove_dead_variables, nir_var_shader_out);
 286             NIR_PASS_V(consumer, nir_remove_dead_variables, nir_var_shader_in);
 287
 288             if (nir_remove_unused_varyings(producer, consumer)) {
 289                NIR_PASS_V(producer, nir_lower_global_vars_to_local);
 290                NIR_PASS_V(consumer, nir_lower_global_vars_to_local);
 291
 292                nir_variable_mode indirect_mask = (nir_variable_mode) 0;
 293                if (compiler->glsl_compiler_options[i].EmitNoIndirectTemp)
 294                   indirect_mask = (nir_variable_mode) nir_var_local;
 295
 296                /* The backend might not be able to handle indirects on
 297                 * temporaries so we need to lower indirects on any of the
 298                 * varyings we have demoted here.
 299                 */
 300                NIR_PASS_V(producer, nir_lower_indirect_derefs, indirect_mask);
 301                NIR_PASS_V(consumer, nir_lower_indirect_derefs, indirect_mask);
 302
 303                const bool p_is_scalar =
 304                   compiler->scalar_stage[producer->info.stage];
 305                producer = brw_nir_optimize(producer, compiler, p_is_scalar);
 306
 307                const bool c_is_scalar =
 308                   compiler->scalar_stage[producer->info.stage];
 309                consumer = brw_nir_optimize(consumer, compiler, c_is_scalar);
 310             }
 311
 312             shProg->_LinkedShaders[i]->Program->nir = producer;
 313             shProg->_LinkedShaders[next]->Program->nir = consumer;
 314
 315             next = i;
 316        }
 317     }
 318
 319    for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
 320       struct gl_linked_shader *shader = shProg->_LinkedShaders[stage];
 321       if (!shader)
 322          continue;
 323
 324       struct gl_program *prog = shader->Program;
 325       brw_shader_gather_info(prog->nir, prog);
 326
 327       NIR_PASS_V(prog->nir, nir_lower_samplers, shProg);
 328       NIR_PASS_V(prog->nir, nir_lower_atomics, shProg);
 329
 330       if (brw->ctx.Cache) {
 331          struct blob writer;
 332          blob_init(&writer);
 333          nir_serialize(&writer, prog->nir);
 334          prog->driver_cache_blob = ralloc_size(NULL, writer.size);
 335          memcpy(prog->driver_cache_blob, writer.data, writer.size);
 336          prog->driver_cache_blob_size = writer.size;
 337       }
 338
 339       infos[stage] = &prog->nir->info;
 340
 341       update_xfb_info(prog->sh.LinkedTransformFeedback, infos[stage]);
 342
 343       /* Make a pass over the IR to add state references for any built-in
 344        * uniforms that are used.  This has to be done now (during linking).
 345        * Code generation doesn't happen until the first time this shader is
 346        * used for rendering.  Waiting until then to generate the parameters is
 347        * too late.  At that point, the values for the built-in uniforms won't
 348        * get sent to the shader.
 349        */
 350       nir_foreach_variable(var, &prog->nir->uniforms) {
 351          if (strncmp(var->name, "gl_", 3) == 0) {
 352             const nir_state_slot *const slots = var->state_slots;
 353             assert(var->state_slots != NULL);
 354
 355             for (unsigned int i = 0; i < var->num_state_slots; i++) {
 356                _mesa_add_state_reference(prog->Parameters,
 357                                          (gl_state_index *)slots[i].tokens);
 358             }
 359          }
 360       }
 361    }
 362
 363    /* The linker tries to dead code eliminate unused varying components,
 364     * and make sure interfaces match.  But it isn't able to do so in all
 365     * cases.  So, explicitly make the interfaces match by OR'ing together
 366     * the inputs_read/outputs_written bitfields of adjacent stages.
 367     */
 368    if (!shProg->SeparateShader)
 369       unify_interfaces(infos);
 370
 371    if ((ctx->_Shader->Flags & GLSL_DUMP) && shProg->Name != 0) {
 372       for (unsigned i = 0; i < shProg->NumShaders; i++) {
 373          const struct gl_shader *sh = shProg->Shaders[i];
 374          if (!sh)
 375             continue;
 376
 377          fprintf(stderr, "GLSL %s shader %d source for linked program %d:\n",
 378                  _mesa_shader_stage_to_string(sh->Stage),
 379                  i, shProg->Name);
 380          fprintf(stderr, "%s", sh->Source);
 381          fprintf(stderr, "\n");
 382       }
 383    }
 384
 385    if (brw->precompile && !brw_shader_precompile(ctx, shProg))
 386       return false;
 387
 388    build_program_resource_list(ctx, shProg);
 389
 390    for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
 391       struct gl_linked_shader *shader = shProg->_LinkedShaders[stage];
 392       if (!shader)
 393          continue;
 394
 395       /* The GLSL IR won't be needed anymore. */
 396       ralloc_free(shader->ir);
 397       shader->ir = NULL;
 398    }
 399
 400    return true;
 401 }