i965: don't lower mod() in glsl ir
[mesa.git] / src / mesa / drivers / dri / i965 / brw_link.cpp
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "brw_context.h"
25 #include "brw_shader.h"
26 #include "brw_fs.h"
27 #include "brw_nir.h"
28 #include "brw_program.h"
29 #include "compiler/glsl/ir_optimization.h"
30 #include "compiler/glsl/program.h"
31 #include "program/program.h"
32 #include "main/shaderapi.h"
33 #include "main/uniforms.h"
34
35 /**
36 * Performs a compile of the shader stages even when we don't know
37 * what non-orthogonal state will be set, in the hope that it reflects
38 * the eventual NOS used, and thus allows us to produce link failures.
39 */
40 static bool
41 brw_shader_precompile(struct gl_context *ctx,
42 struct gl_shader_program *sh_prog)
43 {
44 struct gl_shader *vs = sh_prog->_LinkedShaders[MESA_SHADER_VERTEX];
45 struct gl_shader *tcs = sh_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL];
46 struct gl_shader *tes = sh_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL];
47 struct gl_shader *gs = sh_prog->_LinkedShaders[MESA_SHADER_GEOMETRY];
48 struct gl_shader *fs = sh_prog->_LinkedShaders[MESA_SHADER_FRAGMENT];
49 struct gl_shader *cs = sh_prog->_LinkedShaders[MESA_SHADER_COMPUTE];
50
51 if (fs && !brw_fs_precompile(ctx, sh_prog, fs->Program))
52 return false;
53
54 if (gs && !brw_gs_precompile(ctx, sh_prog, gs->Program))
55 return false;
56
57 if (tes && !brw_tes_precompile(ctx, sh_prog, tes->Program))
58 return false;
59
60 if (tcs && !brw_tcs_precompile(ctx, sh_prog, tcs->Program))
61 return false;
62
63 if (vs && !brw_vs_precompile(ctx, sh_prog, vs->Program))
64 return false;
65
66 if (cs && !brw_cs_precompile(ctx, sh_prog, cs->Program))
67 return false;
68
69 return true;
70 }
71
72 static void
73 brw_lower_packing_builtins(struct brw_context *brw,
74 gl_shader_stage shader_type,
75 exec_list *ir)
76 {
77 /* Gens < 7 don't have instructions to convert to or from half-precision,
78 * and Gens < 6 don't expose that functionality.
79 */
80 if (brw->gen != 6)
81 return;
82
83 lower_packing_builtins(ir, LOWER_PACK_HALF_2x16 | LOWER_UNPACK_HALF_2x16);
84 }
85
86 static void
87 process_glsl_ir(gl_shader_stage stage,
88 struct brw_context *brw,
89 struct gl_shader_program *shader_prog,
90 struct gl_shader *shader)
91 {
92 struct gl_context *ctx = &brw->ctx;
93 const struct brw_compiler *compiler = brw->intelScreen->compiler;
94 const struct gl_shader_compiler_options *options =
95 &ctx->Const.ShaderCompilerOptions[shader->Stage];
96
97 /* Temporary memory context for any new IR. */
98 void *mem_ctx = ralloc_context(NULL);
99
100 ralloc_adopt(mem_ctx, shader->ir);
101
102 /* lower_packing_builtins() inserts arithmetic instructions, so it
103 * must precede lower_instructions().
104 */
105 brw_lower_packing_builtins(brw, shader->Stage, shader->ir);
106 do_mat_op_to_vec(shader->ir);
107 lower_instructions(shader->ir,
108 DIV_TO_MUL_RCP |
109 SUB_TO_ADD_NEG |
110 EXP_TO_EXP2 |
111 LOG_TO_LOG2 |
112 CARRY_TO_ARITH |
113 BORROW_TO_ARITH);
114
115 /* Pre-gen6 HW can only nest if-statements 16 deep. Beyond this,
116 * if-statements need to be flattened.
117 */
118 if (brw->gen < 6)
119 lower_if_to_cond_assign(shader->ir, 16);
120
121 do_lower_texture_projection(shader->ir);
122 brw_lower_texture_gradients(brw, shader->ir);
123 do_vec_index_to_cond_assign(shader->ir);
124 lower_vector_insert(shader->ir, true);
125 lower_offset_arrays(shader->ir);
126 brw_do_lower_unnormalized_offset(shader->ir);
127 lower_noise(shader->ir);
128 lower_quadop_vector(shader->ir, false);
129
130 bool lowered_variable_indexing =
131 lower_variable_index_to_cond_assign((gl_shader_stage)stage,
132 shader->ir,
133 options->EmitNoIndirectInput,
134 options->EmitNoIndirectOutput,
135 options->EmitNoIndirectTemp,
136 options->EmitNoIndirectUniform);
137
138 if (unlikely(brw->perf_debug && lowered_variable_indexing)) {
139 perf_debug("Unsupported form of variable indexing in %s; falling "
140 "back to very inefficient code generation\n",
141 _mesa_shader_stage_to_abbrev(shader->Stage));
142 }
143
144 bool progress;
145 do {
146 progress = false;
147
148 if (compiler->scalar_stage[shader->Stage]) {
149 brw_do_channel_expressions(shader->ir);
150 brw_do_vector_splitting(shader->ir);
151 }
152
153 progress = do_lower_jumps(shader->ir, true, true,
154 true, /* main return */
155 false, /* continue */
156 false /* loops */
157 ) || progress;
158
159 progress = do_common_optimization(shader->ir, true, true,
160 options, ctx->Const.NativeIntegers) || progress;
161 } while (progress);
162
163 validate_ir_tree(shader->ir);
164
165 /* Now that we've finished altering the linked IR, reparent any live IR back
166 * to the permanent memory context, and free the temporary one (discarding any
167 * junk we optimized away).
168 */
169 reparent_ir(shader->ir, shader->ir);
170 ralloc_free(mem_ctx);
171
172 if (ctx->_Shader->Flags & GLSL_DUMP) {
173 fprintf(stderr, "\n");
174 fprintf(stderr, "GLSL IR for linked %s program %d:\n",
175 _mesa_shader_stage_to_string(shader->Stage),
176 shader_prog->Name);
177 _mesa_print_ir(stderr, shader->ir, NULL);
178 fprintf(stderr, "\n");
179 }
180 }
181
182 extern "C" GLboolean
183 brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
184 {
185 struct brw_context *brw = brw_context(ctx);
186 const struct brw_compiler *compiler = brw->intelScreen->compiler;
187 unsigned int stage;
188
189 for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
190 struct gl_shader *shader = shProg->_LinkedShaders[stage];
191 if (!shader)
192 continue;
193
194 struct gl_program *prog =
195 ctx->Driver.NewProgram(ctx, _mesa_shader_stage_to_program(stage),
196 shader->Name);
197 if (!prog)
198 return false;
199 prog->Parameters = _mesa_new_parameter_list();
200
201 _mesa_copy_linked_program_data((gl_shader_stage) stage, shProg, prog);
202
203 process_glsl_ir((gl_shader_stage) stage, brw, shProg, shader);
204
205 /* Make a pass over the IR to add state references for any built-in
206 * uniforms that are used. This has to be done now (during linking).
207 * Code generation doesn't happen until the first time this shader is
208 * used for rendering. Waiting until then to generate the parameters is
209 * too late. At that point, the values for the built-in uniforms won't
210 * get sent to the shader.
211 */
212 foreach_in_list(ir_instruction, node, shader->ir) {
213 ir_variable *var = node->as_variable();
214
215 if ((var == NULL) || (var->data.mode != ir_var_uniform)
216 || (strncmp(var->name, "gl_", 3) != 0))
217 continue;
218
219 const ir_state_slot *const slots = var->get_state_slots();
220 assert(slots != NULL);
221
222 for (unsigned int i = 0; i < var->get_num_state_slots(); i++) {
223 _mesa_add_state_reference(prog->Parameters,
224 (gl_state_index *) slots[i].tokens);
225 }
226 }
227
228 do_set_program_inouts(shader->ir, prog, shader->Stage);
229
230 prog->SamplersUsed = shader->active_samplers;
231 prog->ShadowSamplers = shader->shadow_samplers;
232 _mesa_update_shader_textures_used(shProg, prog);
233
234 _mesa_reference_program(ctx, &shader->Program, prog);
235
236 brw_add_texrect_params(prog);
237
238 prog->nir = brw_create_nir(brw, shProg, prog, (gl_shader_stage) stage,
239 compiler->scalar_stage[stage]);
240
241 _mesa_reference_program(ctx, &prog, NULL);
242 }
243
244 if ((ctx->_Shader->Flags & GLSL_DUMP) && shProg->Name != 0) {
245 for (unsigned i = 0; i < shProg->NumShaders; i++) {
246 const struct gl_shader *sh = shProg->Shaders[i];
247 if (!sh)
248 continue;
249
250 fprintf(stderr, "GLSL %s shader %d source for linked program %d:\n",
251 _mesa_shader_stage_to_string(sh->Stage),
252 i, shProg->Name);
253 fprintf(stderr, "%s", sh->Source);
254 fprintf(stderr, "\n");
255 }
256 }
257
258 if (brw->precompile && !brw_shader_precompile(ctx, shProg))
259 return false;
260
261 build_program_resource_list(ctx, shProg);
262 return true;
263 }